From e912411fbedab06f4b7313404c9bb88f9e9e6c44 Mon Sep 17 00:00:00 2001 From: Ryan Liptak Date: Wed, 7 Aug 2024 09:03:05 -0700 Subject: [PATCH] Run update_cpu_features against LLVM 18.1.8 - RISCV unaligned-scalar-mem was added in LLVM 18.1.6 - Fixes arm v9_5a confusion --- lib/std/Target/arm.zig | 17 +++++++++-------- lib/std/Target/riscv.zig | 6 ++++++ 2 files changed, 15 insertions(+), 8 deletions(-) diff --git a/lib/std/Target/arm.zig b/lib/std/Target/arm.zig index 686d55a642..0fc5f1dbc3 100644 --- a/lib/std/Target/arm.zig +++ b/lib/std/Target/arm.zig @@ -86,6 +86,7 @@ pub const Feature = enum { has_v9_2a, has_v9_3a, has_v9_4a, + has_v9_5a, has_v9a, hwdiv, hwdiv_arm, @@ -754,6 +755,13 @@ pub const all_features = blk: { .has_v9_3a, }), }; + result[@intFromEnum(Feature.has_v9_5a)] = .{ + .llvm_name = "v9.5a", + .description = "Support ARM v9.5a instructions", + .dependencies = featureSet(&[_]Feature{ + .has_v9_4a, + }), + }; result[@intFromEnum(Feature.has_v9a)] = .{ .llvm_name = "v9a", .description = "Support ARM v9a instructions", @@ -1582,20 +1590,13 @@ pub const all_features = blk: { .db, .dsp, .fp_armv8, + .has_v9_5a, .mp, .ras, .trustzone, - .v9_5a, .virtualization, }), }; - result[@intFromEnum(Feature.v9_5a)] = .{ - .llvm_name = "v9.5a", - .description = "Support ARM v9.5a instructions", - .dependencies = featureSet(&[_]Feature{ - .has_v9_4a, - }), - }; result[@intFromEnum(Feature.v9a)] = .{ .llvm_name = "armv9-a", .description = "ARMv9a architecture", diff --git a/lib/std/Target/riscv.zig b/lib/std/Target/riscv.zig index 3e378fdd11..5484579dc4 100644 --- a/lib/std/Target/riscv.zig +++ b/lib/std/Target/riscv.zig @@ -78,6 +78,7 @@ pub const Feature = enum { svnapot, svpbmt, tagged_globals, + unaligned_scalar_mem, use_postra_scheduler, v, ventana_veyron, @@ -584,6 +585,11 @@ pub const all_features = blk: { .description = "Use an instruction sequence for taking the address of a global that allows a memory tag in the upper address bits", .dependencies = featureSet(&[_]Feature{}), }; + result[@intFromEnum(Feature.unaligned_scalar_mem)] = .{ + .llvm_name = "unaligned-scalar-mem", + .description = "Has reasonably performant unaligned scalar loads and stores", + .dependencies = featureSet(&[_]Feature{}), + }; result[@intFromEnum(Feature.use_postra_scheduler)] = .{ .llvm_name = "use-postra-scheduler", .description = "Schedule again after register allocation",