add lr register to mips

This commit is contained in:
Andrew Kelley 2025-07-15 23:43:34 -07:00
parent c2fa961b63
commit af084e537a

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@ -2062,6 +2062,8 @@ pub const Clobbers = switch (@import("builtin").cpu.arch) {
/// addresses other than those derived from input pointer provenance.
memory: bool = false,
lr: bool = false,
hi: bool = false,
lo: bool = false,
ac0: bool = false,