From af084e537adbf571d3d1f69ef5ee3de7abd27ccd Mon Sep 17 00:00:00 2001
From: Andrew Kelley <andrew@ziglang.org>
Date: Tue, 15 Jul 2025 23:43:34 -0700
Subject: [PATCH] add lr register to mips

---
 lib/std/builtin/assembly.zig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/lib/std/builtin/assembly.zig b/lib/std/builtin/assembly.zig
index 8c8ddcbf65..1377e654bd 100644
--- a/lib/std/builtin/assembly.zig
+++ b/lib/std/builtin/assembly.zig
@@ -2062,6 +2062,8 @@ pub const Clobbers = switch (@import("builtin").cpu.arch) {
         /// addresses other than those derived from input pointer provenance.
         memory: bool = false,
 
+        lr: bool = false,
+
         hi: bool = false,
         lo: bool = false,
         ac0: bool = false,