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x64: refactor genMulDivBinOp helper
This commit is contained in:
Jakub Konka
parent
ef9e3fb2b6
commit
aef3c149e6
@ -3131,75 +3131,82 @@ fn genMulDivBinOp(
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switch (tag) {
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.mul,
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.mulwrap,
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=> {
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try self.register_manager.getReg(.rax, maybe_inst);
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try self.register_manager.getReg(.rdx, null);
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try self.genIntMulDivOpMir(switch (signedness) {
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.signed => .imul,
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.unsigned => .mul,
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}, ty, signedness, lhs, rhs);
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return switch (signedness) {
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.signed => MCValue{ .register = .rax },
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.unsigned => MCValue{ .register = registerAlias(.rax, @intCast(u32, ty.abiSize(self.target.*))) },
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};
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},
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.mod,
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.rem,
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.div_trunc,
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.div_exact,
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=> {
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const track_inst_rdx: ?Air.Inst.Index = switch (tag) {
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.mod => if (signedness == .unsigned) maybe_inst else null,
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.rem => maybe_inst,
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else => unreachable,
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const track_inst_rax: ?Air.Inst.Index = switch (tag) {
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.mul, .mulwrap, .div_exact, .div_trunc => maybe_inst,
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else => null,
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};
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try self.register_manager.getReg(.rax, null);
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const track_inst_rdx: ?Air.Inst.Index = switch (tag) {
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.rem => maybe_inst,
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else => null,
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};
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try self.register_manager.getReg(.rax, track_inst_rax);
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try self.register_manager.getReg(.rdx, track_inst_rdx);
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switch (signedness) {
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.signed => {
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switch (tag) {
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.rem => {
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try self.genIntMulDivOpMir(.idiv, ty, .signed, lhs, rhs);
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return MCValue{ .register = .rdx };
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},
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.mod => {
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const div_floor = try self.genInlineIntDivFloor(ty, lhs, rhs);
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try self.genIntMulComplexOpMir(ty, div_floor, rhs);
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const div_floor_lock = self.register_manager.lockReg(div_floor.register);
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defer if (div_floor_lock) |lock| self.register_manager.unlockReg(lock);
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const result: MCValue = if (maybe_inst) |inst|
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try self.copyToRegisterWithInstTracking(inst, ty, lhs)
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else
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MCValue{ .register = try self.copyToTmpRegister(ty, lhs) };
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try self.genBinOpMir(.sub, ty, result, div_floor);
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return result;
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},
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else => unreachable,
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}
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const mir_tag: Mir.Inst.Tag = switch (signedness) {
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.signed => switch (tag) {
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.mul, .mulwrap => Mir.Inst.Tag.imul,
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.div_trunc, .div_exact, .rem => Mir.Inst.Tag.idiv,
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else => unreachable,
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},
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.unsigned => {
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try self.genIntMulDivOpMir(.div, ty, .unsigned, lhs, rhs);
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return MCValue{ .register = .rdx };
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.unsigned => switch (tag) {
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.mul, .mulwrap => Mir.Inst.Tag.mul,
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.div_trunc, .div_exact, .rem => Mir.Inst.Tag.div,
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else => unreachable,
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},
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};
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try self.genIntMulDivOpMir(mir_tag, ty, .signed, lhs, rhs);
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switch (signedness) {
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.signed => switch (tag) {
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.mul, .mulwrap, .div_trunc, .div_exact => return MCValue{ .register = .rax },
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.rem => return MCValue{ .register = .rdx },
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else => unreachable,
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},
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.unsigned => switch (tag) {
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.mul, .mulwrap, .div_trunc, .div_exact => return MCValue{
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.register = registerAlias(.rax, @intCast(u32, ty.abiSize(self.target.*))),
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},
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.rem => return MCValue{
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.register = registerAlias(.rdx, @intCast(u32, ty.abiSize(self.target.*))),
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},
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else => unreachable,
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},
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}
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},
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.div_trunc,
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.div_floor,
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.div_exact,
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=> {
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const track_inst_rax: ?Air.Inst.Index = blk: {
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if (signedness == .unsigned) break :blk maybe_inst;
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switch (tag) {
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.div_exact, .div_trunc => break :blk maybe_inst,
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else => break :blk null,
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}
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};
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try self.register_manager.getReg(.rax, track_inst_rax);
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.mod => {
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try self.register_manager.getReg(.rax, null);
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try self.register_manager.getReg(.rdx, if (signedness == .unsigned) maybe_inst else null);
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switch (signedness) {
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.signed => {
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const div_floor = try self.genInlineIntDivFloor(ty, lhs, rhs);
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try self.genIntMulComplexOpMir(ty, div_floor, rhs);
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const div_floor_lock = self.register_manager.lockReg(div_floor.register);
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defer if (div_floor_lock) |lock| self.register_manager.unlockReg(lock);
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const result: MCValue = if (maybe_inst) |inst|
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try self.copyToRegisterWithInstTracking(inst, ty, lhs)
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else
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MCValue{ .register = try self.copyToTmpRegister(ty, lhs) };
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try self.genBinOpMir(.sub, ty, result, div_floor);
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return result;
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},
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.unsigned => {
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try self.genIntMulDivOpMir(.div, ty, .unsigned, lhs, rhs);
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return MCValue{ .register = registerAlias(.rdx, @intCast(u32, ty.abiSize(self.target.*))) };
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},
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}
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},
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.div_floor => {
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try self.register_manager.getReg(.rax, if (signedness == .unsigned) maybe_inst else null);
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try self.register_manager.getReg(.rdx, null);
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const lhs_lock: ?RegisterLock = switch (lhs) {
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@ -3209,24 +3216,21 @@ fn genMulDivBinOp(
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defer if (lhs_lock) |lock| self.register_manager.unlockReg(lock);
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const actual_rhs: MCValue = blk: {
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if (signedness == .signed) {
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switch (tag) {
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.div_floor => {
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const rhs_lock: ?RegisterLock = switch (rhs) {
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.register => |reg| self.register_manager.lockRegAssumeUnused(reg),
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else => null,
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};
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defer if (rhs_lock) |lock| self.register_manager.unlockReg(lock);
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switch (signedness) {
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.signed => {
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const rhs_lock: ?RegisterLock = switch (rhs) {
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.register => |reg| self.register_manager.lockRegAssumeUnused(reg),
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else => null,
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};
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defer if (rhs_lock) |lock| self.register_manager.unlockReg(lock);
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if (maybe_inst) |inst| {
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break :blk try self.copyToRegisterWithInstTracking(inst, ty, rhs);
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}
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break :blk MCValue{ .register = try self.copyToTmpRegister(ty, rhs) };
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},
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else => {},
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}
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if (maybe_inst) |inst| {
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break :blk try self.copyToRegisterWithInstTracking(inst, ty, rhs);
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}
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break :blk MCValue{ .register = try self.copyToTmpRegister(ty, rhs) };
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},
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.unsigned => break :blk rhs,
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}
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break :blk rhs;
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};
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const rhs_lock: ?RegisterLock = switch (actual_rhs) {
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.register => |reg| self.register_manager.lockReg(reg),
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@ -3235,27 +3239,19 @@ fn genMulDivBinOp(
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defer if (rhs_lock) |lock| self.register_manager.unlockReg(lock);
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const result: MCValue = result: {
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if (signedness == .unsigned) {
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try self.genIntMulDivOpMir(.div, ty, signedness, lhs, actual_rhs);
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break :result MCValue{ .register = .rax };
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}
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switch (tag) {
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.div_exact, .div_trunc => {
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try self.genIntMulDivOpMir(switch (signedness) {
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.signed => .idiv,
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.unsigned => .div,
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}, ty, signedness, lhs, actual_rhs);
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break :result MCValue{ .register = .rax };
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switch (signedness) {
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.signed => break :result try self.genInlineIntDivFloor(ty, lhs, actual_rhs),
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.unsigned => {
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try self.genIntMulDivOpMir(.div, ty, .unsigned, lhs, actual_rhs);
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break :result MCValue{
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.register = registerAlias(.rax, @intCast(u32, ty.abiSize(self.target.*))),
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};
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},
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.div_floor => {
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break :result try self.genInlineIntDivFloor(ty, lhs, actual_rhs);
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},
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else => unreachable,
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}
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};
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return result;
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},
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else => unreachable,
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}
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}
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