llvm: Don't lower to f16 for riscv32.

This causes so many test failures that I doubt this has been tested at all.
2026-02-12 20:37:54 +00:00 · 2024-08-31 03:29:46 +02:00 · 2024-08-31 03:29:46 +02:00 · ae10adb6ef
commit ae10adb6ef
parent a0205fff98
1 changed files with 1 additions and 0 deletions
--- a/src/codegen/llvm.zig
+++ b/src/codegen/llvm.zig
@ -11990,6 +11990,7 @@ fn backendSupportsF16(target: std.Target) bool {
        .mipsel,
        .mips64,
        .mips64el,
+        .riscv32,
        .s390x,
        => false,
        .aarch64,