From ae10adb6ef7182352c6176a135e181ba70c81212 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= <alex@alexrp.com>
Date: Sat, 31 Aug 2024 03:29:46 +0200
Subject: [PATCH] llvm: Don't lower to f16 for riscv32.

This causes so many test failures that I doubt this has been tested at all.
---
 src/codegen/llvm.zig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/codegen/llvm.zig b/src/codegen/llvm.zig
index dc8996afda..69e32ad2d2 100644
--- a/src/codegen/llvm.zig
+++ b/src/codegen/llvm.zig
@@ -11990,6 +11990,7 @@ fn backendSupportsF16(target: std.Target) bool {
         .mipsel,
         .mips64,
         .mips64el,
+        .riscv32,
         .s390x,
         => false,
         .aarch64,