llvm: Disable lowering to f128 on sparc32.

efc6b50d2d/llvm/lib/Target/Sparc/SparcISelLowering.cpp (L561-L562)

src/codegen/llvm.zig

@@ -11774,7 +11774,9 @@ fn backendSupportsF16(target: std.Target) bool {
 /// or if it produces miscompilations.
 fn backendSupportsF128(target: std.Target) bool {
     return switch (target.cpu.arch) {
-        .amdgcn => false,
+        .amdgcn,
+        .sparc,
+        => false,
         .aarch64 => std.Target.aarch64.featureSetHas(target.cpu.features, .fp_armv8),
         else => true,
     };