From a1a823f69c45776788fd5254f320c63d42d812e6 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= <alex@alexrp.com>
Date: Mon, 12 Aug 2024 04:45:35 +0200
Subject: [PATCH] llvm: Disable lowering to f128 on sparc32.

https://github.com/llvm/llvm-project/blob/efc6b50d2d93fa571572ee3ef1d4565c09ad1610/llvm/lib/Target/Sparc/SparcISelLowering.cpp#L561-L562
---
 src/codegen/llvm.zig | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/src/codegen/llvm.zig b/src/codegen/llvm.zig
index b900c15d82..43b646f16d 100644
--- a/src/codegen/llvm.zig
+++ b/src/codegen/llvm.zig
@@ -11774,7 +11774,9 @@ fn backendSupportsF16(target: std.Target) bool {
 /// or if it produces miscompilations.
 fn backendSupportsF128(target: std.Target) bool {
     return switch (target.cpu.arch) {
-        .amdgcn => false,
+        .amdgcn,
+        .sparc,
+        => false,
         .aarch64 => std.Target.aarch64.featureSetHas(target.cpu.features, .fp_armv8),
         else => true,
     };