aarch64: less feature-full baseline CPU

This commit is contained in:
Andrew Kelley 2020-01-22 18:40:34 -05:00
parent 0c477f3c79
commit 9845264a0b
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GPG Key ID: 7C5F548F728501A9
3 changed files with 8 additions and 1 deletions

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@ -468,7 +468,7 @@ pub const Target = union(enum) {
};
const cpu = switch (arch) {
.arm, .armeb, .thumb, .thumbeb => &arm.cpu.generic,
.aarch64, .aarch64_be, .aarch64_32 => &aarch64.cpu.generic,
.aarch64, .aarch64_be, .aarch64_32 => &aarch64.cpu.baseline,
.avr => &avr.cpu.avr1,
.bpfel, .bpfeb => &bpf.cpu.generic,
.hexagon => &hexagon.cpu.generic,

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@ -1225,6 +1225,11 @@ pub const cpu = struct {
.cyclone,
}),
};
pub const baseline = Cpu{
.name = "baseline",
.llvm_name = null,
.features = featureSet(&[_]Feature{}),
};
pub const cortex_a35 = Cpu{
.name = "cortex_a35",
.llvm_name = "cortex-a35",
@ -1411,6 +1416,7 @@ pub const cpu = struct {
/// compiler has inefficient memory and CPU usage, affecting build times.
pub const all_cpus = &[_]*const Cpu{
&cpu.apple_latest,
&cpu.baseline,
&cpu.cortex_a35,
&cpu.cortex_a53,
&cpu.cortex_a55,

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@ -8795,6 +8795,7 @@ static void init(CodeGen *g) {
target_specific_features = stage2_cpu_features_get_llvm_features(g->zig_target->cpu_features);
}
if (g->verbose_llvm_cpu_features) {
fprintf(stderr, "name=%s triple=%s\n", buf_ptr(g->root_out_name), buf_ptr(&g->llvm_triple_str));
fprintf(stderr, "name=%s target_specific_cpu_args=%s\n", buf_ptr(g->root_out_name), target_specific_cpu_args);
fprintf(stderr, "name=%s target_specific_features=%s\n", buf_ptr(g->root_out_name), target_specific_features);
}