diff --git a/lib/std/target.zig b/lib/std/target.zig index 5dcbb962be..6457216676 100644 --- a/lib/std/target.zig +++ b/lib/std/target.zig @@ -468,7 +468,7 @@ pub const Target = union(enum) { }; const cpu = switch (arch) { .arm, .armeb, .thumb, .thumbeb => &arm.cpu.generic, - .aarch64, .aarch64_be, .aarch64_32 => &aarch64.cpu.generic, + .aarch64, .aarch64_be, .aarch64_32 => &aarch64.cpu.baseline, .avr => &avr.cpu.avr1, .bpfel, .bpfeb => &bpf.cpu.generic, .hexagon => &hexagon.cpu.generic, diff --git a/lib/std/target/aarch64.zig b/lib/std/target/aarch64.zig index 4639fe6dcc..4d05a94290 100644 --- a/lib/std/target/aarch64.zig +++ b/lib/std/target/aarch64.zig @@ -1225,6 +1225,11 @@ pub const cpu = struct { .cyclone, }), }; + pub const baseline = Cpu{ + .name = "baseline", + .llvm_name = null, + .features = featureSet(&[_]Feature{}), + }; pub const cortex_a35 = Cpu{ .name = "cortex_a35", .llvm_name = "cortex-a35", @@ -1411,6 +1416,7 @@ pub const cpu = struct { /// compiler has inefficient memory and CPU usage, affecting build times. pub const all_cpus = &[_]*const Cpu{ &cpu.apple_latest, + &cpu.baseline, &cpu.cortex_a35, &cpu.cortex_a53, &cpu.cortex_a55, diff --git a/src/codegen.cpp b/src/codegen.cpp index 7ad19fdfcb..123115ba2f 100644 --- a/src/codegen.cpp +++ b/src/codegen.cpp @@ -8795,6 +8795,7 @@ static void init(CodeGen *g) { target_specific_features = stage2_cpu_features_get_llvm_features(g->zig_target->cpu_features); } if (g->verbose_llvm_cpu_features) { + fprintf(stderr, "name=%s triple=%s\n", buf_ptr(g->root_out_name), buf_ptr(&g->llvm_triple_str)); fprintf(stderr, "name=%s target_specific_cpu_args=%s\n", buf_ptr(g->root_out_name), target_specific_cpu_args); fprintf(stderr, "name=%s target_specific_features=%s\n", buf_ptr(g->root_out_name), target_specific_features); }