Rename IrInstSrc to Stage1ZirInst and IrInstGen to Stage1AirInst

This commit is contained in:
Martin Wickham 2021-07-10 21:47:07 -05:00 committed by Andrew Kelley
parent 968d1ecf17
commit 75d1b113aa
10 changed files with 6199 additions and 6199 deletions

File diff suppressed because it is too large Load Diff

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@ -206,7 +206,7 @@ ScopeLoop *create_loop_scope(CodeGen *g, AstNode *node, Scope *parent) {
return scope;
}
Scope *create_runtime_scope(CodeGen *g, AstNode *node, Scope *parent, IrInstSrc *is_comptime) {
Scope *create_runtime_scope(CodeGen *g, AstNode *node, Scope *parent, Stage1ZirInst *is_comptime) {
ScopeRuntime *scope = heap::c_allocator.create<ScopeRuntime>();
scope->is_comptime = is_comptime;
init_scope(g, &scope->base, ScopeIdRuntime, node, parent);
@ -5071,7 +5071,7 @@ static void analyze_fn_async(CodeGen *g, ZigFn *fn, bool resolve_frame) {
}
for (size_t i = 0; i < fn->call_list.length; i += 1) {
IrInstGenCall *call = fn->call_list.at(i);
Stage1AirInstCall *call = fn->call_list.at(i);
if (call->fn_entry == nullptr) {
// TODO function pointer call here, could be anything
continue;
@ -5094,7 +5094,7 @@ static void analyze_fn_async(CodeGen *g, ZigFn *fn, bool resolve_frame) {
}
}
for (size_t i = 0; i < fn->await_list.length; i += 1) {
IrInstGenAwait *await = fn->await_list.at(i);
Stage1AirInstAwait *await = fn->await_list.at(i);
if (await->is_nosuspend) continue;
switch (analyze_callee_async(g, fn, await->target_fn, await->base.source_node, must_not_be_async,
CallModifierNone))
@ -6755,8 +6755,8 @@ static Error resolve_async_frame(CodeGen *g, ZigType *frame_type) {
ZigType *fn_type = get_async_fn_type(g, fn->type_entry);
if (fn->analyzed_executable.need_err_code_spill) {
IrInstGenAlloca *alloca_gen = heap::c_allocator.create<IrInstGenAlloca>();
alloca_gen->base.id = IrInstGenIdAlloca;
Stage1AirInstAlloca *alloca_gen = heap::c_allocator.create<Stage1AirInstAlloca>();
alloca_gen->base.id = Stage1AirInstIdAlloca;
alloca_gen->base.source_node = fn->proto_node;
alloca_gen->base.scope = fn->child_scope;
alloca_gen->base.value = g->pass1_arena->create<ZigValue>();
@ -6769,11 +6769,11 @@ static Error resolve_async_frame(CodeGen *g, ZigType *frame_type) {
ZigType *largest_call_frame_type = nullptr;
// Later we'll change this to be largest_call_frame_type instead of void.
IrInstGen *all_calls_alloca = ir_create_alloca(g, &fn->fndef_scope->base, fn->body_node,
Stage1AirInst *all_calls_alloca = ir_create_alloca(g, &fn->fndef_scope->base, fn->body_node,
fn, g->builtin_types.entry_void, "@async_call_frame");
for (size_t i = 0; i < fn->call_list.length; i += 1) {
IrInstGenCall *call = fn->call_list.at(i);
Stage1AirInstCall *call = fn->call_list.at(i);
if (call->new_stack != nullptr) {
// don't need to allocate a frame for this
continue;
@ -6838,7 +6838,7 @@ static Error resolve_async_frame(CodeGen *g, ZigType *frame_type) {
// For example: foo() + await z
// The funtion call result of foo() must be spilled.
for (size_t i = 0; i < fn->await_list.length; i += 1) {
IrInstGenAwait *await = fn->await_list.at(i);
Stage1AirInstAwait *await = fn->await_list.at(i);
if (await->is_nosuspend) {
continue;
}
@ -6875,10 +6875,10 @@ static Error resolve_async_frame(CodeGen *g, ZigType *frame_type) {
await->base.value->type, "");
}
for (size_t block_i = 0; block_i < fn->analyzed_executable.basic_block_list.length; block_i += 1) {
IrBasicBlockGen *block = fn->analyzed_executable.basic_block_list.at(block_i);
Stage1AirBasicBlock *block = fn->analyzed_executable.basic_block_list.at(block_i);
for (size_t instr_i = 0; instr_i < block->instruction_list.length; instr_i += 1) {
IrInstGen *instruction = block->instruction_list.at(instr_i);
if (instruction->id == IrInstGenIdSuspendFinish) {
Stage1AirInst *instruction = block->instruction_list.at(instr_i);
if (instruction->id == Stage1AirInstIdSuspendFinish) {
mark_suspension_point(instruction->scope);
}
}
@ -6886,20 +6886,20 @@ static Error resolve_async_frame(CodeGen *g, ZigType *frame_type) {
// Now that we've marked all the expr scopes that have to spill, we go over the instructions
// and spill the relevant ones.
for (size_t block_i = 0; block_i < fn->analyzed_executable.basic_block_list.length; block_i += 1) {
IrBasicBlockGen *block = fn->analyzed_executable.basic_block_list.at(block_i);
Stage1AirBasicBlock *block = fn->analyzed_executable.basic_block_list.at(block_i);
for (size_t instr_i = 0; instr_i < block->instruction_list.length; instr_i += 1) {
IrInstGen *instruction = block->instruction_list.at(instr_i);
if (instruction->id == IrInstGenIdAwait ||
instruction->id == IrInstGenIdVarPtr ||
instruction->id == IrInstGenIdAlloca ||
instruction->id == IrInstGenIdSpillBegin ||
instruction->id == IrInstGenIdSpillEnd)
Stage1AirInst *instruction = block->instruction_list.at(instr_i);
if (instruction->id == Stage1AirInstIdAwait ||
instruction->id == Stage1AirInstIdVarPtr ||
instruction->id == Stage1AirInstIdAlloca ||
instruction->id == Stage1AirInstIdSpillBegin ||
instruction->id == Stage1AirInstIdSpillEnd)
{
// This instruction does its own spilling specially, or otherwise doesn't need it.
continue;
}
if (instruction->id == IrInstGenIdCast &&
reinterpret_cast<IrInstGenCast *>(instruction)->cast_op == CastOpNoop)
if (instruction->id == Stage1AirInstIdCast &&
reinterpret_cast<Stage1AirInstCast *>(instruction)->cast_op == CastOpNoop)
{
// The IR instruction exists only to change the type according to Zig. No spill needed.
continue;
@ -6964,7 +6964,7 @@ static Error resolve_async_frame(CodeGen *g, ZigType *frame_type) {
}
for (size_t alloca_i = 0; alloca_i < fn->alloca_gen_list.length; alloca_i += 1) {
IrInstGenAlloca *instruction = fn->alloca_gen_list.at(alloca_i);
Stage1AirInstAlloca *instruction = fn->alloca_gen_list.at(alloca_i);
instruction->field_index = SIZE_MAX;
ZigType *ptr_type = instruction->base.value->type;
assert(ptr_type->id == ZigTypeIdPointer);
@ -7146,8 +7146,8 @@ bool ir_get_var_is_comptime(ZigVar *var) {
// As an optimization, is_comptime values which are constant are allowed
// to be omitted from analysis. In this case, there is no child instruction
// and we simply look at the unanalyzed const parent instruction.
assert(var->is_comptime->id == IrInstSrcIdConst);
IrInstSrcConst *const_inst = reinterpret_cast<IrInstSrcConst *>(var->is_comptime);
assert(var->is_comptime->id == Stage1ZirInstIdConst);
Stage1ZirInstConst *const_inst = reinterpret_cast<Stage1ZirInstConst *>(var->is_comptime);
assert(const_inst->value->type->id == ZigTypeIdBool);
var->is_comptime_memoized_value = const_inst->value->data.x_bool;
var->is_comptime = nullptr;

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@ -138,7 +138,7 @@ ScopeSuspend *create_suspend_scope(CodeGen *g, AstNode *node, Scope *parent);
ScopeFnDef *create_fndef_scope(CodeGen *g, AstNode *node, Scope *parent, ZigFn *fn_entry);
Scope *create_comptime_scope(CodeGen *g, AstNode *node, Scope *parent);
Scope *create_nosuspend_scope(CodeGen *g, AstNode *node, Scope *parent);
Scope *create_runtime_scope(CodeGen *g, AstNode *node, Scope *parent, IrInstSrc *is_comptime);
Scope *create_runtime_scope(CodeGen *g, AstNode *node, Scope *parent, Stage1ZirInst *is_comptime);
Scope *create_typeof_scope(CodeGen *g, AstNode *node, Scope *parent);
ScopeExpr *create_expr_scope(CodeGen *g, AstNode *node, Scope *parent);

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@ -14,10 +14,10 @@ bool stage1_astgen(CodeGen *g, AstNode *node, Scope *scope, Stage1Zir *stage1_zi
ZigFn *fn, bool in_c_import_scope);
bool stage1_astgen_fn(CodeGen *g, ZigFn *fn_entry);
bool ir_inst_src_has_side_effects(IrInstSrc *inst);
bool ir_inst_src_has_side_effects(Stage1ZirInst *inst);
ZigVar *create_local_var(CodeGen *codegen, AstNode *node, Scope *parent_scope,
Buf *name, bool src_is_const, bool gen_is_const, bool is_shadowable, IrInstSrc *is_comptime,
Buf *name, bool src_is_const, bool gen_is_const, bool is_shadowable, Stage1ZirInst *is_comptime,
bool skip_name_check);
ResultLoc *no_result_loc(void);
@ -28,7 +28,7 @@ AstNode *ast_field_to_symbol_node(AstNode *err_set_field_node);
void ir_add_call_stack_errors_gen(CodeGen *codegen, Stage1Air *exec, ErrorMsg *err_msg,
int limit);
void destroy_instruction_src(IrInstSrc *inst);
void destroy_instruction_src(Stage1ZirInst *inst);
bool ir_should_inline(Stage1Zir *exec, Scope *scope);
Buf *get_anon_type_name(CodeGen *codegen, Stage1Zir *exec, const char *kind_name,

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@ -10,7 +10,7 @@
#include "all_types.hpp"
IrInstGen *ir_create_alloca(CodeGen *g, Scope *scope, AstNode *source_node, ZigFn *fn,
Stage1AirInst *ir_create_alloca(CodeGen *g, Scope *scope, AstNode *source_node, ZigFn *fn,
ZigType *var_type, const char *name_hint);
Error ir_eval_const_value(CodeGen *codegen, Scope *scope, AstNode *node,
@ -25,7 +25,7 @@ ZigType *ir_analyze(CodeGen *codegen, Stage1Zir *stage1_zir, Stage1Air *stage1_a
ZigType *expected_type, AstNode *expected_type_source_node, ZigValue *result_ptr,
ZigFn *fn);
bool ir_inst_gen_has_side_effects(IrInstGen *inst);
bool ir_inst_gen_has_side_effects(Stage1AirInst *inst);
struct IrAnalyze;
ZigValue *const_ptr_pointee(IrAnalyze *ira, CodeGen *codegen, ZigValue *const_val,

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@ -14,12 +14,12 @@
void ir_print_src(CodeGen *codegen, FILE *f, Stage1Zir *executable, int indent_size);
void ir_print_gen(CodeGen *codegen, FILE *f, Stage1Air *executable, int indent_size);
void ir_print_inst_src(CodeGen *codegen, FILE *f, IrInstSrc *inst, int indent_size);
void ir_print_inst_gen(CodeGen *codegen, FILE *f, IrInstGen *inst, int indent_size);
void ir_print_inst_src(CodeGen *codegen, FILE *f, Stage1ZirInst *inst, int indent_size);
void ir_print_inst_gen(CodeGen *codegen, FILE *f, Stage1AirInst *inst, int indent_size);
void ir_print_basic_block_src(CodeGen *codegen, FILE *f, Stage1ZirBasicBlock *bb, int indent_size);
void ir_print_basic_block_gen(CodeGen *codegen, FILE *f, IrBasicBlockGen *bb, int indent_size);
void ir_print_basic_block_gen(CodeGen *codegen, FILE *f, Stage1AirBasicBlock *bb, int indent_size);
const char* ir_inst_src_type_str(IrInstSrcId id);
const char* ir_inst_gen_type_str(IrInstGenId id);
const char* ir_inst_src_type_str(Stage1ZirInstId id);
const char* ir_inst_gen_type_str(Stage1AirInstId id);
#endif