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better default enabled features for riscv
Until ability to specify target CPU features (#2883) is done, this commit gives riscv target better default features. This side-steps #3275 which is a deficiency in compiler-rt when features do not include 32 bit integer division. With this commit, RISC-V compiler-rt tests pass and Hello World works both pure-zig and with musl libc.
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@ -30,6 +30,11 @@ enum ResumeId {
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ResumeIdCall,
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};
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// TODO https://github.com/ziglang/zig/issues/2883
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// Until then we have this same default as Clang.
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// This avoids https://github.com/ziglang/zig/issues/3275
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static const char *riscv_default_features = "+a,+c,+d,+f,+m,+relax";
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static void init_darwin_native(CodeGen *g) {
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char *osx_target = getenv("MACOSX_DEPLOYMENT_TARGET");
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char *ios_target = getenv("IPHONEOS_DEPLOYMENT_TARGET");
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@ -8720,8 +8725,9 @@ static void init(CodeGen *g) {
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}
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} else if (target_is_riscv(g->zig_target)) {
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// TODO https://github.com/ziglang/zig/issues/2883
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// Be aware of https://github.com/ziglang/zig/issues/3275
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target_specific_cpu_args = "";
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target_specific_features = "+a";
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target_specific_features = riscv_default_features;
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} else {
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target_specific_cpu_args = "";
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target_specific_features = "";
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@ -9007,7 +9013,7 @@ void add_cc_args(CodeGen *g, ZigList<const char *> &args, const char *out_dep_pa
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args.append("-Xclang");
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args.append("-target-feature");
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args.append("-Xclang");
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args.append("+a");
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args.append(riscv_default_features);
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}
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}
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if (g->zig_target->os == OsFreestanding) {
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