stage2: Add Hello World test for ARM backend

This commit is contained in:
joachimschmidt557 2020-08-23 23:10:19 +02:00
parent b2254023e4
commit 4f2618e75b
2 changed files with 41 additions and 1 deletions

View File

@ -1277,7 +1277,7 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type {
mem.writeIntBig(u32, try self.code.addManyAsArray(4), Instruction.bkpt(0).toU32());
},
else => return self.fail(src, "TODO implement @breakpoint() for {}", .{self.target.cpu.arch}),
}
}
return .none;
}

View File

@ -18,6 +18,11 @@ const linux_riscv64 = std.zig.CrossTarget{
.os_tag = .linux,
};
const linux_arm = std.zig.CrossTarget{
.cpu_arch = .arm,
.os_tag = .linux,
};
const wasi = std.zig.CrossTarget{
.cpu_arch = .wasm32,
.os_tag = .wasi,
@ -181,6 +186,41 @@ pub fn addCases(ctx: *TestContext) !void {
);
}
{
var case = ctx.exe("hello world", linux_arm);
// Regular old hello world
case.addCompareOutput(
\\export fn _start() noreturn {
\\ print();
\\ exit();
\\}
\\
\\fn print() void {
\\ asm volatile ("svc #0"
\\ :
\\ : [number] "{r7}" (4),
\\ [arg1] "{r0}" (1),
\\ [arg2] "{r1}" (@ptrToInt("Hello, World!\n")),
\\ [arg3] "{r2}" (14)
\\ : "memory"
\\ );
\\ return;
\\}
\\
\\fn exit() noreturn {
\\ asm volatile ("svc #0"
\\ :
\\ : [number] "{r7}" (1),
\\ [arg1] "{r0}" (0)
\\ : "memory"
\\ );
\\ unreachable;
\\}
,
"Hello, World!\n",
);
}
{
var case = ctx.exe("adding numbers at comptime", linux_x64);
case.addCompareOutput(