mirror of
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stage2: update PrintMir with latest instructions and Isel changes
This commit is contained in:
Jakub Konka
parent
b7e2235973
commit
4ecc5956f6
@ -329,7 +329,11 @@ pub fn generate(
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if (builtin.mode == .Debug and bin_file.options.module.?.comp.verbose_mir) {
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const w = std.io.getStdErr().writer();
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w.print("# Begin Function MIR: {s}:\n", .{module_fn.owner_decl.name}) catch {};
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const print = @import("./PrintMir.zig"){ .mir = mir };
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const PrintMir = @import("PrintMir.zig");
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const print = PrintMir{
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.mir = mir,
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.bin_file = bin_file,
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};
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print.printMir(w, function.mir_to_air_map, air) catch {}; // we don't care if the debug printing fails
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w.print("# End Function MIR: {s}\n\n", .{module_fn.owner_decl.name}) catch {};
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}
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@ -25,6 +25,7 @@ const Type = @import("../../type.zig").Type;
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const fmtIntSizeBin = std.fmt.fmtIntSizeBin;
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mir: Mir,
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bin_file: *link.File,
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pub fn printMir(print: *const Print, w: anytype, mir_to_air_map: std.AutoHashMap(Mir.Inst.Index, Air.Inst.Index), air: Air) !void {
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const instruction_bytes = print.mir.instructions.len *
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@ -116,15 +117,15 @@ pub fn printMir(print: *const Print, w: anytype, mir_to_air_map: std.AutoHashMap
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.jmp => try print.mirJmpCall(.jmp, inst, w),
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.call => try print.mirJmpCall(.call, inst, w),
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// .cond_jmp_greater_less => try print.mirCondJmp(.cond_jmp_greater_less, inst, w),
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// .cond_jmp_above_below => try print.mirCondJmp(.cond_jmp_above_below, inst, w),
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// .cond_jmp_eq_ne => try print.mirCondJmp(.cond_jmp_eq_ne, inst, w),
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.cond_jmp_greater_less => try print.mirCondJmp(.cond_jmp_greater_less, inst, w),
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.cond_jmp_above_below => try print.mirCondJmp(.cond_jmp_above_below, inst, w),
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.cond_jmp_eq_ne => try print.mirCondJmp(.cond_jmp_eq_ne, inst, w),
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// .cond_set_byte_greater_less => try print.mirCondSetByte(.cond_set_byte_greater_less, inst, w),
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// .cond_set_byte_above_below => try print.mirCondSetByte(.cond_set_byte_above_below, inst, w),
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// .cond_set_byte_eq_ne => try print.mirCondSetByte(.cond_set_byte_eq_ne, inst, w),
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.cond_set_byte_greater_less => try print.mirCondSetByte(.cond_set_byte_greater_less, inst, w),
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.cond_set_byte_above_below => try print.mirCondSetByte(.cond_set_byte_above_below, inst, w),
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.cond_set_byte_eq_ne => try print.mirCondSetByte(.cond_set_byte_eq_ne, inst, w),
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// .@"test" => try print.mirTest(inst, w),
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.@"test" => try print.mirTest(inst, w),
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.brk => try w.writeAll("brk\n"),
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.ret => try w.writeAll("ret\n"),
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@ -209,254 +210,24 @@ fn mirJmpCall(print: *const Print, tag: Mir.Inst.Tag, inst: Mir.Inst.Index, w: a
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try w.print("{s}\n", .{@tagName(ops.reg1)});
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}
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const CondType = enum {
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/// greater than or equal
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gte,
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/// greater than
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gt,
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/// less than
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lt,
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/// less than or equal
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lte,
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/// above or equal
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ae,
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/// above
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a,
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/// below
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b,
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/// below or equal
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be,
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/// not equal
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ne,
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/// equal
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eq,
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fn fromTagAndFlags(tag: Mir.Inst.Tag, flags: u2) CondType {
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return switch (tag) {
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.cond_jmp_greater_less,
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.cond_set_byte_greater_less,
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=> switch (flags) {
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0b00 => CondType.gte,
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0b01 => CondType.gt,
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0b10 => CondType.lt,
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0b11 => CondType.lte,
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},
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.cond_jmp_above_below,
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.cond_set_byte_above_below,
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=> switch (flags) {
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0b00 => CondType.ae,
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0b01 => CondType.a,
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0b10 => CondType.b,
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0b11 => CondType.be,
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},
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.cond_jmp_eq_ne,
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.cond_set_byte_eq_ne,
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=> switch (@truncate(u1, flags)) {
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0b0 => CondType.ne,
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0b1 => CondType.eq,
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},
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else => unreachable,
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};
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}
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};
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inline fn getCondOpCode(tag: Mir.Inst.Tag, cond: CondType) u8 {
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switch (cond) {
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.gte => return switch (tag) {
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.cond_jmp_greater_less => 0x8d,
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.cond_set_byte_greater_less => 0x9d,
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else => unreachable,
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},
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.gt => return switch (tag) {
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.cond_jmp_greater_less => 0x8f,
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.cond_set_byte_greater_less => 0x9f,
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else => unreachable,
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},
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.lt => return switch (tag) {
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.cond_jmp_greater_less => 0x8c,
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.cond_set_byte_greater_less => 0x9c,
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else => unreachable,
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},
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.lte => return switch (tag) {
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.cond_jmp_greater_less => 0x8e,
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.cond_set_byte_greater_less => 0x9e,
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else => unreachable,
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},
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.ae => return switch (tag) {
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.cond_jmp_above_below => 0x83,
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.cond_set_byte_above_below => 0x93,
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else => unreachable,
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},
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.a => return switch (tag) {
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.cond_jmp_above_below => 0x87,
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.cond_set_byte_greater_less => 0x97,
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else => unreachable,
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},
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.b => return switch (tag) {
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.cond_jmp_above_below => 0x82,
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.cond_set_byte_greater_less => 0x92,
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else => unreachable,
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},
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.be => return switch (tag) {
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.cond_jmp_above_below => 0x86,
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.cond_set_byte_greater_less => 0x96,
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else => unreachable,
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},
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.eq => return switch (tag) {
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.cond_jmp_eq_ne => 0x84,
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.cond_set_byte_eq_ne => 0x94,
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else => unreachable,
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},
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.ne => return switch (tag) {
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.cond_jmp_eq_ne => 0x85,
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.cond_set_byte_eq_ne => 0x95,
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else => unreachable,
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},
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}
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}
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fn mirCondJmp(print: *const Print, tag: Mir.Inst.Tag, inst: Mir.Inst.Index, w: anytype) !void {
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_ = w; // TODO
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const ops = Mir.Ops.decode(print.mir.instructions.items(.ops)[inst]);
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const target = print.mir.instructions.items(.data)[inst].inst;
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const cond = CondType.fromTagAndFlags(tag, ops.flags);
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const opc = getCondOpCode(tag, cond);
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const source = print.code.items.len;
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const encoder = try Encoder.init(print.code, 6);
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encoder.opcode_2byte(0x0f, opc);
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try print.relocs.append(print.bin_file.allocator, .{
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.source = source,
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.target = target,
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.offset = print.code.items.len,
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.length = 6,
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});
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encoder.imm32(0);
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_ = print;
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_ = tag;
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_ = inst;
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try w.writeAll("TODO print mirCondJmp\n");
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}
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fn mirCondSetByte(print: *const Print, tag: Mir.Inst.Tag, inst: Mir.Inst.Index, w: anytype) !void {
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_ = w; // TODO
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const ops = Mir.Ops.decode(print.mir.instructions.items(.ops)[inst]);
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const cond = CondType.fromTagAndFlags(tag, ops.flags);
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const opc = getCondOpCode(tag, cond);
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const encoder = try Encoder.init(print.code, 4);
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encoder.rex(.{
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.w = true,
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.b = ops.reg1.isExtended(),
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});
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encoder.opcode_2byte(0x0f, opc);
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encoder.modRm_direct(0x0, ops.reg1.lowId());
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_ = tag;
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_ = inst;
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_ = print;
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try w.writeAll("TODO print mirCondSetByte\n");
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}
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fn mirTest(print: *const Print, inst: Mir.Inst.Index, w: anytype) !void {
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_ = w; // TODO
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const tag = print.mir.instructions.items(.tag)[inst];
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assert(tag == .@"test");
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const ops = Mir.Ops.decode(print.mir.instructions.items(.ops)[inst]);
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switch (ops.flags) {
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0b00 => blk: {
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if (ops.reg2 == .none) {
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// TEST r/m64, imm32
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const imm = print.mir.instructions.items(.data)[inst].imm;
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if (ops.reg1.to64() == .rax) {
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// TODO reduce the size of the instruction if the immediate
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// is smaller than 32 bits
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const encoder = try Encoder.init(print.code, 6);
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encoder.rex(.{
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.w = true,
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});
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encoder.opcode_1byte(0xa9);
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encoder.imm32(imm);
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break :blk;
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}
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const opc: u8 = if (ops.reg1.size() == 8) 0xf6 else 0xf7;
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const encoder = try Encoder.init(print.code, 7);
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encoder.rex(.{
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.w = true,
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.b = ops.reg1.isExtended(),
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});
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encoder.opcode_1byte(opc);
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encoder.modRm_direct(0, ops.reg1.lowId());
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encoder.imm8(@intCast(i8, imm));
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break :blk;
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}
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// TEST r/m64, r64
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return print.fail("TODO TEST r/m64, r64", .{});
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},
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else => return print.fail("TODO more TEST alternatives", .{}),
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}
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}
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const EncType = enum {
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/// OP r/m64, imm32
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mi,
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/// OP r/m64, r64
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mr,
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/// OP r64, r/m64
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rm,
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};
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const OpCode = struct {
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opc: u8,
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/// Only used if `EncType == .mi`.
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modrm_ext: u3,
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};
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inline fn getArithOpCode(tag: Mir.Inst.Tag, enc: EncType) OpCode {
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switch (enc) {
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.mi => return switch (tag) {
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.adc => .{ .opc = 0x81, .modrm_ext = 0x2 },
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.add => .{ .opc = 0x81, .modrm_ext = 0x0 },
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.sub => .{ .opc = 0x81, .modrm_ext = 0x5 },
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.xor => .{ .opc = 0x81, .modrm_ext = 0x6 },
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.@"and" => .{ .opc = 0x81, .modrm_ext = 0x4 },
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.@"or" => .{ .opc = 0x81, .modrm_ext = 0x1 },
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.sbb => .{ .opc = 0x81, .modrm_ext = 0x3 },
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.cmp => .{ .opc = 0x81, .modrm_ext = 0x7 },
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.mov => .{ .opc = 0xc7, .modrm_ext = 0x0 },
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else => unreachable,
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},
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.mr => {
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const opc: u8 = switch (tag) {
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.adc => 0x11,
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.add => 0x01,
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.sub => 0x29,
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.xor => 0x31,
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.@"and" => 0x21,
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.@"or" => 0x09,
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.sbb => 0x19,
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.cmp => 0x39,
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.mov => 0x89,
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else => unreachable,
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};
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return .{ .opc = opc, .modrm_ext = undefined };
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},
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.rm => {
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const opc: u8 = switch (tag) {
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.adc => 0x13,
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.add => 0x03,
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.sub => 0x2b,
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.xor => 0x33,
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.@"and" => 0x23,
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.@"or" => 0x0b,
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.sbb => 0x1b,
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.cmp => 0x3b,
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.mov => 0x8b,
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else => unreachable,
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};
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return .{ .opc = opc, .modrm_ext = undefined };
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},
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}
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_ = print;
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_ = inst;
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try w.writeAll("TODO print mirTest\n");
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}
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fn mirArith(print: *const Print, tag: Mir.Inst.Tag, inst: Mir.Inst.Index, w: anytype) !void {
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@ -473,36 +244,61 @@ fn mirArith(print: *const Print, tag: Mir.Inst.Tag, inst: Mir.Inst.Index, w: any
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0b01 => {
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const imm = print.mir.instructions.items(.data)[inst].imm;
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if (ops.reg2 == .none) {
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try w.print("{s}, [ds:{d}]", .{ @tagName(ops.reg1), imm });
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try w.print("{s}, ", .{@tagName(ops.reg1)});
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switch (ops.reg1.size()) {
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8 => try w.print("byte ptr ", .{}),
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16 => try w.print("word ptr ", .{}),
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32 => try w.print("dword ptr ", .{}),
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64 => try w.print("qword ptr ", .{}),
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else => unreachable,
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}
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try w.print("[ds:{d}]", .{imm});
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} else {
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try w.print("{s}, [{s} + {d}]", .{ @tagName(ops.reg1), @tagName(ops.reg2), imm });
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try w.print("{s}, ", .{@tagName(ops.reg1)});
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switch (ops.reg1.size()) {
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8 => try w.print("byte ptr ", .{}),
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16 => try w.print("word ptr ", .{}),
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32 => try w.print("dword ptr ", .{}),
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64 => try w.print("qword ptr ", .{}),
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else => unreachable,
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}
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try w.print("[{s} + {d}]", .{ @tagName(ops.reg2), imm });
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}
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},
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0b10 => {
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const imm = print.mir.instructions.items(.data)[inst].imm;
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if (ops.reg2 == .none) {
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try w.print("[{s} + 0], {d}", .{ @tagName(ops.reg1), imm });
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try w.writeAll("unused variant");
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} else {
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switch (ops.reg2.size()) {
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8 => try w.print("byte ptr ", .{}),
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16 => try w.print("word ptr ", .{}),
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32 => try w.print("dword ptr ", .{}),
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64 => try w.print("qword ptr ", .{}),
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else => unreachable,
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}
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try w.print("[{s} + {d}], {s}", .{ @tagName(ops.reg1), imm, @tagName(ops.reg2) });
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}
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},
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0b11 => {
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if (ops.reg2 == .none) {
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const payload = print.mir.instructions.items(.data)[inst].payload;
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const imm_pair = print.mir.extraData(Mir.ImmPair, payload).data;
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try w.print("[{s} + {d}], {d}", .{ @tagName(ops.reg1), imm_pair.dest_off, imm_pair.operand });
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}
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try w.writeAll("TODO");
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try w.writeAll("unused variant");
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},
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}
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try w.writeByte('\n');
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}
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fn mirArithMemImm(print: *const Print, tag: Mir.Inst.Tag, inst: Mir.Inst.Index, w: anytype) !void {
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_ = print;
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_ = tag;
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_ = inst;
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return w.writeAll("TODO mirArithMemImm\n");
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const ops = Mir.Ops.decode(print.mir.instructions.items(.ops)[inst]);
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const payload = print.mir.instructions.items(.data)[inst].payload;
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const imm_pair = print.mir.extraData(Mir.ImmPair, payload).data;
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try w.print("{s} ", .{@tagName(tag)});
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switch (ops.flags) {
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0b00 => try w.print("byte ptr ", .{}),
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0b01 => try w.print("word ptr ", .{}),
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0b10 => try w.print("dword ptr ", .{}),
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0b11 => try w.print("qword ptr ", .{}),
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}
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try w.print("[{s} + {d}], {d}\n", .{ @tagName(ops.reg1), imm_pair.dest_off, imm_pair.operand });
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}
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fn mirArithScaleSrc(print: *const Print, tag: Mir.Inst.Tag, inst: Mir.Inst.Index, w: anytype) !void {
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@ -575,16 +371,57 @@ fn mirIMulComplex(print: *const Print, inst: Mir.Inst.Index, w: anytype) !void {
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}
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fn mirLea(print: *const Print, inst: Mir.Inst.Index, w: anytype) !void {
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_ = print;
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_ = inst;
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return w.writeAll("TODO lea\n");
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// const tag = print.mir.instructions.items(.tag)[inst];
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// assert(tag == .lea);
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// const ops = Mir.Ops.decode(print.mir.instructions.items(.ops)[inst]);
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// assert(ops.flags == 0b01);
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// const imm = print.mir.instructions.items(.data)[inst].imm;
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// try w.print("lea {s} [{s} + {d}]\n", .{ @tagName(ops.reg1), @tagName(ops.reg2), imm });
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const ops = Mir.Ops.decode(print.mir.instructions.items(.ops)[inst]);
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try w.writeAll("lea ");
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switch (ops.flags) {
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0b00 => {
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const imm = print.mir.instructions.items(.data)[inst].imm;
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try w.print("{s} [", .{@tagName(ops.reg1)});
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if (ops.reg2 != .none) {
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try w.print("{s} + ", .{@tagName(ops.reg2)});
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} else {
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try w.print("ds:", .{});
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}
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try w.print("{d}]\n", .{imm});
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},
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0b01 => {
|
||||
try w.print("{s}, ", .{@tagName(ops.reg1)});
|
||||
switch (ops.reg1.size()) {
|
||||
8 => try w.print("byte ptr ", .{}),
|
||||
16 => try w.print("word ptr ", .{}),
|
||||
32 => try w.print("dword ptr ", .{}),
|
||||
64 => try w.print("qword ptr ", .{}),
|
||||
else => unreachable,
|
||||
}
|
||||
try w.print("[rip + 0x0] ", .{});
|
||||
const payload = print.mir.instructions.items(.data)[inst].payload;
|
||||
const imm = print.mir.extraData(Mir.Imm64, payload).data.decode();
|
||||
try w.print("target@{x}", .{imm});
|
||||
},
|
||||
0b10 => {
|
||||
try w.print("{s}, ", .{@tagName(ops.reg1)});
|
||||
switch (ops.reg1.size()) {
|
||||
8 => try w.print("byte ptr ", .{}),
|
||||
16 => try w.print("word ptr ", .{}),
|
||||
32 => try w.print("dword ptr ", .{}),
|
||||
64 => try w.print("qword ptr ", .{}),
|
||||
else => unreachable,
|
||||
}
|
||||
try w.print("[rip + 0x0] ", .{});
|
||||
const got_entry = print.mir.instructions.items(.data)[inst].got_entry;
|
||||
if (print.bin_file.cast(link.File.MachO)) |macho_file| {
|
||||
const target = macho_file.locals.items[got_entry];
|
||||
const target_name = macho_file.getString(target.n_strx);
|
||||
try w.print("target@{s}", .{target_name});
|
||||
} else {
|
||||
try w.writeAll("TODO lea reg, [rip + reloc] for linking backends different than MachO");
|
||||
}
|
||||
},
|
||||
0b11 => {
|
||||
try w.writeAll("unused variant\n");
|
||||
},
|
||||
}
|
||||
try w.writeAll("\n");
|
||||
}
|
||||
|
||||
fn mirCallExtern(print: *const Print, inst: Mir.Inst.Index, w: anytype) !void {
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user