mirror of
https://github.com/ziglang/zig.git
synced 2026-02-21 16:54:52 +00:00
Merge pull request #4509 from ziglang/sub-architecture-annihilation
sub-architecture annihilation
This commit is contained in:
Andrew Kelley
GitHub
commit
10e0b07135
@ -1909,43 +1909,33 @@ pub const LibExeObjStep = struct {
|
||||
try zig_args.append(self.target.zigTriple(builder.allocator) catch unreachable);
|
||||
|
||||
const all_features = self.target.getArch().allFeaturesList();
|
||||
var populated_cpu_features = cross.cpu_features.cpu.features;
|
||||
if (self.target.getArch().subArchFeature()) |sub_arch_index| {
|
||||
populated_cpu_features.addFeature(sub_arch_index);
|
||||
}
|
||||
var populated_cpu_features = cross.cpu.model.features;
|
||||
populated_cpu_features.populateDependencies(all_features);
|
||||
|
||||
if (populated_cpu_features.eql(cross.cpu_features.features)) {
|
||||
if (populated_cpu_features.eql(cross.cpu.features)) {
|
||||
// The CPU name alone is sufficient.
|
||||
// If it is the baseline CPU, no command line args are required.
|
||||
if (cross.cpu_features.cpu != self.target.getArch().getBaselineCpuFeatures().cpu) {
|
||||
try zig_args.append("-target-cpu");
|
||||
try zig_args.append(cross.cpu_features.cpu.name);
|
||||
if (cross.cpu.model != Target.Cpu.baseline(self.target.getArch()).model) {
|
||||
try zig_args.append("-mcpu");
|
||||
try zig_args.append(cross.cpu.model.name);
|
||||
}
|
||||
} else {
|
||||
try zig_args.append("-target-cpu");
|
||||
try zig_args.append(cross.cpu_features.cpu.name);
|
||||
var mcpu_buffer = try std.Buffer.init(builder.allocator, "-mcpu=");
|
||||
try mcpu_buffer.append(cross.cpu.model.name);
|
||||
|
||||
try zig_args.append("-target-feature");
|
||||
var feature_str_buffer = try std.Buffer.initSize(builder.allocator, 0);
|
||||
for (all_features) |feature, i_usize| {
|
||||
const i = @intCast(Target.Cpu.Feature.Set.Index, i_usize);
|
||||
const in_cpu_set = populated_cpu_features.isEnabled(i);
|
||||
const in_actual_set = cross.cpu_features.features.isEnabled(i);
|
||||
const in_actual_set = cross.cpu.features.isEnabled(i);
|
||||
if (in_cpu_set and !in_actual_set) {
|
||||
try feature_str_buffer.appendByte('-');
|
||||
try feature_str_buffer.append(feature.name);
|
||||
try feature_str_buffer.appendByte(',');
|
||||
try mcpu_buffer.appendByte('-');
|
||||
try mcpu_buffer.append(feature.name);
|
||||
} else if (!in_cpu_set and in_actual_set) {
|
||||
try feature_str_buffer.appendByte('+');
|
||||
try feature_str_buffer.append(feature.name);
|
||||
try feature_str_buffer.appendByte(',');
|
||||
try mcpu_buffer.appendByte('+');
|
||||
try mcpu_buffer.append(feature.name);
|
||||
}
|
||||
}
|
||||
if (mem.endsWith(u8, feature_str_buffer.toSliceConst(), ",")) {
|
||||
feature_str_buffer.shrink(feature_str_buffer.len() - 1);
|
||||
}
|
||||
try zig_args.append(feature_str_buffer.toSliceConst());
|
||||
try zig_args.append(mcpu_buffer.toSliceConst());
|
||||
}
|
||||
},
|
||||
}
|
||||
|
||||
@ -6,8 +6,8 @@ pub const Target = std.Target;
|
||||
/// Deprecated: use `std.Target.Os`.
|
||||
pub const Os = std.Target.Os;
|
||||
|
||||
/// Deprecated: use `std.Target.Arch`.
|
||||
pub const Arch = std.Target.Arch;
|
||||
/// Deprecated: use `std.Target.Cpu.Arch`.
|
||||
pub const Arch = std.Target.Cpu.Arch;
|
||||
|
||||
/// Deprecated: use `std.Target.Abi`.
|
||||
pub const Abi = std.Target.Abi;
|
||||
@ -18,9 +18,6 @@ pub const ObjectFormat = std.Target.ObjectFormat;
|
||||
/// Deprecated: use `std.Target.SubSystem`.
|
||||
pub const SubSystem = std.Target.SubSystem;
|
||||
|
||||
/// Deprecated: use `std.Target.CpuFeatures`.
|
||||
pub const CpuFeatures = std.Target.CpuFeatures;
|
||||
|
||||
/// Deprecated: use `std.Target.Cpu`.
|
||||
pub const Cpu = std.Target.Cpu;
|
||||
|
||||
|
||||
@ -152,7 +152,7 @@ pub fn setThreadPointer(addr: usize) void {
|
||||
: [addr] "r" (addr)
|
||||
);
|
||||
},
|
||||
.arm => |arm| {
|
||||
.arm => {
|
||||
const rc = std.os.linux.syscall1(std.os.linux.SYS_set_tls, addr);
|
||||
assert(rc == 0);
|
||||
},
|
||||
|
||||
1232
lib/std/target.zig
1232
lib/std/target.zig
File diff suppressed because it is too large
Load Diff
@ -1,14 +1,8 @@
|
||||
const std = @import("../std.zig");
|
||||
const Cpu = std.Target.Cpu;
|
||||
const CpuFeature = std.Target.Cpu.Feature;
|
||||
const CpuModel = std.Target.Cpu.Model;
|
||||
|
||||
pub const Feature = enum {
|
||||
a35,
|
||||
a53,
|
||||
a55,
|
||||
a57,
|
||||
a72,
|
||||
a73,
|
||||
a75,
|
||||
a76,
|
||||
aes,
|
||||
aggressive_fma,
|
||||
@ -40,11 +34,7 @@ pub const Feature = enum {
|
||||
dit,
|
||||
dotprod,
|
||||
exynos_cheap_as_move,
|
||||
exynosm1,
|
||||
exynosm2,
|
||||
exynosm3,
|
||||
exynosm4,
|
||||
falkor,
|
||||
fmi,
|
||||
force_32bit_jump_tables,
|
||||
fp_armv8,
|
||||
@ -58,7 +48,6 @@ pub const Feature = enum {
|
||||
fuse_csel,
|
||||
fuse_literals,
|
||||
jsconv,
|
||||
kryo,
|
||||
lor,
|
||||
lse,
|
||||
lsl_fast,
|
||||
@ -103,7 +92,6 @@ pub const Feature = enum {
|
||||
reserve_x6,
|
||||
reserve_x7,
|
||||
reserve_x9,
|
||||
saphira,
|
||||
sb,
|
||||
sel2,
|
||||
sha2,
|
||||
@ -122,17 +110,11 @@ pub const Feature = enum {
|
||||
sve2_bitperm,
|
||||
sve2_sha3,
|
||||
sve2_sm4,
|
||||
thunderx,
|
||||
thunderx2t99,
|
||||
thunderxt81,
|
||||
thunderxt83,
|
||||
thunderxt88,
|
||||
tlb_rmi,
|
||||
tpidr_el1,
|
||||
tpidr_el2,
|
||||
tpidr_el3,
|
||||
tracev8_4,
|
||||
tsv110,
|
||||
uaops,
|
||||
use_aa,
|
||||
use_postra_scheduler,
|
||||
@ -151,120 +133,20 @@ pub const Feature = enum {
|
||||
zcz_gp,
|
||||
};
|
||||
|
||||
pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
|
||||
pub usingnamespace CpuFeature.feature_set_fns(Feature);
|
||||
|
||||
pub const all_features = blk: {
|
||||
@setEvalBranchQuota(2000);
|
||||
const len = @typeInfo(Feature).Enum.fields.len;
|
||||
std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
|
||||
var result: [len]Cpu.Feature = undefined;
|
||||
result[@enumToInt(Feature.a35)] = .{
|
||||
.llvm_name = "a35",
|
||||
.description = "Cortex-A35 ARM processors",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.crc,
|
||||
.crypto,
|
||||
.fp_armv8,
|
||||
.neon,
|
||||
.perfmon,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.a53)] = .{
|
||||
.llvm_name = "a53",
|
||||
.description = "Cortex-A53 ARM processors",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.balance_fp_ops,
|
||||
.crc,
|
||||
.crypto,
|
||||
.custom_cheap_as_move,
|
||||
.fp_armv8,
|
||||
.fuse_aes,
|
||||
.neon,
|
||||
.perfmon,
|
||||
.use_aa,
|
||||
.use_postra_scheduler,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.a55)] = .{
|
||||
.llvm_name = "a55",
|
||||
.description = "Cortex-A55 ARM processors",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.crypto,
|
||||
.dotprod,
|
||||
.fp_armv8,
|
||||
.fullfp16,
|
||||
.fuse_aes,
|
||||
.neon,
|
||||
.perfmon,
|
||||
.rcpc,
|
||||
.v8_2a,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.a57)] = .{
|
||||
.llvm_name = "a57",
|
||||
.description = "Cortex-A57 ARM processors",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.balance_fp_ops,
|
||||
.crc,
|
||||
.crypto,
|
||||
.custom_cheap_as_move,
|
||||
.fp_armv8,
|
||||
.fuse_aes,
|
||||
.fuse_literals,
|
||||
.neon,
|
||||
.perfmon,
|
||||
.predictable_select_expensive,
|
||||
.use_postra_scheduler,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.a72)] = .{
|
||||
.llvm_name = "a72",
|
||||
.description = "Cortex-A72 ARM processors",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.crc,
|
||||
.crypto,
|
||||
.fp_armv8,
|
||||
.fuse_aes,
|
||||
.neon,
|
||||
.perfmon,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.a73)] = .{
|
||||
.llvm_name = "a73",
|
||||
.description = "Cortex-A73 ARM processors",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.crc,
|
||||
.crypto,
|
||||
.fp_armv8,
|
||||
.fuse_aes,
|
||||
.neon,
|
||||
.perfmon,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.a75)] = .{
|
||||
.llvm_name = "a75",
|
||||
.description = "Cortex-A75 ARM processors",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.crypto,
|
||||
.dotprod,
|
||||
.fp_armv8,
|
||||
.fullfp16,
|
||||
.fuse_aes,
|
||||
.neon,
|
||||
.perfmon,
|
||||
.rcpc,
|
||||
.v8_2a,
|
||||
}),
|
||||
};
|
||||
std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
|
||||
var result: [len]CpuFeature = undefined;
|
||||
result[@enumToInt(Feature.a76)] = .{
|
||||
.llvm_name = "a76",
|
||||
.description = "Cortex-A76 ARM processors",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.crypto,
|
||||
.dotprod,
|
||||
.fp_armv8,
|
||||
.fullfp16,
|
||||
.neon,
|
||||
.rcpc,
|
||||
.ssbs,
|
||||
.v8_2a,
|
||||
@ -412,11 +294,10 @@ pub const all_features = blk: {
|
||||
.arith_cbz_fusion,
|
||||
.crypto,
|
||||
.disable_latency_sched_heuristic,
|
||||
.fp_armv8,
|
||||
.fuse_aes,
|
||||
.fuse_crypto_eor,
|
||||
.neon,
|
||||
.perfmon,
|
||||
.v8a,
|
||||
.zcm,
|
||||
.zcz,
|
||||
.zcz_fp_workaround,
|
||||
@ -444,58 +325,6 @@ pub const all_features = blk: {
|
||||
.custom_cheap_as_move,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.exynosm1)] = .{
|
||||
.llvm_name = "exynosm1",
|
||||
.description = "Samsung Exynos-M1 processors",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.crc,
|
||||
.crypto,
|
||||
.exynos_cheap_as_move,
|
||||
.force_32bit_jump_tables,
|
||||
.fuse_aes,
|
||||
.perfmon,
|
||||
.slow_misaligned_128store,
|
||||
.slow_paired_128,
|
||||
.use_postra_scheduler,
|
||||
.use_reciprocal_square_root,
|
||||
.zcz_fp,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.exynosm2)] = .{
|
||||
.llvm_name = "exynosm2",
|
||||
.description = "Samsung Exynos-M2 processors",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.crc,
|
||||
.crypto,
|
||||
.exynos_cheap_as_move,
|
||||
.force_32bit_jump_tables,
|
||||
.fuse_aes,
|
||||
.perfmon,
|
||||
.slow_misaligned_128store,
|
||||
.slow_paired_128,
|
||||
.use_postra_scheduler,
|
||||
.zcz_fp,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.exynosm3)] = .{
|
||||
.llvm_name = "exynosm3",
|
||||
.description = "Samsung Exynos-M3 processors",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.crc,
|
||||
.crypto,
|
||||
.exynos_cheap_as_move,
|
||||
.force_32bit_jump_tables,
|
||||
.fuse_address,
|
||||
.fuse_aes,
|
||||
.fuse_csel,
|
||||
.fuse_literals,
|
||||
.lsl_fast,
|
||||
.perfmon,
|
||||
.predictable_select_expensive,
|
||||
.use_postra_scheduler,
|
||||
.zcz_fp,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.exynosm4)] = .{
|
||||
.llvm_name = "exynosm4",
|
||||
.description = "Samsung Exynos-M4 processors",
|
||||
@ -519,24 +348,6 @@ pub const all_features = blk: {
|
||||
.zcz,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.falkor)] = .{
|
||||
.llvm_name = "falkor",
|
||||
.description = "Qualcomm Falkor processors",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.crc,
|
||||
.crypto,
|
||||
.custom_cheap_as_move,
|
||||
.fp_armv8,
|
||||
.lsl_fast,
|
||||
.neon,
|
||||
.perfmon,
|
||||
.predictable_select_expensive,
|
||||
.rdm,
|
||||
.slow_strqro_store,
|
||||
.use_postra_scheduler,
|
||||
.zcz,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.fmi)] = .{
|
||||
.llvm_name = "fmi",
|
||||
.description = "Enable v8.4-A Flag Manipulation Instructions",
|
||||
@ -608,22 +419,6 @@ pub const all_features = blk: {
|
||||
.fp_armv8,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.kryo)] = .{
|
||||
.llvm_name = "kryo",
|
||||
.description = "Qualcomm Kryo processors",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.crc,
|
||||
.crypto,
|
||||
.custom_cheap_as_move,
|
||||
.fp_armv8,
|
||||
.lsl_fast,
|
||||
.neon,
|
||||
.perfmon,
|
||||
.predictable_select_expensive,
|
||||
.use_postra_scheduler,
|
||||
.zcz,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.lor)] = .{
|
||||
.llvm_name = "lor",
|
||||
.description = "Enables ARM v8.1 Limited Ordering Regions extension",
|
||||
@ -852,23 +647,6 @@ pub const all_features = blk: {
|
||||
.description = "Reserve X9, making it unavailable as a GPR",
|
||||
.dependencies = featureSet(&[_]Feature{}),
|
||||
};
|
||||
result[@enumToInt(Feature.saphira)] = .{
|
||||
.llvm_name = "saphira",
|
||||
.description = "Qualcomm Saphira processors",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.crypto,
|
||||
.custom_cheap_as_move,
|
||||
.fp_armv8,
|
||||
.lsl_fast,
|
||||
.neon,
|
||||
.perfmon,
|
||||
.predictable_select_expensive,
|
||||
.spe,
|
||||
.use_postra_scheduler,
|
||||
.v8_4a,
|
||||
.zcz,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.sb)] = .{
|
||||
.llvm_name = "sb",
|
||||
.description = "Enable v8.5 Speculation Barrier",
|
||||
@ -979,74 +757,6 @@ pub const all_features = blk: {
|
||||
.sve2,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.thunderx)] = .{
|
||||
.llvm_name = "thunderx",
|
||||
.description = "Cavium ThunderX processors",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.crc,
|
||||
.crypto,
|
||||
.fp_armv8,
|
||||
.neon,
|
||||
.perfmon,
|
||||
.predictable_select_expensive,
|
||||
.use_postra_scheduler,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.thunderx2t99)] = .{
|
||||
.llvm_name = "thunderx2t99",
|
||||
.description = "Cavium ThunderX2 processors",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.aggressive_fma,
|
||||
.arith_bcc_fusion,
|
||||
.crc,
|
||||
.crypto,
|
||||
.fp_armv8,
|
||||
.lse,
|
||||
.neon,
|
||||
.predictable_select_expensive,
|
||||
.use_postra_scheduler,
|
||||
.v8_1a,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.thunderxt81)] = .{
|
||||
.llvm_name = "thunderxt81",
|
||||
.description = "Cavium ThunderX processors",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.crc,
|
||||
.crypto,
|
||||
.fp_armv8,
|
||||
.neon,
|
||||
.perfmon,
|
||||
.predictable_select_expensive,
|
||||
.use_postra_scheduler,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.thunderxt83)] = .{
|
||||
.llvm_name = "thunderxt83",
|
||||
.description = "Cavium ThunderX processors",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.crc,
|
||||
.crypto,
|
||||
.fp_armv8,
|
||||
.neon,
|
||||
.perfmon,
|
||||
.predictable_select_expensive,
|
||||
.use_postra_scheduler,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.thunderxt88)] = .{
|
||||
.llvm_name = "thunderxt88",
|
||||
.description = "Cavium ThunderX processors",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.crc,
|
||||
.crypto,
|
||||
.fp_armv8,
|
||||
.neon,
|
||||
.perfmon,
|
||||
.predictable_select_expensive,
|
||||
.use_postra_scheduler,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.tlb_rmi)] = .{
|
||||
.llvm_name = "tlb-rmi",
|
||||
.description = "Enable v8.4-A TLB Range and Maintenance Instructions",
|
||||
@ -1072,24 +782,6 @@ pub const all_features = blk: {
|
||||
.description = "Enable v8.4-A Trace extension",
|
||||
.dependencies = featureSet(&[_]Feature{}),
|
||||
};
|
||||
result[@enumToInt(Feature.tsv110)] = .{
|
||||
.llvm_name = "tsv110",
|
||||
.description = "HiSilicon TS-V110 processors",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.crypto,
|
||||
.custom_cheap_as_move,
|
||||
.dotprod,
|
||||
.fp_armv8,
|
||||
.fp16fml,
|
||||
.fullfp16,
|
||||
.fuse_aes,
|
||||
.neon,
|
||||
.perfmon,
|
||||
.spe,
|
||||
.use_postra_scheduler,
|
||||
.v8_2a,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.uaops)] = .{
|
||||
.llvm_name = "uaops",
|
||||
.description = "Enable v8.2 UAO PState",
|
||||
@ -1229,190 +921,325 @@ pub const all_features = blk: {
|
||||
};
|
||||
|
||||
pub const cpu = struct {
|
||||
pub const apple_latest = Cpu{
|
||||
pub const apple_latest = CpuModel{
|
||||
.name = "apple_latest",
|
||||
.llvm_name = "apple-latest",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.cyclone,
|
||||
}),
|
||||
};
|
||||
pub const cortex_a35 = Cpu{
|
||||
pub const cortex_a35 = CpuModel{
|
||||
.name = "cortex_a35",
|
||||
.llvm_name = "cortex-a35",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.a35,
|
||||
.crc,
|
||||
.crypto,
|
||||
.perfmon,
|
||||
.v8a,
|
||||
}),
|
||||
};
|
||||
pub const cortex_a53 = Cpu{
|
||||
pub const cortex_a53 = CpuModel{
|
||||
.name = "cortex_a53",
|
||||
.llvm_name = "cortex-a53",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.a53,
|
||||
.balance_fp_ops,
|
||||
.crc,
|
||||
.crypto,
|
||||
.custom_cheap_as_move,
|
||||
.fuse_aes,
|
||||
.perfmon,
|
||||
.use_aa,
|
||||
.use_postra_scheduler,
|
||||
.v8a,
|
||||
}),
|
||||
};
|
||||
pub const cortex_a55 = Cpu{
|
||||
pub const cortex_a55 = CpuModel{
|
||||
.name = "cortex_a55",
|
||||
.llvm_name = "cortex-a55",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.a55,
|
||||
.crypto,
|
||||
.dotprod,
|
||||
.fullfp16,
|
||||
.fuse_aes,
|
||||
.perfmon,
|
||||
.rcpc,
|
||||
.v8_2a,
|
||||
}),
|
||||
};
|
||||
pub const cortex_a57 = Cpu{
|
||||
pub const cortex_a57 = CpuModel{
|
||||
.name = "cortex_a57",
|
||||
.llvm_name = "cortex-a57",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.a57,
|
||||
.balance_fp_ops,
|
||||
.crc,
|
||||
.crypto,
|
||||
.custom_cheap_as_move,
|
||||
.fuse_aes,
|
||||
.fuse_literals,
|
||||
.perfmon,
|
||||
.predictable_select_expensive,
|
||||
.use_postra_scheduler,
|
||||
.v8a,
|
||||
}),
|
||||
};
|
||||
pub const cortex_a72 = Cpu{
|
||||
pub const cortex_a72 = CpuModel{
|
||||
.name = "cortex_a72",
|
||||
.llvm_name = "cortex-a72",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.a72,
|
||||
.crc,
|
||||
.crypto,
|
||||
.fuse_aes,
|
||||
.perfmon,
|
||||
.v8a,
|
||||
}),
|
||||
};
|
||||
pub const cortex_a73 = Cpu{
|
||||
pub const cortex_a73 = CpuModel{
|
||||
.name = "cortex_a73",
|
||||
.llvm_name = "cortex-a73",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.a73,
|
||||
.crc,
|
||||
.crypto,
|
||||
.fuse_aes,
|
||||
.perfmon,
|
||||
.v8a,
|
||||
}),
|
||||
};
|
||||
pub const cortex_a75 = Cpu{
|
||||
pub const cortex_a75 = CpuModel{
|
||||
.name = "cortex_a75",
|
||||
.llvm_name = "cortex-a75",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.a75,
|
||||
.crypto,
|
||||
.dotprod,
|
||||
.fullfp16,
|
||||
.fuse_aes,
|
||||
.perfmon,
|
||||
.rcpc,
|
||||
.v8_2a,
|
||||
}),
|
||||
};
|
||||
pub const cortex_a76 = Cpu{
|
||||
pub const cortex_a76 = CpuModel{
|
||||
.name = "cortex_a76",
|
||||
.llvm_name = "cortex-a76",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.a76,
|
||||
}),
|
||||
};
|
||||
pub const cortex_a76ae = Cpu{
|
||||
pub const cortex_a76ae = CpuModel{
|
||||
.name = "cortex_a76ae",
|
||||
.llvm_name = "cortex-a76ae",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.a76,
|
||||
}),
|
||||
};
|
||||
pub const cyclone = Cpu{
|
||||
pub const cyclone = CpuModel{
|
||||
.name = "cyclone",
|
||||
.llvm_name = "cyclone",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.cyclone,
|
||||
}),
|
||||
};
|
||||
pub const exynos_m1 = Cpu{
|
||||
pub const exynos_m1 = CpuModel{
|
||||
.name = "exynos_m1",
|
||||
.llvm_name = "exynos-m1",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.exynosm1,
|
||||
.crc,
|
||||
.crypto,
|
||||
.exynos_cheap_as_move,
|
||||
.force_32bit_jump_tables,
|
||||
.fuse_aes,
|
||||
.perfmon,
|
||||
.slow_misaligned_128store,
|
||||
.slow_paired_128,
|
||||
.use_postra_scheduler,
|
||||
.use_reciprocal_square_root,
|
||||
.v8a,
|
||||
.zcz_fp,
|
||||
}),
|
||||
};
|
||||
pub const exynos_m2 = Cpu{
|
||||
pub const exynos_m2 = CpuModel{
|
||||
.name = "exynos_m2",
|
||||
.llvm_name = "exynos-m2",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.exynosm2,
|
||||
.crc,
|
||||
.crypto,
|
||||
.exynos_cheap_as_move,
|
||||
.force_32bit_jump_tables,
|
||||
.fuse_aes,
|
||||
.perfmon,
|
||||
.slow_misaligned_128store,
|
||||
.slow_paired_128,
|
||||
.use_postra_scheduler,
|
||||
.v8a,
|
||||
.zcz_fp,
|
||||
}),
|
||||
};
|
||||
pub const exynos_m3 = Cpu{
|
||||
pub const exynos_m3 = CpuModel{
|
||||
.name = "exynos_m3",
|
||||
.llvm_name = "exynos-m3",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.exynosm3,
|
||||
.crc,
|
||||
.crypto,
|
||||
.exynos_cheap_as_move,
|
||||
.force_32bit_jump_tables,
|
||||
.fuse_address,
|
||||
.fuse_aes,
|
||||
.fuse_csel,
|
||||
.fuse_literals,
|
||||
.lsl_fast,
|
||||
.perfmon,
|
||||
.predictable_select_expensive,
|
||||
.use_postra_scheduler,
|
||||
.v8a,
|
||||
.zcz_fp,
|
||||
}),
|
||||
};
|
||||
pub const exynos_m4 = Cpu{
|
||||
pub const exynos_m4 = CpuModel{
|
||||
.name = "exynos_m4",
|
||||
.llvm_name = "exynos-m4",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.exynosm4,
|
||||
}),
|
||||
};
|
||||
pub const exynos_m5 = Cpu{
|
||||
pub const exynos_m5 = CpuModel{
|
||||
.name = "exynos_m5",
|
||||
.llvm_name = "exynos-m5",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.exynosm4,
|
||||
}),
|
||||
};
|
||||
pub const falkor = Cpu{
|
||||
pub const falkor = CpuModel{
|
||||
.name = "falkor",
|
||||
.llvm_name = "falkor",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.falkor,
|
||||
.crc,
|
||||
.crypto,
|
||||
.custom_cheap_as_move,
|
||||
.lsl_fast,
|
||||
.perfmon,
|
||||
.predictable_select_expensive,
|
||||
.rdm,
|
||||
.slow_strqro_store,
|
||||
.use_postra_scheduler,
|
||||
.v8a,
|
||||
.zcz,
|
||||
}),
|
||||
};
|
||||
pub const generic = Cpu{
|
||||
pub const generic = CpuModel{
|
||||
.name = "generic",
|
||||
.llvm_name = "generic",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.fp_armv8,
|
||||
.fuse_aes,
|
||||
.neon,
|
||||
.perfmon,
|
||||
.use_postra_scheduler,
|
||||
.v8a,
|
||||
}),
|
||||
};
|
||||
pub const kryo = Cpu{
|
||||
pub const kryo = CpuModel{
|
||||
.name = "kryo",
|
||||
.llvm_name = "kryo",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.kryo,
|
||||
.crc,
|
||||
.crypto,
|
||||
.custom_cheap_as_move,
|
||||
.lsl_fast,
|
||||
.perfmon,
|
||||
.predictable_select_expensive,
|
||||
.use_postra_scheduler,
|
||||
.zcz,
|
||||
.v8a,
|
||||
}),
|
||||
};
|
||||
pub const saphira = Cpu{
|
||||
pub const saphira = CpuModel{
|
||||
.name = "saphira",
|
||||
.llvm_name = "saphira",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.saphira,
|
||||
.crypto,
|
||||
.custom_cheap_as_move,
|
||||
.lsl_fast,
|
||||
.perfmon,
|
||||
.predictable_select_expensive,
|
||||
.spe,
|
||||
.use_postra_scheduler,
|
||||
.v8_4a,
|
||||
.zcz,
|
||||
}),
|
||||
};
|
||||
pub const thunderx = Cpu{
|
||||
pub const thunderx = CpuModel{
|
||||
.name = "thunderx",
|
||||
.llvm_name = "thunderx",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.thunderx,
|
||||
.crc,
|
||||
.crypto,
|
||||
.perfmon,
|
||||
.predictable_select_expensive,
|
||||
.use_postra_scheduler,
|
||||
.v8a,
|
||||
}),
|
||||
};
|
||||
pub const thunderx2t99 = Cpu{
|
||||
pub const thunderx2t99 = CpuModel{
|
||||
.name = "thunderx2t99",
|
||||
.llvm_name = "thunderx2t99",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.thunderx2t99,
|
||||
.aggressive_fma,
|
||||
.arith_bcc_fusion,
|
||||
.crc,
|
||||
.crypto,
|
||||
.lse,
|
||||
.predictable_select_expensive,
|
||||
.use_postra_scheduler,
|
||||
.v8_1a,
|
||||
}),
|
||||
};
|
||||
pub const thunderxt81 = Cpu{
|
||||
pub const thunderxt81 = CpuModel{
|
||||
.name = "thunderxt81",
|
||||
.llvm_name = "thunderxt81",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.thunderxt81,
|
||||
.crc,
|
||||
.crypto,
|
||||
.perfmon,
|
||||
.predictable_select_expensive,
|
||||
.use_postra_scheduler,
|
||||
.v8a,
|
||||
}),
|
||||
};
|
||||
pub const thunderxt83 = Cpu{
|
||||
pub const thunderxt83 = CpuModel{
|
||||
.name = "thunderxt83",
|
||||
.llvm_name = "thunderxt83",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.thunderxt83,
|
||||
.crc,
|
||||
.crypto,
|
||||
.perfmon,
|
||||
.predictable_select_expensive,
|
||||
.use_postra_scheduler,
|
||||
.v8a,
|
||||
}),
|
||||
};
|
||||
pub const thunderxt88 = Cpu{
|
||||
pub const thunderxt88 = CpuModel{
|
||||
.name = "thunderxt88",
|
||||
.llvm_name = "thunderxt88",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.thunderxt88,
|
||||
.crc,
|
||||
.crypto,
|
||||
.perfmon,
|
||||
.predictable_select_expensive,
|
||||
.use_postra_scheduler,
|
||||
.v8a,
|
||||
}),
|
||||
};
|
||||
pub const tsv110 = Cpu{
|
||||
pub const tsv110 = CpuModel{
|
||||
.name = "tsv110",
|
||||
.llvm_name = "tsv110",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.tsv110,
|
||||
.crypto,
|
||||
.custom_cheap_as_move,
|
||||
.dotprod,
|
||||
.fp16fml,
|
||||
.fullfp16,
|
||||
.fuse_aes,
|
||||
.perfmon,
|
||||
.spe,
|
||||
.use_postra_scheduler,
|
||||
.v8_2a,
|
||||
}),
|
||||
};
|
||||
};
|
||||
@ -1420,7 +1247,7 @@ pub const cpu = struct {
|
||||
/// All aarch64 CPUs, sorted alphabetically by name.
|
||||
/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
|
||||
/// compiler has inefficient memory and CPU usage, affecting build times.
|
||||
pub const all_cpus = &[_]*const Cpu{
|
||||
pub const all_cpus = &[_]*const CpuModel{
|
||||
&cpu.apple_latest,
|
||||
&cpu.cortex_a35,
|
||||
&cpu.cortex_a53,
|
||||
|
||||
@ -1,5 +1,6 @@
|
||||
const std = @import("../std.zig");
|
||||
const Cpu = std.Target.Cpu;
|
||||
const CpuFeature = std.Target.Cpu.Feature;
|
||||
const CpuModel = std.Target.Cpu.Model;
|
||||
|
||||
pub const Feature = enum {
|
||||
@"16_bit_insts",
|
||||
@ -111,12 +112,12 @@ pub const Feature = enum {
|
||||
xnack,
|
||||
};
|
||||
|
||||
pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
|
||||
pub usingnamespace CpuFeature.feature_set_fns(Feature);
|
||||
|
||||
pub const all_features = blk: {
|
||||
const len = @typeInfo(Feature).Enum.fields.len;
|
||||
std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
|
||||
var result: [len]Cpu.Feature = undefined;
|
||||
std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
|
||||
var result: [len]CpuFeature = undefined;
|
||||
result[@enumToInt(Feature.@"16_bit_insts")] = .{
|
||||
.llvm_name = "16-bit-insts",
|
||||
.description = "Has i16/f16 instructions",
|
||||
@ -778,7 +779,7 @@ pub const all_features = blk: {
|
||||
};
|
||||
|
||||
pub const cpu = struct {
|
||||
pub const bonaire = Cpu{
|
||||
pub const bonaire = CpuModel{
|
||||
.name = "bonaire",
|
||||
.llvm_name = "bonaire",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -788,7 +789,7 @@ pub const cpu = struct {
|
||||
.sea_islands,
|
||||
}),
|
||||
};
|
||||
pub const carrizo = Cpu{
|
||||
pub const carrizo = CpuModel{
|
||||
.name = "carrizo",
|
||||
.llvm_name = "carrizo",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -801,7 +802,7 @@ pub const cpu = struct {
|
||||
.xnack,
|
||||
}),
|
||||
};
|
||||
pub const fiji = Cpu{
|
||||
pub const fiji = CpuModel{
|
||||
.name = "fiji",
|
||||
.llvm_name = "fiji",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -812,14 +813,14 @@ pub const cpu = struct {
|
||||
.volcanic_islands,
|
||||
}),
|
||||
};
|
||||
pub const generic = Cpu{
|
||||
pub const generic = CpuModel{
|
||||
.name = "generic",
|
||||
.llvm_name = "generic",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.wavefrontsize64,
|
||||
}),
|
||||
};
|
||||
pub const generic_hsa = Cpu{
|
||||
pub const generic_hsa = CpuModel{
|
||||
.name = "generic_hsa",
|
||||
.llvm_name = "generic-hsa",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -827,7 +828,7 @@ pub const cpu = struct {
|
||||
.wavefrontsize64,
|
||||
}),
|
||||
};
|
||||
pub const gfx1010 = Cpu{
|
||||
pub const gfx1010 = CpuModel{
|
||||
.name = "gfx1010",
|
||||
.llvm_name = "gfx1010",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -853,7 +854,7 @@ pub const cpu = struct {
|
||||
.wavefrontsize32,
|
||||
}),
|
||||
};
|
||||
pub const gfx1011 = Cpu{
|
||||
pub const gfx1011 = CpuModel{
|
||||
.name = "gfx1011",
|
||||
.llvm_name = "gfx1011",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -882,7 +883,7 @@ pub const cpu = struct {
|
||||
.wavefrontsize32,
|
||||
}),
|
||||
};
|
||||
pub const gfx1012 = Cpu{
|
||||
pub const gfx1012 = CpuModel{
|
||||
.name = "gfx1012",
|
||||
.llvm_name = "gfx1012",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -912,7 +913,7 @@ pub const cpu = struct {
|
||||
.wavefrontsize32,
|
||||
}),
|
||||
};
|
||||
pub const gfx600 = Cpu{
|
||||
pub const gfx600 = CpuModel{
|
||||
.name = "gfx600",
|
||||
.llvm_name = "gfx600",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -924,7 +925,7 @@ pub const cpu = struct {
|
||||
.southern_islands,
|
||||
}),
|
||||
};
|
||||
pub const gfx601 = Cpu{
|
||||
pub const gfx601 = CpuModel{
|
||||
.name = "gfx601",
|
||||
.llvm_name = "gfx601",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -934,7 +935,7 @@ pub const cpu = struct {
|
||||
.southern_islands,
|
||||
}),
|
||||
};
|
||||
pub const gfx700 = Cpu{
|
||||
pub const gfx700 = CpuModel{
|
||||
.name = "gfx700",
|
||||
.llvm_name = "gfx700",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -944,7 +945,7 @@ pub const cpu = struct {
|
||||
.sea_islands,
|
||||
}),
|
||||
};
|
||||
pub const gfx701 = Cpu{
|
||||
pub const gfx701 = CpuModel{
|
||||
.name = "gfx701",
|
||||
.llvm_name = "gfx701",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -956,7 +957,7 @@ pub const cpu = struct {
|
||||
.sea_islands,
|
||||
}),
|
||||
};
|
||||
pub const gfx702 = Cpu{
|
||||
pub const gfx702 = CpuModel{
|
||||
.name = "gfx702",
|
||||
.llvm_name = "gfx702",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -967,7 +968,7 @@ pub const cpu = struct {
|
||||
.sea_islands,
|
||||
}),
|
||||
};
|
||||
pub const gfx703 = Cpu{
|
||||
pub const gfx703 = CpuModel{
|
||||
.name = "gfx703",
|
||||
.llvm_name = "gfx703",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -977,7 +978,7 @@ pub const cpu = struct {
|
||||
.sea_islands,
|
||||
}),
|
||||
};
|
||||
pub const gfx704 = Cpu{
|
||||
pub const gfx704 = CpuModel{
|
||||
.name = "gfx704",
|
||||
.llvm_name = "gfx704",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -987,7 +988,7 @@ pub const cpu = struct {
|
||||
.sea_islands,
|
||||
}),
|
||||
};
|
||||
pub const gfx801 = Cpu{
|
||||
pub const gfx801 = CpuModel{
|
||||
.name = "gfx801",
|
||||
.llvm_name = "gfx801",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -1000,7 +1001,7 @@ pub const cpu = struct {
|
||||
.xnack,
|
||||
}),
|
||||
};
|
||||
pub const gfx802 = Cpu{
|
||||
pub const gfx802 = CpuModel{
|
||||
.name = "gfx802",
|
||||
.llvm_name = "gfx802",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -1012,7 +1013,7 @@ pub const cpu = struct {
|
||||
.volcanic_islands,
|
||||
}),
|
||||
};
|
||||
pub const gfx803 = Cpu{
|
||||
pub const gfx803 = CpuModel{
|
||||
.name = "gfx803",
|
||||
.llvm_name = "gfx803",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -1023,7 +1024,7 @@ pub const cpu = struct {
|
||||
.volcanic_islands,
|
||||
}),
|
||||
};
|
||||
pub const gfx810 = Cpu{
|
||||
pub const gfx810 = CpuModel{
|
||||
.name = "gfx810",
|
||||
.llvm_name = "gfx810",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -1033,7 +1034,7 @@ pub const cpu = struct {
|
||||
.xnack,
|
||||
}),
|
||||
};
|
||||
pub const gfx900 = Cpu{
|
||||
pub const gfx900 = CpuModel{
|
||||
.name = "gfx900",
|
||||
.llvm_name = "gfx900",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -1045,7 +1046,7 @@ pub const cpu = struct {
|
||||
.no_xnack_support,
|
||||
}),
|
||||
};
|
||||
pub const gfx902 = Cpu{
|
||||
pub const gfx902 = CpuModel{
|
||||
.name = "gfx902",
|
||||
.llvm_name = "gfx902",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -1057,7 +1058,7 @@ pub const cpu = struct {
|
||||
.xnack,
|
||||
}),
|
||||
};
|
||||
pub const gfx904 = Cpu{
|
||||
pub const gfx904 = CpuModel{
|
||||
.name = "gfx904",
|
||||
.llvm_name = "gfx904",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -1069,7 +1070,7 @@ pub const cpu = struct {
|
||||
.no_xnack_support,
|
||||
}),
|
||||
};
|
||||
pub const gfx906 = Cpu{
|
||||
pub const gfx906 = CpuModel{
|
||||
.name = "gfx906",
|
||||
.llvm_name = "gfx906",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -1084,7 +1085,7 @@ pub const cpu = struct {
|
||||
.no_xnack_support,
|
||||
}),
|
||||
};
|
||||
pub const gfx908 = Cpu{
|
||||
pub const gfx908 = CpuModel{
|
||||
.name = "gfx908",
|
||||
.llvm_name = "gfx908",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -1106,7 +1107,7 @@ pub const cpu = struct {
|
||||
.sram_ecc,
|
||||
}),
|
||||
};
|
||||
pub const gfx909 = Cpu{
|
||||
pub const gfx909 = CpuModel{
|
||||
.name = "gfx909",
|
||||
.llvm_name = "gfx909",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -1117,7 +1118,7 @@ pub const cpu = struct {
|
||||
.xnack,
|
||||
}),
|
||||
};
|
||||
pub const hainan = Cpu{
|
||||
pub const hainan = CpuModel{
|
||||
.name = "hainan",
|
||||
.llvm_name = "hainan",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -1127,7 +1128,7 @@ pub const cpu = struct {
|
||||
.southern_islands,
|
||||
}),
|
||||
};
|
||||
pub const hawaii = Cpu{
|
||||
pub const hawaii = CpuModel{
|
||||
.name = "hawaii",
|
||||
.llvm_name = "hawaii",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -1139,7 +1140,7 @@ pub const cpu = struct {
|
||||
.sea_islands,
|
||||
}),
|
||||
};
|
||||
pub const iceland = Cpu{
|
||||
pub const iceland = CpuModel{
|
||||
.name = "iceland",
|
||||
.llvm_name = "iceland",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -1151,7 +1152,7 @@ pub const cpu = struct {
|
||||
.volcanic_islands,
|
||||
}),
|
||||
};
|
||||
pub const kabini = Cpu{
|
||||
pub const kabini = CpuModel{
|
||||
.name = "kabini",
|
||||
.llvm_name = "kabini",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -1161,7 +1162,7 @@ pub const cpu = struct {
|
||||
.sea_islands,
|
||||
}),
|
||||
};
|
||||
pub const kaveri = Cpu{
|
||||
pub const kaveri = CpuModel{
|
||||
.name = "kaveri",
|
||||
.llvm_name = "kaveri",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -1171,7 +1172,7 @@ pub const cpu = struct {
|
||||
.sea_islands,
|
||||
}),
|
||||
};
|
||||
pub const mullins = Cpu{
|
||||
pub const mullins = CpuModel{
|
||||
.name = "mullins",
|
||||
.llvm_name = "mullins",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -1181,7 +1182,7 @@ pub const cpu = struct {
|
||||
.sea_islands,
|
||||
}),
|
||||
};
|
||||
pub const oland = Cpu{
|
||||
pub const oland = CpuModel{
|
||||
.name = "oland",
|
||||
.llvm_name = "oland",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -1191,7 +1192,7 @@ pub const cpu = struct {
|
||||
.southern_islands,
|
||||
}),
|
||||
};
|
||||
pub const pitcairn = Cpu{
|
||||
pub const pitcairn = CpuModel{
|
||||
.name = "pitcairn",
|
||||
.llvm_name = "pitcairn",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -1201,7 +1202,7 @@ pub const cpu = struct {
|
||||
.southern_islands,
|
||||
}),
|
||||
};
|
||||
pub const polaris10 = Cpu{
|
||||
pub const polaris10 = CpuModel{
|
||||
.name = "polaris10",
|
||||
.llvm_name = "polaris10",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -1212,7 +1213,7 @@ pub const cpu = struct {
|
||||
.volcanic_islands,
|
||||
}),
|
||||
};
|
||||
pub const polaris11 = Cpu{
|
||||
pub const polaris11 = CpuModel{
|
||||
.name = "polaris11",
|
||||
.llvm_name = "polaris11",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -1223,7 +1224,7 @@ pub const cpu = struct {
|
||||
.volcanic_islands,
|
||||
}),
|
||||
};
|
||||
pub const stoney = Cpu{
|
||||
pub const stoney = CpuModel{
|
||||
.name = "stoney",
|
||||
.llvm_name = "stoney",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -1233,7 +1234,7 @@ pub const cpu = struct {
|
||||
.xnack,
|
||||
}),
|
||||
};
|
||||
pub const tahiti = Cpu{
|
||||
pub const tahiti = CpuModel{
|
||||
.name = "tahiti",
|
||||
.llvm_name = "tahiti",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -1245,7 +1246,7 @@ pub const cpu = struct {
|
||||
.southern_islands,
|
||||
}),
|
||||
};
|
||||
pub const tonga = Cpu{
|
||||
pub const tonga = CpuModel{
|
||||
.name = "tonga",
|
||||
.llvm_name = "tonga",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -1257,7 +1258,7 @@ pub const cpu = struct {
|
||||
.volcanic_islands,
|
||||
}),
|
||||
};
|
||||
pub const verde = Cpu{
|
||||
pub const verde = CpuModel{
|
||||
.name = "verde",
|
||||
.llvm_name = "verde",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -1272,7 +1273,7 @@ pub const cpu = struct {
|
||||
/// All amdgpu CPUs, sorted alphabetically by name.
|
||||
/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
|
||||
/// compiler has inefficient memory and CPU usage, affecting build times.
|
||||
pub const all_cpus = &[_]*const Cpu{
|
||||
pub const all_cpus = &[_]*const CpuModel{
|
||||
&cpu.bonaire,
|
||||
&cpu.carrizo,
|
||||
&cpu.fiji,
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@ -1,5 +1,6 @@
|
||||
const std = @import("../std.zig");
|
||||
const Cpu = std.Target.Cpu;
|
||||
const CpuFeature = std.Target.Cpu.Feature;
|
||||
const CpuModel = std.Target.Cpu.Model;
|
||||
|
||||
pub const Feature = enum {
|
||||
alu32,
|
||||
@ -7,12 +8,12 @@ pub const Feature = enum {
|
||||
dwarfris,
|
||||
};
|
||||
|
||||
pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
|
||||
pub usingnamespace CpuFeature.feature_set_fns(Feature);
|
||||
|
||||
pub const all_features = blk: {
|
||||
const len = @typeInfo(Feature).Enum.fields.len;
|
||||
std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
|
||||
var result: [len]Cpu.Feature = undefined;
|
||||
std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
|
||||
var result: [len]CpuFeature = undefined;
|
||||
result[@enumToInt(Feature.alu32)] = .{
|
||||
.llvm_name = "alu32",
|
||||
.description = "Enable ALU32 instructions",
|
||||
@ -37,27 +38,27 @@ pub const all_features = blk: {
|
||||
};
|
||||
|
||||
pub const cpu = struct {
|
||||
pub const generic = Cpu{
|
||||
pub const generic = CpuModel{
|
||||
.name = "generic",
|
||||
.llvm_name = "generic",
|
||||
.features = featureSet(&[_]Feature{}),
|
||||
};
|
||||
pub const probe = Cpu{
|
||||
pub const probe = CpuModel{
|
||||
.name = "probe",
|
||||
.llvm_name = "probe",
|
||||
.features = featureSet(&[_]Feature{}),
|
||||
};
|
||||
pub const v1 = Cpu{
|
||||
pub const v1 = CpuModel{
|
||||
.name = "v1",
|
||||
.llvm_name = "v1",
|
||||
.features = featureSet(&[_]Feature{}),
|
||||
};
|
||||
pub const v2 = Cpu{
|
||||
pub const v2 = CpuModel{
|
||||
.name = "v2",
|
||||
.llvm_name = "v2",
|
||||
.features = featureSet(&[_]Feature{}),
|
||||
};
|
||||
pub const v3 = Cpu{
|
||||
pub const v3 = CpuModel{
|
||||
.name = "v3",
|
||||
.llvm_name = "v3",
|
||||
.features = featureSet(&[_]Feature{}),
|
||||
@ -67,7 +68,7 @@ pub const cpu = struct {
|
||||
/// All bpf CPUs, sorted alphabetically by name.
|
||||
/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
|
||||
/// compiler has inefficient memory and CPU usage, affecting build times.
|
||||
pub const all_cpus = &[_]*const Cpu{
|
||||
pub const all_cpus = &[_]*const CpuModel{
|
||||
&cpu.generic,
|
||||
&cpu.probe,
|
||||
&cpu.v1,
|
||||
|
||||
@ -1,5 +1,6 @@
|
||||
const std = @import("../std.zig");
|
||||
const Cpu = std.Target.Cpu;
|
||||
const CpuFeature = std.Target.Cpu.Feature;
|
||||
const CpuModel = std.Target.Cpu.Model;
|
||||
|
||||
pub const Feature = enum {
|
||||
duplex,
|
||||
@ -28,12 +29,12 @@ pub const Feature = enum {
|
||||
zreg,
|
||||
};
|
||||
|
||||
pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
|
||||
pub usingnamespace CpuFeature.feature_set_fns(Feature);
|
||||
|
||||
pub const all_features = blk: {
|
||||
const len = @typeInfo(Feature).Enum.fields.len;
|
||||
std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
|
||||
var result: [len]Cpu.Feature = undefined;
|
||||
std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
|
||||
var result: [len]CpuFeature = undefined;
|
||||
result[@enumToInt(Feature.duplex)] = .{
|
||||
.llvm_name = "duplex",
|
||||
.description = "Enable generation of duplex instruction",
|
||||
@ -186,7 +187,7 @@ pub const all_features = blk: {
|
||||
};
|
||||
|
||||
pub const cpu = struct {
|
||||
pub const generic = Cpu{
|
||||
pub const generic = CpuModel{
|
||||
.name = "generic",
|
||||
.llvm_name = "generic",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -201,7 +202,7 @@ pub const cpu = struct {
|
||||
.v60,
|
||||
}),
|
||||
};
|
||||
pub const hexagonv5 = Cpu{
|
||||
pub const hexagonv5 = CpuModel{
|
||||
.name = "hexagonv5",
|
||||
.llvm_name = "hexagonv5",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -214,7 +215,7 @@ pub const cpu = struct {
|
||||
.v5,
|
||||
}),
|
||||
};
|
||||
pub const hexagonv55 = Cpu{
|
||||
pub const hexagonv55 = CpuModel{
|
||||
.name = "hexagonv55",
|
||||
.llvm_name = "hexagonv55",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -228,7 +229,7 @@ pub const cpu = struct {
|
||||
.v55,
|
||||
}),
|
||||
};
|
||||
pub const hexagonv60 = Cpu{
|
||||
pub const hexagonv60 = CpuModel{
|
||||
.name = "hexagonv60",
|
||||
.llvm_name = "hexagonv60",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -243,7 +244,7 @@ pub const cpu = struct {
|
||||
.v60,
|
||||
}),
|
||||
};
|
||||
pub const hexagonv62 = Cpu{
|
||||
pub const hexagonv62 = CpuModel{
|
||||
.name = "hexagonv62",
|
||||
.llvm_name = "hexagonv62",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -259,7 +260,7 @@ pub const cpu = struct {
|
||||
.v62,
|
||||
}),
|
||||
};
|
||||
pub const hexagonv65 = Cpu{
|
||||
pub const hexagonv65 = CpuModel{
|
||||
.name = "hexagonv65",
|
||||
.llvm_name = "hexagonv65",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -277,7 +278,7 @@ pub const cpu = struct {
|
||||
.v65,
|
||||
}),
|
||||
};
|
||||
pub const hexagonv66 = Cpu{
|
||||
pub const hexagonv66 = CpuModel{
|
||||
.name = "hexagonv66",
|
||||
.llvm_name = "hexagonv66",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -301,7 +302,7 @@ pub const cpu = struct {
|
||||
/// All hexagon CPUs, sorted alphabetically by name.
|
||||
/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
|
||||
/// compiler has inefficient memory and CPU usage, affecting build times.
|
||||
pub const all_cpus = &[_]*const Cpu{
|
||||
pub const all_cpus = &[_]*const CpuModel{
|
||||
&cpu.generic,
|
||||
&cpu.hexagonv5,
|
||||
&cpu.hexagonv55,
|
||||
|
||||
@ -1,5 +1,6 @@
|
||||
const std = @import("../std.zig");
|
||||
const Cpu = std.Target.Cpu;
|
||||
const CpuFeature = std.Target.Cpu.Feature;
|
||||
const CpuModel = std.Target.Cpu.Model;
|
||||
|
||||
pub const Feature = enum {
|
||||
abs2008,
|
||||
@ -53,12 +54,12 @@ pub const Feature = enum {
|
||||
virt,
|
||||
};
|
||||
|
||||
pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
|
||||
pub usingnamespace CpuFeature.feature_set_fns(Feature);
|
||||
|
||||
pub const all_features = blk: {
|
||||
const len = @typeInfo(Feature).Enum.fields.len;
|
||||
std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
|
||||
var result: [len]Cpu.Feature = undefined;
|
||||
std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
|
||||
var result: [len]CpuFeature = undefined;
|
||||
result[@enumToInt(Feature.abs2008)] = .{
|
||||
.llvm_name = "abs2008",
|
||||
.description = "Disable IEEE 754-2008 abs.fmt mode",
|
||||
@ -372,112 +373,112 @@ pub const all_features = blk: {
|
||||
};
|
||||
|
||||
pub const cpu = struct {
|
||||
pub const mips1 = Cpu{
|
||||
pub const mips1 = CpuModel{
|
||||
.name = "mips1",
|
||||
.llvm_name = "mips1",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.mips1,
|
||||
}),
|
||||
};
|
||||
pub const mips2 = Cpu{
|
||||
pub const mips2 = CpuModel{
|
||||
.name = "mips2",
|
||||
.llvm_name = "mips2",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.mips2,
|
||||
}),
|
||||
};
|
||||
pub const mips3 = Cpu{
|
||||
pub const mips3 = CpuModel{
|
||||
.name = "mips3",
|
||||
.llvm_name = "mips3",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.mips3,
|
||||
}),
|
||||
};
|
||||
pub const mips32 = Cpu{
|
||||
pub const mips32 = CpuModel{
|
||||
.name = "mips32",
|
||||
.llvm_name = "mips32",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.mips32,
|
||||
}),
|
||||
};
|
||||
pub const mips32r2 = Cpu{
|
||||
pub const mips32r2 = CpuModel{
|
||||
.name = "mips32r2",
|
||||
.llvm_name = "mips32r2",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.mips32r2,
|
||||
}),
|
||||
};
|
||||
pub const mips32r3 = Cpu{
|
||||
pub const mips32r3 = CpuModel{
|
||||
.name = "mips32r3",
|
||||
.llvm_name = "mips32r3",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.mips32r3,
|
||||
}),
|
||||
};
|
||||
pub const mips32r5 = Cpu{
|
||||
pub const mips32r5 = CpuModel{
|
||||
.name = "mips32r5",
|
||||
.llvm_name = "mips32r5",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.mips32r5,
|
||||
}),
|
||||
};
|
||||
pub const mips32r6 = Cpu{
|
||||
pub const mips32r6 = CpuModel{
|
||||
.name = "mips32r6",
|
||||
.llvm_name = "mips32r6",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.mips32r6,
|
||||
}),
|
||||
};
|
||||
pub const mips4 = Cpu{
|
||||
pub const mips4 = CpuModel{
|
||||
.name = "mips4",
|
||||
.llvm_name = "mips4",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.mips4,
|
||||
}),
|
||||
};
|
||||
pub const mips5 = Cpu{
|
||||
pub const mips5 = CpuModel{
|
||||
.name = "mips5",
|
||||
.llvm_name = "mips5",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.mips5,
|
||||
}),
|
||||
};
|
||||
pub const mips64 = Cpu{
|
||||
pub const mips64 = CpuModel{
|
||||
.name = "mips64",
|
||||
.llvm_name = "mips64",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.mips64,
|
||||
}),
|
||||
};
|
||||
pub const mips64r2 = Cpu{
|
||||
pub const mips64r2 = CpuModel{
|
||||
.name = "mips64r2",
|
||||
.llvm_name = "mips64r2",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.mips64r2,
|
||||
}),
|
||||
};
|
||||
pub const mips64r3 = Cpu{
|
||||
pub const mips64r3 = CpuModel{
|
||||
.name = "mips64r3",
|
||||
.llvm_name = "mips64r3",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.mips64r3,
|
||||
}),
|
||||
};
|
||||
pub const mips64r5 = Cpu{
|
||||
pub const mips64r5 = CpuModel{
|
||||
.name = "mips64r5",
|
||||
.llvm_name = "mips64r5",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.mips64r5,
|
||||
}),
|
||||
};
|
||||
pub const mips64r6 = Cpu{
|
||||
pub const mips64r6 = CpuModel{
|
||||
.name = "mips64r6",
|
||||
.llvm_name = "mips64r6",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.mips64r6,
|
||||
}),
|
||||
};
|
||||
pub const octeon = Cpu{
|
||||
pub const octeon = CpuModel{
|
||||
.name = "octeon",
|
||||
.llvm_name = "octeon",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -485,7 +486,7 @@ pub const cpu = struct {
|
||||
.mips64r2,
|
||||
}),
|
||||
};
|
||||
pub const p5600 = Cpu{
|
||||
pub const p5600 = CpuModel{
|
||||
.name = "p5600",
|
||||
.llvm_name = "p5600",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -497,7 +498,7 @@ pub const cpu = struct {
|
||||
/// All mips CPUs, sorted alphabetically by name.
|
||||
/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
|
||||
/// compiler has inefficient memory and CPU usage, affecting build times.
|
||||
pub const all_cpus = &[_]*const Cpu{
|
||||
pub const all_cpus = &[_]*const CpuModel{
|
||||
&cpu.mips1,
|
||||
&cpu.mips2,
|
||||
&cpu.mips3,
|
||||
|
||||
@ -1,5 +1,6 @@
|
||||
const std = @import("../std.zig");
|
||||
const Cpu = std.Target.Cpu;
|
||||
const CpuFeature = std.Target.Cpu.Feature;
|
||||
const CpuModel = std.Target.Cpu.Model;
|
||||
|
||||
pub const Feature = enum {
|
||||
ext,
|
||||
@ -8,12 +9,12 @@ pub const Feature = enum {
|
||||
hwmultf5,
|
||||
};
|
||||
|
||||
pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
|
||||
pub usingnamespace CpuFeature.feature_set_fns(Feature);
|
||||
|
||||
pub const all_features = blk: {
|
||||
const len = @typeInfo(Feature).Enum.fields.len;
|
||||
std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
|
||||
var result: [len]Cpu.Feature = undefined;
|
||||
std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
|
||||
var result: [len]CpuFeature = undefined;
|
||||
result[@enumToInt(Feature.ext)] = .{
|
||||
.llvm_name = "ext",
|
||||
.description = "Enable MSP430-X extensions",
|
||||
@ -43,17 +44,17 @@ pub const all_features = blk: {
|
||||
};
|
||||
|
||||
pub const cpu = struct {
|
||||
pub const generic = Cpu{
|
||||
pub const generic = CpuModel{
|
||||
.name = "generic",
|
||||
.llvm_name = "generic",
|
||||
.features = featureSet(&[_]Feature{}),
|
||||
};
|
||||
pub const msp430 = Cpu{
|
||||
pub const msp430 = CpuModel{
|
||||
.name = "msp430",
|
||||
.llvm_name = "msp430",
|
||||
.features = featureSet(&[_]Feature{}),
|
||||
};
|
||||
pub const msp430x = Cpu{
|
||||
pub const msp430x = CpuModel{
|
||||
.name = "msp430x",
|
||||
.llvm_name = "msp430x",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -65,7 +66,7 @@ pub const cpu = struct {
|
||||
/// All msp430 CPUs, sorted alphabetically by name.
|
||||
/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
|
||||
/// compiler has inefficient memory and CPU usage, affecting build times.
|
||||
pub const all_cpus = &[_]*const Cpu{
|
||||
pub const all_cpus = &[_]*const CpuModel{
|
||||
&cpu.generic,
|
||||
&cpu.msp430,
|
||||
&cpu.msp430x,
|
||||
|
||||
@ -1,5 +1,6 @@
|
||||
const std = @import("../std.zig");
|
||||
const Cpu = std.Target.Cpu;
|
||||
const CpuFeature = std.Target.Cpu.Feature;
|
||||
const CpuModel = std.Target.Cpu.Model;
|
||||
|
||||
pub const Feature = enum {
|
||||
ptx32,
|
||||
@ -29,12 +30,12 @@ pub const Feature = enum {
|
||||
sm_75,
|
||||
};
|
||||
|
||||
pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
|
||||
pub usingnamespace CpuFeature.feature_set_fns(Feature);
|
||||
|
||||
pub const all_features = blk: {
|
||||
const len = @typeInfo(Feature).Enum.fields.len;
|
||||
std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
|
||||
var result: [len]Cpu.Feature = undefined;
|
||||
std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
|
||||
var result: [len]CpuFeature = undefined;
|
||||
result[@enumToInt(Feature.ptx32)] = .{
|
||||
.llvm_name = "ptx32",
|
||||
.description = "Use PTX version 3.2",
|
||||
@ -169,28 +170,28 @@ pub const all_features = blk: {
|
||||
};
|
||||
|
||||
pub const cpu = struct {
|
||||
pub const sm_20 = Cpu{
|
||||
pub const sm_20 = CpuModel{
|
||||
.name = "sm_20",
|
||||
.llvm_name = "sm_20",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.sm_20,
|
||||
}),
|
||||
};
|
||||
pub const sm_21 = Cpu{
|
||||
pub const sm_21 = CpuModel{
|
||||
.name = "sm_21",
|
||||
.llvm_name = "sm_21",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.sm_21,
|
||||
}),
|
||||
};
|
||||
pub const sm_30 = Cpu{
|
||||
pub const sm_30 = CpuModel{
|
||||
.name = "sm_30",
|
||||
.llvm_name = "sm_30",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.sm_30,
|
||||
}),
|
||||
};
|
||||
pub const sm_32 = Cpu{
|
||||
pub const sm_32 = CpuModel{
|
||||
.name = "sm_32",
|
||||
.llvm_name = "sm_32",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -198,14 +199,14 @@ pub const cpu = struct {
|
||||
.sm_32,
|
||||
}),
|
||||
};
|
||||
pub const sm_35 = Cpu{
|
||||
pub const sm_35 = CpuModel{
|
||||
.name = "sm_35",
|
||||
.llvm_name = "sm_35",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.sm_35,
|
||||
}),
|
||||
};
|
||||
pub const sm_37 = Cpu{
|
||||
pub const sm_37 = CpuModel{
|
||||
.name = "sm_37",
|
||||
.llvm_name = "sm_37",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -213,7 +214,7 @@ pub const cpu = struct {
|
||||
.sm_37,
|
||||
}),
|
||||
};
|
||||
pub const sm_50 = Cpu{
|
||||
pub const sm_50 = CpuModel{
|
||||
.name = "sm_50",
|
||||
.llvm_name = "sm_50",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -221,7 +222,7 @@ pub const cpu = struct {
|
||||
.sm_50,
|
||||
}),
|
||||
};
|
||||
pub const sm_52 = Cpu{
|
||||
pub const sm_52 = CpuModel{
|
||||
.name = "sm_52",
|
||||
.llvm_name = "sm_52",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -229,7 +230,7 @@ pub const cpu = struct {
|
||||
.sm_52,
|
||||
}),
|
||||
};
|
||||
pub const sm_53 = Cpu{
|
||||
pub const sm_53 = CpuModel{
|
||||
.name = "sm_53",
|
||||
.llvm_name = "sm_53",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -237,7 +238,7 @@ pub const cpu = struct {
|
||||
.sm_53,
|
||||
}),
|
||||
};
|
||||
pub const sm_60 = Cpu{
|
||||
pub const sm_60 = CpuModel{
|
||||
.name = "sm_60",
|
||||
.llvm_name = "sm_60",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -245,7 +246,7 @@ pub const cpu = struct {
|
||||
.sm_60,
|
||||
}),
|
||||
};
|
||||
pub const sm_61 = Cpu{
|
||||
pub const sm_61 = CpuModel{
|
||||
.name = "sm_61",
|
||||
.llvm_name = "sm_61",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -253,7 +254,7 @@ pub const cpu = struct {
|
||||
.sm_61,
|
||||
}),
|
||||
};
|
||||
pub const sm_62 = Cpu{
|
||||
pub const sm_62 = CpuModel{
|
||||
.name = "sm_62",
|
||||
.llvm_name = "sm_62",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -261,7 +262,7 @@ pub const cpu = struct {
|
||||
.sm_62,
|
||||
}),
|
||||
};
|
||||
pub const sm_70 = Cpu{
|
||||
pub const sm_70 = CpuModel{
|
||||
.name = "sm_70",
|
||||
.llvm_name = "sm_70",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -269,7 +270,7 @@ pub const cpu = struct {
|
||||
.sm_70,
|
||||
}),
|
||||
};
|
||||
pub const sm_72 = Cpu{
|
||||
pub const sm_72 = CpuModel{
|
||||
.name = "sm_72",
|
||||
.llvm_name = "sm_72",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -277,7 +278,7 @@ pub const cpu = struct {
|
||||
.sm_72,
|
||||
}),
|
||||
};
|
||||
pub const sm_75 = Cpu{
|
||||
pub const sm_75 = CpuModel{
|
||||
.name = "sm_75",
|
||||
.llvm_name = "sm_75",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -290,7 +291,7 @@ pub const cpu = struct {
|
||||
/// All nvptx CPUs, sorted alphabetically by name.
|
||||
/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
|
||||
/// compiler has inefficient memory and CPU usage, affecting build times.
|
||||
pub const all_cpus = &[_]*const Cpu{
|
||||
pub const all_cpus = &[_]*const CpuModel{
|
||||
&cpu.sm_20,
|
||||
&cpu.sm_21,
|
||||
&cpu.sm_30,
|
||||
|
||||
@ -1,5 +1,6 @@
|
||||
const std = @import("../std.zig");
|
||||
const Cpu = std.Target.Cpu;
|
||||
const CpuFeature = std.Target.Cpu.Feature;
|
||||
const CpuModel = std.Target.Cpu.Model;
|
||||
|
||||
pub const Feature = enum {
|
||||
@"64bit",
|
||||
@ -55,12 +56,12 @@ pub const Feature = enum {
|
||||
vsx,
|
||||
};
|
||||
|
||||
pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
|
||||
pub usingnamespace CpuFeature.feature_set_fns(Feature);
|
||||
|
||||
pub const all_features = blk: {
|
||||
const len = @typeInfo(Feature).Enum.fields.len;
|
||||
std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
|
||||
var result: [len]Cpu.Feature = undefined;
|
||||
std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
|
||||
var result: [len]CpuFeature = undefined;
|
||||
result[@enumToInt(Feature.@"64bit")] = .{
|
||||
.llvm_name = "64bit",
|
||||
.description = "Enable 64-bit instructions",
|
||||
@ -377,7 +378,7 @@ pub const all_features = blk: {
|
||||
};
|
||||
|
||||
pub const cpu = struct {
|
||||
pub const @"440" = Cpu{
|
||||
pub const @"440" = CpuModel{
|
||||
.name = "440",
|
||||
.llvm_name = "440",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -389,7 +390,7 @@ pub const cpu = struct {
|
||||
.msync,
|
||||
}),
|
||||
};
|
||||
pub const @"450" = Cpu{
|
||||
pub const @"450" = CpuModel{
|
||||
.name = "450",
|
||||
.llvm_name = "450",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -401,21 +402,21 @@ pub const cpu = struct {
|
||||
.msync,
|
||||
}),
|
||||
};
|
||||
pub const @"601" = Cpu{
|
||||
pub const @"601" = CpuModel{
|
||||
.name = "601",
|
||||
.llvm_name = "601",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.fpu,
|
||||
}),
|
||||
};
|
||||
pub const @"602" = Cpu{
|
||||
pub const @"602" = CpuModel{
|
||||
.name = "602",
|
||||
.llvm_name = "602",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.fpu,
|
||||
}),
|
||||
};
|
||||
pub const @"603" = Cpu{
|
||||
pub const @"603" = CpuModel{
|
||||
.name = "603",
|
||||
.llvm_name = "603",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -423,7 +424,7 @@ pub const cpu = struct {
|
||||
.frsqrte,
|
||||
}),
|
||||
};
|
||||
pub const @"603e" = Cpu{
|
||||
pub const @"603e" = CpuModel{
|
||||
.name = "603e",
|
||||
.llvm_name = "603e",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -431,7 +432,7 @@ pub const cpu = struct {
|
||||
.frsqrte,
|
||||
}),
|
||||
};
|
||||
pub const @"603ev" = Cpu{
|
||||
pub const @"603ev" = CpuModel{
|
||||
.name = "603ev",
|
||||
.llvm_name = "603ev",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -439,7 +440,7 @@ pub const cpu = struct {
|
||||
.frsqrte,
|
||||
}),
|
||||
};
|
||||
pub const @"604" = Cpu{
|
||||
pub const @"604" = CpuModel{
|
||||
.name = "604",
|
||||
.llvm_name = "604",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -447,7 +448,7 @@ pub const cpu = struct {
|
||||
.frsqrte,
|
||||
}),
|
||||
};
|
||||
pub const @"604e" = Cpu{
|
||||
pub const @"604e" = CpuModel{
|
||||
.name = "604e",
|
||||
.llvm_name = "604e",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -455,7 +456,7 @@ pub const cpu = struct {
|
||||
.frsqrte,
|
||||
}),
|
||||
};
|
||||
pub const @"620" = Cpu{
|
||||
pub const @"620" = CpuModel{
|
||||
.name = "620",
|
||||
.llvm_name = "620",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -463,7 +464,7 @@ pub const cpu = struct {
|
||||
.frsqrte,
|
||||
}),
|
||||
};
|
||||
pub const @"7400" = Cpu{
|
||||
pub const @"7400" = CpuModel{
|
||||
.name = "7400",
|
||||
.llvm_name = "7400",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -472,7 +473,7 @@ pub const cpu = struct {
|
||||
.frsqrte,
|
||||
}),
|
||||
};
|
||||
pub const @"7450" = Cpu{
|
||||
pub const @"7450" = CpuModel{
|
||||
.name = "7450",
|
||||
.llvm_name = "7450",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -481,7 +482,7 @@ pub const cpu = struct {
|
||||
.frsqrte,
|
||||
}),
|
||||
};
|
||||
pub const @"750" = Cpu{
|
||||
pub const @"750" = CpuModel{
|
||||
.name = "750",
|
||||
.llvm_name = "750",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -489,7 +490,7 @@ pub const cpu = struct {
|
||||
.frsqrte,
|
||||
}),
|
||||
};
|
||||
pub const @"970" = Cpu{
|
||||
pub const @"970" = CpuModel{
|
||||
.name = "970",
|
||||
.llvm_name = "970",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -502,7 +503,7 @@ pub const cpu = struct {
|
||||
.stfiwx,
|
||||
}),
|
||||
};
|
||||
pub const a2 = Cpu{
|
||||
pub const a2 = CpuModel{
|
||||
.name = "a2",
|
||||
.llvm_name = "a2",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -527,7 +528,7 @@ pub const cpu = struct {
|
||||
.stfiwx,
|
||||
}),
|
||||
};
|
||||
pub const a2q = Cpu{
|
||||
pub const a2q = CpuModel{
|
||||
.name = "a2q",
|
||||
.llvm_name = "a2q",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -553,7 +554,7 @@ pub const cpu = struct {
|
||||
.stfiwx,
|
||||
}),
|
||||
};
|
||||
pub const e500 = Cpu{
|
||||
pub const e500 = CpuModel{
|
||||
.name = "e500",
|
||||
.llvm_name = "e500",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -562,7 +563,7 @@ pub const cpu = struct {
|
||||
.isel,
|
||||
}),
|
||||
};
|
||||
pub const e500mc = Cpu{
|
||||
pub const e500mc = CpuModel{
|
||||
.name = "e500mc",
|
||||
.llvm_name = "e500mc",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -572,7 +573,7 @@ pub const cpu = struct {
|
||||
.stfiwx,
|
||||
}),
|
||||
};
|
||||
pub const e5500 = Cpu{
|
||||
pub const e5500 = CpuModel{
|
||||
.name = "e5500",
|
||||
.llvm_name = "e5500",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -584,7 +585,7 @@ pub const cpu = struct {
|
||||
.stfiwx,
|
||||
}),
|
||||
};
|
||||
pub const g3 = Cpu{
|
||||
pub const g3 = CpuModel{
|
||||
.name = "g3",
|
||||
.llvm_name = "g3",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -592,7 +593,7 @@ pub const cpu = struct {
|
||||
.frsqrte,
|
||||
}),
|
||||
};
|
||||
pub const g4 = Cpu{
|
||||
pub const g4 = CpuModel{
|
||||
.name = "g4",
|
||||
.llvm_name = "g4",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -601,7 +602,7 @@ pub const cpu = struct {
|
||||
.frsqrte,
|
||||
}),
|
||||
};
|
||||
pub const @"g4+" = Cpu{
|
||||
pub const @"g4+" = CpuModel{
|
||||
.name = "g4+",
|
||||
.llvm_name = "g4+",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -610,7 +611,7 @@ pub const cpu = struct {
|
||||
.frsqrte,
|
||||
}),
|
||||
};
|
||||
pub const g5 = Cpu{
|
||||
pub const g5 = CpuModel{
|
||||
.name = "g5",
|
||||
.llvm_name = "g5",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -623,28 +624,28 @@ pub const cpu = struct {
|
||||
.stfiwx,
|
||||
}),
|
||||
};
|
||||
pub const generic = Cpu{
|
||||
pub const generic = CpuModel{
|
||||
.name = "generic",
|
||||
.llvm_name = "generic",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.hard_float,
|
||||
}),
|
||||
};
|
||||
pub const ppc = Cpu{
|
||||
pub const ppc = CpuModel{
|
||||
.name = "ppc",
|
||||
.llvm_name = "ppc",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.hard_float,
|
||||
}),
|
||||
};
|
||||
pub const ppc32 = Cpu{
|
||||
pub const ppc32 = CpuModel{
|
||||
.name = "ppc32",
|
||||
.llvm_name = "ppc32",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.hard_float,
|
||||
}),
|
||||
};
|
||||
pub const ppc64 = Cpu{
|
||||
pub const ppc64 = CpuModel{
|
||||
.name = "ppc64",
|
||||
.llvm_name = "ppc64",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -657,7 +658,7 @@ pub const cpu = struct {
|
||||
.stfiwx,
|
||||
}),
|
||||
};
|
||||
pub const ppc64le = Cpu{
|
||||
pub const ppc64le = CpuModel{
|
||||
.name = "ppc64le",
|
||||
.llvm_name = "ppc64le",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -692,7 +693,7 @@ pub const cpu = struct {
|
||||
.vsx,
|
||||
}),
|
||||
};
|
||||
pub const pwr3 = Cpu{
|
||||
pub const pwr3 = CpuModel{
|
||||
.name = "pwr3",
|
||||
.llvm_name = "pwr3",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -704,7 +705,7 @@ pub const cpu = struct {
|
||||
.stfiwx,
|
||||
}),
|
||||
};
|
||||
pub const pwr4 = Cpu{
|
||||
pub const pwr4 = CpuModel{
|
||||
.name = "pwr4",
|
||||
.llvm_name = "pwr4",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -717,7 +718,7 @@ pub const cpu = struct {
|
||||
.stfiwx,
|
||||
}),
|
||||
};
|
||||
pub const pwr5 = Cpu{
|
||||
pub const pwr5 = CpuModel{
|
||||
.name = "pwr5",
|
||||
.llvm_name = "pwr5",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -732,7 +733,7 @@ pub const cpu = struct {
|
||||
.stfiwx,
|
||||
}),
|
||||
};
|
||||
pub const pwr5x = Cpu{
|
||||
pub const pwr5x = CpuModel{
|
||||
.name = "pwr5x",
|
||||
.llvm_name = "pwr5x",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -748,7 +749,7 @@ pub const cpu = struct {
|
||||
.stfiwx,
|
||||
}),
|
||||
};
|
||||
pub const pwr6 = Cpu{
|
||||
pub const pwr6 = CpuModel{
|
||||
.name = "pwr6",
|
||||
.llvm_name = "pwr6",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -768,7 +769,7 @@ pub const cpu = struct {
|
||||
.stfiwx,
|
||||
}),
|
||||
};
|
||||
pub const pwr6x = Cpu{
|
||||
pub const pwr6x = CpuModel{
|
||||
.name = "pwr6x",
|
||||
.llvm_name = "pwr6x",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -788,7 +789,7 @@ pub const cpu = struct {
|
||||
.stfiwx,
|
||||
}),
|
||||
};
|
||||
pub const pwr7 = Cpu{
|
||||
pub const pwr7 = CpuModel{
|
||||
.name = "pwr7",
|
||||
.llvm_name = "pwr7",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -816,7 +817,7 @@ pub const cpu = struct {
|
||||
.vsx,
|
||||
}),
|
||||
};
|
||||
pub const pwr8 = Cpu{
|
||||
pub const pwr8 = CpuModel{
|
||||
.name = "pwr8",
|
||||
.llvm_name = "pwr8",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -851,7 +852,7 @@ pub const cpu = struct {
|
||||
.vsx,
|
||||
}),
|
||||
};
|
||||
pub const pwr9 = Cpu{
|
||||
pub const pwr9 = CpuModel{
|
||||
.name = "pwr9",
|
||||
.llvm_name = "pwr9",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -897,7 +898,7 @@ pub const cpu = struct {
|
||||
/// All powerpc CPUs, sorted alphabetically by name.
|
||||
/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
|
||||
/// compiler has inefficient memory and CPU usage, affecting build times.
|
||||
pub const all_cpus = &[_]*const Cpu{
|
||||
pub const all_cpus = &[_]*const CpuModel{
|
||||
&cpu.@"440",
|
||||
&cpu.@"450",
|
||||
&cpu.@"601",
|
||||
|
||||
@ -1,5 +1,6 @@
|
||||
const std = @import("../std.zig");
|
||||
const Cpu = std.Target.Cpu;
|
||||
const CpuFeature = std.Target.Cpu.Feature;
|
||||
const CpuModel = std.Target.Cpu.Model;
|
||||
|
||||
pub const Feature = enum {
|
||||
@"64bit",
|
||||
@ -12,12 +13,12 @@ pub const Feature = enum {
|
||||
relax,
|
||||
};
|
||||
|
||||
pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
|
||||
pub usingnamespace CpuFeature.feature_set_fns(Feature);
|
||||
|
||||
pub const all_features = blk: {
|
||||
const len = @typeInfo(Feature).Enum.fields.len;
|
||||
std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
|
||||
var result: [len]Cpu.Feature = undefined;
|
||||
std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
|
||||
var result: [len]CpuFeature = undefined;
|
||||
result[@enumToInt(Feature.@"64bit")] = .{
|
||||
.llvm_name = "64bit",
|
||||
.description = "Implements RV64",
|
||||
@ -69,7 +70,7 @@ pub const all_features = blk: {
|
||||
};
|
||||
|
||||
pub const cpu = struct {
|
||||
pub const baseline_rv32 = Cpu{
|
||||
pub const baseline_rv32 = CpuModel{
|
||||
.name = "baseline_rv32",
|
||||
.llvm_name = "generic-rv32",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -81,7 +82,7 @@ pub const cpu = struct {
|
||||
}),
|
||||
};
|
||||
|
||||
pub const baseline_rv64 = Cpu{
|
||||
pub const baseline_rv64 = CpuModel{
|
||||
.name = "baseline_rv64",
|
||||
.llvm_name = "generic-rv64",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -94,13 +95,13 @@ pub const cpu = struct {
|
||||
}),
|
||||
};
|
||||
|
||||
pub const generic_rv32 = Cpu{
|
||||
pub const generic_rv32 = CpuModel{
|
||||
.name = "generic_rv32",
|
||||
.llvm_name = "generic-rv32",
|
||||
.features = featureSet(&[_]Feature{}),
|
||||
};
|
||||
|
||||
pub const generic_rv64 = Cpu{
|
||||
pub const generic_rv64 = CpuModel{
|
||||
.name = "generic_rv64",
|
||||
.llvm_name = "generic-rv64",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -112,7 +113,7 @@ pub const cpu = struct {
|
||||
/// All riscv CPUs, sorted alphabetically by name.
|
||||
/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
|
||||
/// compiler has inefficient memory and CPU usage, affecting build times.
|
||||
pub const all_cpus = &[_]*const Cpu{
|
||||
pub const all_cpus = &[_]*const CpuModel{
|
||||
&cpu.baseline_rv32,
|
||||
&cpu.baseline_rv64,
|
||||
&cpu.generic_rv32,
|
||||
|
||||
@ -1,5 +1,6 @@
|
||||
const std = @import("../std.zig");
|
||||
const Cpu = std.Target.Cpu;
|
||||
const CpuFeature = std.Target.Cpu.Feature;
|
||||
const CpuModel = std.Target.Cpu.Model;
|
||||
|
||||
pub const Feature = enum {
|
||||
deprecated_v8,
|
||||
@ -23,12 +24,12 @@ pub const Feature = enum {
|
||||
vis3,
|
||||
};
|
||||
|
||||
pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
|
||||
pub usingnamespace CpuFeature.feature_set_fns(Feature);
|
||||
|
||||
pub const all_features = blk: {
|
||||
const len = @typeInfo(Feature).Enum.fields.len;
|
||||
std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
|
||||
var result: [len]Cpu.Feature = undefined;
|
||||
std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
|
||||
var result: [len]CpuFeature = undefined;
|
||||
result[@enumToInt(Feature.deprecated_v8)] = .{
|
||||
.llvm_name = "deprecated-v8",
|
||||
.description = "Enable deprecated V8 instructions in V9 mode",
|
||||
@ -133,7 +134,7 @@ pub const all_features = blk: {
|
||||
};
|
||||
|
||||
pub const cpu = struct {
|
||||
pub const at697e = Cpu{
|
||||
pub const at697e = CpuModel{
|
||||
.name = "at697e",
|
||||
.llvm_name = "at697e",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -141,7 +142,7 @@ pub const cpu = struct {
|
||||
.leon,
|
||||
}),
|
||||
};
|
||||
pub const at697f = Cpu{
|
||||
pub const at697f = CpuModel{
|
||||
.name = "at697f",
|
||||
.llvm_name = "at697f",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -149,17 +150,17 @@ pub const cpu = struct {
|
||||
.leon,
|
||||
}),
|
||||
};
|
||||
pub const f934 = Cpu{
|
||||
pub const f934 = CpuModel{
|
||||
.name = "f934",
|
||||
.llvm_name = "f934",
|
||||
.features = featureSet(&[_]Feature{}),
|
||||
};
|
||||
pub const generic = Cpu{
|
||||
pub const generic = CpuModel{
|
||||
.name = "generic",
|
||||
.llvm_name = "generic",
|
||||
.features = featureSet(&[_]Feature{}),
|
||||
};
|
||||
pub const gr712rc = Cpu{
|
||||
pub const gr712rc = CpuModel{
|
||||
.name = "gr712rc",
|
||||
.llvm_name = "gr712rc",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -167,7 +168,7 @@ pub const cpu = struct {
|
||||
.leon,
|
||||
}),
|
||||
};
|
||||
pub const gr740 = Cpu{
|
||||
pub const gr740 = CpuModel{
|
||||
.name = "gr740",
|
||||
.llvm_name = "gr740",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -178,19 +179,19 @@ pub const cpu = struct {
|
||||
.leonpwrpsr,
|
||||
}),
|
||||
};
|
||||
pub const hypersparc = Cpu{
|
||||
pub const hypersparc = CpuModel{
|
||||
.name = "hypersparc",
|
||||
.llvm_name = "hypersparc",
|
||||
.features = featureSet(&[_]Feature{}),
|
||||
};
|
||||
pub const leon2 = Cpu{
|
||||
pub const leon2 = CpuModel{
|
||||
.name = "leon2",
|
||||
.llvm_name = "leon2",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.leon,
|
||||
}),
|
||||
};
|
||||
pub const leon3 = Cpu{
|
||||
pub const leon3 = CpuModel{
|
||||
.name = "leon3",
|
||||
.llvm_name = "leon3",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -198,7 +199,7 @@ pub const cpu = struct {
|
||||
.leon,
|
||||
}),
|
||||
};
|
||||
pub const leon4 = Cpu{
|
||||
pub const leon4 = CpuModel{
|
||||
.name = "leon4",
|
||||
.llvm_name = "leon4",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -207,7 +208,7 @@ pub const cpu = struct {
|
||||
.leon,
|
||||
}),
|
||||
};
|
||||
pub const ma2080 = Cpu{
|
||||
pub const ma2080 = CpuModel{
|
||||
.name = "ma2080",
|
||||
.llvm_name = "ma2080",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -215,7 +216,7 @@ pub const cpu = struct {
|
||||
.leon,
|
||||
}),
|
||||
};
|
||||
pub const ma2085 = Cpu{
|
||||
pub const ma2085 = CpuModel{
|
||||
.name = "ma2085",
|
||||
.llvm_name = "ma2085",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -223,7 +224,7 @@ pub const cpu = struct {
|
||||
.leon,
|
||||
}),
|
||||
};
|
||||
pub const ma2100 = Cpu{
|
||||
pub const ma2100 = CpuModel{
|
||||
.name = "ma2100",
|
||||
.llvm_name = "ma2100",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -231,7 +232,7 @@ pub const cpu = struct {
|
||||
.leon,
|
||||
}),
|
||||
};
|
||||
pub const ma2150 = Cpu{
|
||||
pub const ma2150 = CpuModel{
|
||||
.name = "ma2150",
|
||||
.llvm_name = "ma2150",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -239,7 +240,7 @@ pub const cpu = struct {
|
||||
.leon,
|
||||
}),
|
||||
};
|
||||
pub const ma2155 = Cpu{
|
||||
pub const ma2155 = CpuModel{
|
||||
.name = "ma2155",
|
||||
.llvm_name = "ma2155",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -247,7 +248,7 @@ pub const cpu = struct {
|
||||
.leon,
|
||||
}),
|
||||
};
|
||||
pub const ma2450 = Cpu{
|
||||
pub const ma2450 = CpuModel{
|
||||
.name = "ma2450",
|
||||
.llvm_name = "ma2450",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -255,7 +256,7 @@ pub const cpu = struct {
|
||||
.leon,
|
||||
}),
|
||||
};
|
||||
pub const ma2455 = Cpu{
|
||||
pub const ma2455 = CpuModel{
|
||||
.name = "ma2455",
|
||||
.llvm_name = "ma2455",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -263,7 +264,7 @@ pub const cpu = struct {
|
||||
.leon,
|
||||
}),
|
||||
};
|
||||
pub const ma2480 = Cpu{
|
||||
pub const ma2480 = CpuModel{
|
||||
.name = "ma2480",
|
||||
.llvm_name = "ma2480",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -271,7 +272,7 @@ pub const cpu = struct {
|
||||
.leon,
|
||||
}),
|
||||
};
|
||||
pub const ma2485 = Cpu{
|
||||
pub const ma2485 = CpuModel{
|
||||
.name = "ma2485",
|
||||
.llvm_name = "ma2485",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -279,7 +280,7 @@ pub const cpu = struct {
|
||||
.leon,
|
||||
}),
|
||||
};
|
||||
pub const ma2x5x = Cpu{
|
||||
pub const ma2x5x = CpuModel{
|
||||
.name = "ma2x5x",
|
||||
.llvm_name = "ma2x5x",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -287,7 +288,7 @@ pub const cpu = struct {
|
||||
.leon,
|
||||
}),
|
||||
};
|
||||
pub const ma2x8x = Cpu{
|
||||
pub const ma2x8x = CpuModel{
|
||||
.name = "ma2x8x",
|
||||
.llvm_name = "ma2x8x",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -295,7 +296,7 @@ pub const cpu = struct {
|
||||
.leon,
|
||||
}),
|
||||
};
|
||||
pub const myriad2 = Cpu{
|
||||
pub const myriad2 = CpuModel{
|
||||
.name = "myriad2",
|
||||
.llvm_name = "myriad2",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -303,7 +304,7 @@ pub const cpu = struct {
|
||||
.leon,
|
||||
}),
|
||||
};
|
||||
pub const myriad2_1 = Cpu{
|
||||
pub const myriad2_1 = CpuModel{
|
||||
.name = "myriad2_1",
|
||||
.llvm_name = "myriad2.1",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -311,7 +312,7 @@ pub const cpu = struct {
|
||||
.leon,
|
||||
}),
|
||||
};
|
||||
pub const myriad2_2 = Cpu{
|
||||
pub const myriad2_2 = CpuModel{
|
||||
.name = "myriad2_2",
|
||||
.llvm_name = "myriad2.2",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -319,7 +320,7 @@ pub const cpu = struct {
|
||||
.leon,
|
||||
}),
|
||||
};
|
||||
pub const myriad2_3 = Cpu{
|
||||
pub const myriad2_3 = CpuModel{
|
||||
.name = "myriad2_3",
|
||||
.llvm_name = "myriad2.3",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -327,7 +328,7 @@ pub const cpu = struct {
|
||||
.leon,
|
||||
}),
|
||||
};
|
||||
pub const niagara = Cpu{
|
||||
pub const niagara = CpuModel{
|
||||
.name = "niagara",
|
||||
.llvm_name = "niagara",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -337,7 +338,7 @@ pub const cpu = struct {
|
||||
.vis2,
|
||||
}),
|
||||
};
|
||||
pub const niagara2 = Cpu{
|
||||
pub const niagara2 = CpuModel{
|
||||
.name = "niagara2",
|
||||
.llvm_name = "niagara2",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -348,7 +349,7 @@ pub const cpu = struct {
|
||||
.vis2,
|
||||
}),
|
||||
};
|
||||
pub const niagara3 = Cpu{
|
||||
pub const niagara3 = CpuModel{
|
||||
.name = "niagara3",
|
||||
.llvm_name = "niagara3",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -359,7 +360,7 @@ pub const cpu = struct {
|
||||
.vis2,
|
||||
}),
|
||||
};
|
||||
pub const niagara4 = Cpu{
|
||||
pub const niagara4 = CpuModel{
|
||||
.name = "niagara4",
|
||||
.llvm_name = "niagara4",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -371,32 +372,32 @@ pub const cpu = struct {
|
||||
.vis3,
|
||||
}),
|
||||
};
|
||||
pub const sparclet = Cpu{
|
||||
pub const sparclet = CpuModel{
|
||||
.name = "sparclet",
|
||||
.llvm_name = "sparclet",
|
||||
.features = featureSet(&[_]Feature{}),
|
||||
};
|
||||
pub const sparclite = Cpu{
|
||||
pub const sparclite = CpuModel{
|
||||
.name = "sparclite",
|
||||
.llvm_name = "sparclite",
|
||||
.features = featureSet(&[_]Feature{}),
|
||||
};
|
||||
pub const sparclite86x = Cpu{
|
||||
pub const sparclite86x = CpuModel{
|
||||
.name = "sparclite86x",
|
||||
.llvm_name = "sparclite86x",
|
||||
.features = featureSet(&[_]Feature{}),
|
||||
};
|
||||
pub const supersparc = Cpu{
|
||||
pub const supersparc = CpuModel{
|
||||
.name = "supersparc",
|
||||
.llvm_name = "supersparc",
|
||||
.features = featureSet(&[_]Feature{}),
|
||||
};
|
||||
pub const tsc701 = Cpu{
|
||||
pub const tsc701 = CpuModel{
|
||||
.name = "tsc701",
|
||||
.llvm_name = "tsc701",
|
||||
.features = featureSet(&[_]Feature{}),
|
||||
};
|
||||
pub const ultrasparc = Cpu{
|
||||
pub const ultrasparc = CpuModel{
|
||||
.name = "ultrasparc",
|
||||
.llvm_name = "ultrasparc",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -405,7 +406,7 @@ pub const cpu = struct {
|
||||
.vis,
|
||||
}),
|
||||
};
|
||||
pub const ultrasparc3 = Cpu{
|
||||
pub const ultrasparc3 = CpuModel{
|
||||
.name = "ultrasparc3",
|
||||
.llvm_name = "ultrasparc3",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -415,7 +416,7 @@ pub const cpu = struct {
|
||||
.vis2,
|
||||
}),
|
||||
};
|
||||
pub const ut699 = Cpu{
|
||||
pub const ut699 = CpuModel{
|
||||
.name = "ut699",
|
||||
.llvm_name = "ut699",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -426,7 +427,7 @@ pub const cpu = struct {
|
||||
.no_fsmuld,
|
||||
}),
|
||||
};
|
||||
pub const v7 = Cpu{
|
||||
pub const v7 = CpuModel{
|
||||
.name = "v7",
|
||||
.llvm_name = "v7",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -434,12 +435,12 @@ pub const cpu = struct {
|
||||
.soft_mul_div,
|
||||
}),
|
||||
};
|
||||
pub const v8 = Cpu{
|
||||
pub const v8 = CpuModel{
|
||||
.name = "v8",
|
||||
.llvm_name = "v8",
|
||||
.features = featureSet(&[_]Feature{}),
|
||||
};
|
||||
pub const v9 = Cpu{
|
||||
pub const v9 = CpuModel{
|
||||
.name = "v9",
|
||||
.llvm_name = "v9",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -451,7 +452,7 @@ pub const cpu = struct {
|
||||
/// All sparc CPUs, sorted alphabetically by name.
|
||||
/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
|
||||
/// compiler has inefficient memory and CPU usage, affecting build times.
|
||||
pub const all_cpus = &[_]*const Cpu{
|
||||
pub const all_cpus = &[_]*const CpuModel{
|
||||
&cpu.at697e,
|
||||
&cpu.at697f,
|
||||
&cpu.f934,
|
||||
|
||||
@ -1,5 +1,6 @@
|
||||
const std = @import("../std.zig");
|
||||
const Cpu = std.Target.Cpu;
|
||||
const CpuFeature = std.Target.Cpu.Feature;
|
||||
const CpuModel = std.Target.Cpu.Model;
|
||||
|
||||
pub const Feature = enum {
|
||||
deflate_conversion,
|
||||
@ -39,12 +40,12 @@ pub const Feature = enum {
|
||||
vector_packed_decimal_enhancement,
|
||||
};
|
||||
|
||||
pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
|
||||
pub usingnamespace CpuFeature.feature_set_fns(Feature);
|
||||
|
||||
pub const all_features = blk: {
|
||||
const len = @typeInfo(Feature).Enum.fields.len;
|
||||
std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
|
||||
var result: [len]Cpu.Feature = undefined;
|
||||
std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
|
||||
var result: [len]CpuFeature = undefined;
|
||||
result[@enumToInt(Feature.deflate_conversion)] = .{
|
||||
.llvm_name = "deflate-conversion",
|
||||
.description = "Assume that the deflate-conversion facility is installed",
|
||||
@ -229,7 +230,7 @@ pub const all_features = blk: {
|
||||
};
|
||||
|
||||
pub const cpu = struct {
|
||||
pub const arch10 = Cpu{
|
||||
pub const arch10 = CpuModel{
|
||||
.name = "arch10",
|
||||
.llvm_name = "arch10",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -252,7 +253,7 @@ pub const cpu = struct {
|
||||
.transactional_execution,
|
||||
}),
|
||||
};
|
||||
pub const arch11 = Cpu{
|
||||
pub const arch11 = CpuModel{
|
||||
.name = "arch11",
|
||||
.llvm_name = "arch11",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -280,7 +281,7 @@ pub const cpu = struct {
|
||||
.vector,
|
||||
}),
|
||||
};
|
||||
pub const arch12 = Cpu{
|
||||
pub const arch12 = CpuModel{
|
||||
.name = "arch12",
|
||||
.llvm_name = "arch12",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -315,7 +316,7 @@ pub const cpu = struct {
|
||||
.vector_packed_decimal,
|
||||
}),
|
||||
};
|
||||
pub const arch13 = Cpu{
|
||||
pub const arch13 = CpuModel{
|
||||
.name = "arch13",
|
||||
.llvm_name = "arch13",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -356,12 +357,12 @@ pub const cpu = struct {
|
||||
.vector_packed_decimal_enhancement,
|
||||
}),
|
||||
};
|
||||
pub const arch8 = Cpu{
|
||||
pub const arch8 = CpuModel{
|
||||
.name = "arch8",
|
||||
.llvm_name = "arch8",
|
||||
.features = featureSet(&[_]Feature{}),
|
||||
};
|
||||
pub const arch9 = Cpu{
|
||||
pub const arch9 = CpuModel{
|
||||
.name = "arch9",
|
||||
.llvm_name = "arch9",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -377,17 +378,17 @@ pub const cpu = struct {
|
||||
.reset_reference_bits_multiple,
|
||||
}),
|
||||
};
|
||||
pub const generic = Cpu{
|
||||
pub const generic = CpuModel{
|
||||
.name = "generic",
|
||||
.llvm_name = "generic",
|
||||
.features = featureSet(&[_]Feature{}),
|
||||
};
|
||||
pub const z10 = Cpu{
|
||||
pub const z10 = CpuModel{
|
||||
.name = "z10",
|
||||
.llvm_name = "z10",
|
||||
.features = featureSet(&[_]Feature{}),
|
||||
};
|
||||
pub const z13 = Cpu{
|
||||
pub const z13 = CpuModel{
|
||||
.name = "z13",
|
||||
.llvm_name = "z13",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -415,7 +416,7 @@ pub const cpu = struct {
|
||||
.vector,
|
||||
}),
|
||||
};
|
||||
pub const z14 = Cpu{
|
||||
pub const z14 = CpuModel{
|
||||
.name = "z14",
|
||||
.llvm_name = "z14",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -450,7 +451,7 @@ pub const cpu = struct {
|
||||
.vector_packed_decimal,
|
||||
}),
|
||||
};
|
||||
pub const z196 = Cpu{
|
||||
pub const z196 = CpuModel{
|
||||
.name = "z196",
|
||||
.llvm_name = "z196",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -466,7 +467,7 @@ pub const cpu = struct {
|
||||
.reset_reference_bits_multiple,
|
||||
}),
|
||||
};
|
||||
pub const zEC12 = Cpu{
|
||||
pub const zEC12 = CpuModel{
|
||||
.name = "zEC12",
|
||||
.llvm_name = "zEC12",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -494,7 +495,7 @@ pub const cpu = struct {
|
||||
/// All systemz CPUs, sorted alphabetically by name.
|
||||
/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
|
||||
/// compiler has inefficient memory and CPU usage, affecting build times.
|
||||
pub const all_cpus = &[_]*const Cpu{
|
||||
pub const all_cpus = &[_]*const CpuModel{
|
||||
&cpu.arch10,
|
||||
&cpu.arch11,
|
||||
&cpu.arch12,
|
||||
|
||||
@ -1,5 +1,6 @@
|
||||
const std = @import("../std.zig");
|
||||
const Cpu = std.Target.Cpu;
|
||||
const CpuFeature = std.Target.Cpu.Feature;
|
||||
const CpuModel = std.Target.Cpu.Model;
|
||||
|
||||
pub const Feature = enum {
|
||||
atomics,
|
||||
@ -14,12 +15,12 @@ pub const Feature = enum {
|
||||
unimplemented_simd128,
|
||||
};
|
||||
|
||||
pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
|
||||
pub usingnamespace CpuFeature.feature_set_fns(Feature);
|
||||
|
||||
pub const all_features = blk: {
|
||||
const len = @typeInfo(Feature).Enum.fields.len;
|
||||
std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
|
||||
var result: [len]Cpu.Feature = undefined;
|
||||
std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
|
||||
var result: [len]CpuFeature = undefined;
|
||||
result[@enumToInt(Feature.atomics)] = .{
|
||||
.llvm_name = "atomics",
|
||||
.description = "Enable Atomics",
|
||||
@ -81,7 +82,7 @@ pub const all_features = blk: {
|
||||
};
|
||||
|
||||
pub const cpu = struct {
|
||||
pub const bleeding_edge = Cpu{
|
||||
pub const bleeding_edge = CpuModel{
|
||||
.name = "bleeding_edge",
|
||||
.llvm_name = "bleeding-edge",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -92,12 +93,12 @@ pub const cpu = struct {
|
||||
.simd128,
|
||||
}),
|
||||
};
|
||||
pub const generic = Cpu{
|
||||
pub const generic = CpuModel{
|
||||
.name = "generic",
|
||||
.llvm_name = "generic",
|
||||
.features = featureSet(&[_]Feature{}),
|
||||
};
|
||||
pub const mvp = Cpu{
|
||||
pub const mvp = CpuModel{
|
||||
.name = "mvp",
|
||||
.llvm_name = "mvp",
|
||||
.features = featureSet(&[_]Feature{}),
|
||||
@ -107,7 +108,7 @@ pub const cpu = struct {
|
||||
/// All wasm CPUs, sorted alphabetically by name.
|
||||
/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
|
||||
/// compiler has inefficient memory and CPU usage, affecting build times.
|
||||
pub const all_cpus = &[_]*const Cpu{
|
||||
pub const all_cpus = &[_]*const CpuModel{
|
||||
&cpu.bleeding_edge,
|
||||
&cpu.generic,
|
||||
&cpu.mvp,
|
||||
|
||||
@ -1,5 +1,6 @@
|
||||
const std = @import("../std.zig");
|
||||
const Cpu = std.Target.Cpu;
|
||||
const CpuFeature = std.Target.Cpu.Feature;
|
||||
const CpuModel = std.Target.Cpu.Model;
|
||||
|
||||
pub const Feature = enum {
|
||||
@"3dnow",
|
||||
@ -125,12 +126,12 @@ pub const Feature = enum {
|
||||
xsaves,
|
||||
};
|
||||
|
||||
pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
|
||||
pub usingnamespace CpuFeature.feature_set_fns(Feature);
|
||||
|
||||
pub const all_features = blk: {
|
||||
const len = @typeInfo(Feature).Enum.fields.len;
|
||||
std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
|
||||
var result: [len]Cpu.Feature = undefined;
|
||||
std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
|
||||
var result: [len]CpuFeature = undefined;
|
||||
result[@enumToInt(Feature.@"3dnow")] = .{
|
||||
.llvm_name = "3dnow",
|
||||
.description = "Enable 3DNow! instructions",
|
||||
@ -829,7 +830,7 @@ pub const all_features = blk: {
|
||||
};
|
||||
|
||||
pub const cpu = struct {
|
||||
pub const amdfam10 = Cpu{
|
||||
pub const amdfam10 = CpuModel{
|
||||
.name = "amdfam10",
|
||||
.llvm_name = "amdfam10",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -849,7 +850,7 @@ pub const cpu = struct {
|
||||
.x87,
|
||||
}),
|
||||
};
|
||||
pub const athlon = Cpu{
|
||||
pub const athlon = CpuModel{
|
||||
.name = "athlon",
|
||||
.llvm_name = "athlon",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -862,7 +863,7 @@ pub const cpu = struct {
|
||||
.x87,
|
||||
}),
|
||||
};
|
||||
pub const athlon_4 = Cpu{
|
||||
pub const athlon_4 = CpuModel{
|
||||
.name = "athlon_4",
|
||||
.llvm_name = "athlon-4",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -877,7 +878,7 @@ pub const cpu = struct {
|
||||
.x87,
|
||||
}),
|
||||
};
|
||||
pub const athlon_fx = Cpu{
|
||||
pub const athlon_fx = CpuModel{
|
||||
.name = "athlon_fx",
|
||||
.llvm_name = "athlon-fx",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -894,7 +895,7 @@ pub const cpu = struct {
|
||||
.x87,
|
||||
}),
|
||||
};
|
||||
pub const athlon_mp = Cpu{
|
||||
pub const athlon_mp = CpuModel{
|
||||
.name = "athlon_mp",
|
||||
.llvm_name = "athlon-mp",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -909,7 +910,7 @@ pub const cpu = struct {
|
||||
.x87,
|
||||
}),
|
||||
};
|
||||
pub const athlon_tbird = Cpu{
|
||||
pub const athlon_tbird = CpuModel{
|
||||
.name = "athlon_tbird",
|
||||
.llvm_name = "athlon-tbird",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -922,7 +923,7 @@ pub const cpu = struct {
|
||||
.x87,
|
||||
}),
|
||||
};
|
||||
pub const athlon_xp = Cpu{
|
||||
pub const athlon_xp = CpuModel{
|
||||
.name = "athlon_xp",
|
||||
.llvm_name = "athlon-xp",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -937,7 +938,7 @@ pub const cpu = struct {
|
||||
.x87,
|
||||
}),
|
||||
};
|
||||
pub const athlon64 = Cpu{
|
||||
pub const athlon64 = CpuModel{
|
||||
.name = "athlon64",
|
||||
.llvm_name = "athlon64",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -954,7 +955,7 @@ pub const cpu = struct {
|
||||
.x87,
|
||||
}),
|
||||
};
|
||||
pub const athlon64_sse3 = Cpu{
|
||||
pub const athlon64_sse3 = CpuModel{
|
||||
.name = "athlon64_sse3",
|
||||
.llvm_name = "athlon64-sse3",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -972,7 +973,7 @@ pub const cpu = struct {
|
||||
.x87,
|
||||
}),
|
||||
};
|
||||
pub const atom = Cpu{
|
||||
pub const atom = CpuModel{
|
||||
.name = "atom",
|
||||
.llvm_name = "atom",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -996,7 +997,7 @@ pub const cpu = struct {
|
||||
.x87,
|
||||
}),
|
||||
};
|
||||
pub const barcelona = Cpu{
|
||||
pub const barcelona = CpuModel{
|
||||
.name = "barcelona",
|
||||
.llvm_name = "barcelona",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -1016,7 +1017,7 @@ pub const cpu = struct {
|
||||
.x87,
|
||||
}),
|
||||
};
|
||||
pub const bdver1 = Cpu{
|
||||
pub const bdver1 = CpuModel{
|
||||
.name = "bdver1",
|
||||
.llvm_name = "bdver1",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -1043,7 +1044,7 @@ pub const cpu = struct {
|
||||
.xsave,
|
||||
}),
|
||||
};
|
||||
pub const bdver2 = Cpu{
|
||||
pub const bdver2 = CpuModel{
|
||||
.name = "bdver2",
|
||||
.llvm_name = "bdver2",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -1075,7 +1076,7 @@ pub const cpu = struct {
|
||||
.xsave,
|
||||
}),
|
||||
};
|
||||
pub const bdver3 = Cpu{
|
||||
pub const bdver3 = CpuModel{
|
||||
.name = "bdver3",
|
||||
.llvm_name = "bdver3",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -1109,7 +1110,7 @@ pub const cpu = struct {
|
||||
.xsaveopt,
|
||||
}),
|
||||
};
|
||||
pub const bdver4 = Cpu{
|
||||
pub const bdver4 = CpuModel{
|
||||
.name = "bdver4",
|
||||
.llvm_name = "bdver4",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -1146,7 +1147,7 @@ pub const cpu = struct {
|
||||
.xsaveopt,
|
||||
}),
|
||||
};
|
||||
pub const bonnell = Cpu{
|
||||
pub const bonnell = CpuModel{
|
||||
.name = "bonnell",
|
||||
.llvm_name = "bonnell",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -1170,7 +1171,7 @@ pub const cpu = struct {
|
||||
.x87,
|
||||
}),
|
||||
};
|
||||
pub const broadwell = Cpu{
|
||||
pub const broadwell = CpuModel{
|
||||
.name = "broadwell",
|
||||
.llvm_name = "broadwell",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -1214,7 +1215,7 @@ pub const cpu = struct {
|
||||
.xsaveopt,
|
||||
}),
|
||||
};
|
||||
pub const btver1 = Cpu{
|
||||
pub const btver1 = CpuModel{
|
||||
.name = "btver1",
|
||||
.llvm_name = "btver1",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -1238,7 +1239,7 @@ pub const cpu = struct {
|
||||
.x87,
|
||||
}),
|
||||
};
|
||||
pub const btver2 = Cpu{
|
||||
pub const btver2 = CpuModel{
|
||||
.name = "btver2",
|
||||
.llvm_name = "btver2",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -1274,7 +1275,7 @@ pub const cpu = struct {
|
||||
.xsaveopt,
|
||||
}),
|
||||
};
|
||||
pub const c3 = Cpu{
|
||||
pub const c3 = CpuModel{
|
||||
.name = "c3",
|
||||
.llvm_name = "c3",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -1283,7 +1284,7 @@ pub const cpu = struct {
|
||||
.x87,
|
||||
}),
|
||||
};
|
||||
pub const c3_2 = Cpu{
|
||||
pub const c3_2 = CpuModel{
|
||||
.name = "c3_2",
|
||||
.llvm_name = "c3-2",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -1296,7 +1297,7 @@ pub const cpu = struct {
|
||||
.x87,
|
||||
}),
|
||||
};
|
||||
pub const cannonlake = Cpu{
|
||||
pub const cannonlake = CpuModel{
|
||||
.name = "cannonlake",
|
||||
.llvm_name = "cannonlake",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -1355,7 +1356,7 @@ pub const cpu = struct {
|
||||
.xsaves,
|
||||
}),
|
||||
};
|
||||
pub const cascadelake = Cpu{
|
||||
pub const cascadelake = CpuModel{
|
||||
.name = "cascadelake",
|
||||
.llvm_name = "cascadelake",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -1413,7 +1414,7 @@ pub const cpu = struct {
|
||||
.xsaves,
|
||||
}),
|
||||
};
|
||||
pub const cooperlake = Cpu{
|
||||
pub const cooperlake = CpuModel{
|
||||
.name = "cooperlake",
|
||||
.llvm_name = "cooperlake",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -1472,7 +1473,7 @@ pub const cpu = struct {
|
||||
.xsaves,
|
||||
}),
|
||||
};
|
||||
pub const core_avx_i = Cpu{
|
||||
pub const core_avx_i = CpuModel{
|
||||
.name = "core_avx_i",
|
||||
.llvm_name = "core-avx-i",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -1504,7 +1505,7 @@ pub const cpu = struct {
|
||||
.xsaveopt,
|
||||
}),
|
||||
};
|
||||
pub const core_avx2 = Cpu{
|
||||
pub const core_avx2 = CpuModel{
|
||||
.name = "core_avx2",
|
||||
.llvm_name = "core-avx2",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -1545,7 +1546,7 @@ pub const cpu = struct {
|
||||
.xsaveopt,
|
||||
}),
|
||||
};
|
||||
pub const core2 = Cpu{
|
||||
pub const core2 = CpuModel{
|
||||
.name = "core2",
|
||||
.llvm_name = "core2",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -1563,7 +1564,7 @@ pub const cpu = struct {
|
||||
.x87,
|
||||
}),
|
||||
};
|
||||
pub const corei7 = Cpu{
|
||||
pub const corei7 = CpuModel{
|
||||
.name = "corei7",
|
||||
.llvm_name = "corei7",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -1581,7 +1582,7 @@ pub const cpu = struct {
|
||||
.x87,
|
||||
}),
|
||||
};
|
||||
pub const corei7_avx = Cpu{
|
||||
pub const corei7_avx = CpuModel{
|
||||
.name = "corei7_avx",
|
||||
.llvm_name = "corei7-avx",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -1610,7 +1611,7 @@ pub const cpu = struct {
|
||||
.xsaveopt,
|
||||
}),
|
||||
};
|
||||
pub const generic = Cpu{
|
||||
pub const generic = CpuModel{
|
||||
.name = "generic",
|
||||
.llvm_name = "generic",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -1619,7 +1620,7 @@ pub const cpu = struct {
|
||||
.x87,
|
||||
}),
|
||||
};
|
||||
pub const geode = Cpu{
|
||||
pub const geode = CpuModel{
|
||||
.name = "geode",
|
||||
.llvm_name = "geode",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -1629,7 +1630,7 @@ pub const cpu = struct {
|
||||
.x87,
|
||||
}),
|
||||
};
|
||||
pub const goldmont = Cpu{
|
||||
pub const goldmont = CpuModel{
|
||||
.name = "goldmont",
|
||||
.llvm_name = "goldmont",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -1665,7 +1666,7 @@ pub const cpu = struct {
|
||||
.xsaves,
|
||||
}),
|
||||
};
|
||||
pub const goldmont_plus = Cpu{
|
||||
pub const goldmont_plus = CpuModel{
|
||||
.name = "goldmont_plus",
|
||||
.llvm_name = "goldmont-plus",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -1703,7 +1704,7 @@ pub const cpu = struct {
|
||||
.xsaves,
|
||||
}),
|
||||
};
|
||||
pub const haswell = Cpu{
|
||||
pub const haswell = CpuModel{
|
||||
.name = "haswell",
|
||||
.llvm_name = "haswell",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -1744,7 +1745,7 @@ pub const cpu = struct {
|
||||
.xsaveopt,
|
||||
}),
|
||||
};
|
||||
pub const _i386 = Cpu{
|
||||
pub const _i386 = CpuModel{
|
||||
.name = "_i386",
|
||||
.llvm_name = "i386",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -1752,7 +1753,7 @@ pub const cpu = struct {
|
||||
.x87,
|
||||
}),
|
||||
};
|
||||
pub const _i486 = Cpu{
|
||||
pub const _i486 = CpuModel{
|
||||
.name = "_i486",
|
||||
.llvm_name = "i486",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -1760,7 +1761,7 @@ pub const cpu = struct {
|
||||
.x87,
|
||||
}),
|
||||
};
|
||||
pub const _i586 = Cpu{
|
||||
pub const _i586 = CpuModel{
|
||||
.name = "_i586",
|
||||
.llvm_name = "i586",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -1769,7 +1770,7 @@ pub const cpu = struct {
|
||||
.x87,
|
||||
}),
|
||||
};
|
||||
pub const _i686 = Cpu{
|
||||
pub const _i686 = CpuModel{
|
||||
.name = "_i686",
|
||||
.llvm_name = "i686",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -1779,7 +1780,7 @@ pub const cpu = struct {
|
||||
.x87,
|
||||
}),
|
||||
};
|
||||
pub const icelake_client = Cpu{
|
||||
pub const icelake_client = CpuModel{
|
||||
.name = "icelake_client",
|
||||
.llvm_name = "icelake-client",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -1847,7 +1848,7 @@ pub const cpu = struct {
|
||||
.xsaves,
|
||||
}),
|
||||
};
|
||||
pub const icelake_server = Cpu{
|
||||
pub const icelake_server = CpuModel{
|
||||
.name = "icelake_server",
|
||||
.llvm_name = "icelake-server",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -1917,7 +1918,7 @@ pub const cpu = struct {
|
||||
.xsaves,
|
||||
}),
|
||||
};
|
||||
pub const ivybridge = Cpu{
|
||||
pub const ivybridge = CpuModel{
|
||||
.name = "ivybridge",
|
||||
.llvm_name = "ivybridge",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -1949,7 +1950,7 @@ pub const cpu = struct {
|
||||
.xsaveopt,
|
||||
}),
|
||||
};
|
||||
pub const k6 = Cpu{
|
||||
pub const k6 = CpuModel{
|
||||
.name = "k6",
|
||||
.llvm_name = "k6",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -1959,7 +1960,7 @@ pub const cpu = struct {
|
||||
.x87,
|
||||
}),
|
||||
};
|
||||
pub const k6_2 = Cpu{
|
||||
pub const k6_2 = CpuModel{
|
||||
.name = "k6_2",
|
||||
.llvm_name = "k6-2",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -1969,7 +1970,7 @@ pub const cpu = struct {
|
||||
.x87,
|
||||
}),
|
||||
};
|
||||
pub const k6_3 = Cpu{
|
||||
pub const k6_3 = CpuModel{
|
||||
.name = "k6_3",
|
||||
.llvm_name = "k6-3",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -1979,7 +1980,7 @@ pub const cpu = struct {
|
||||
.x87,
|
||||
}),
|
||||
};
|
||||
pub const k8 = Cpu{
|
||||
pub const k8 = CpuModel{
|
||||
.name = "k8",
|
||||
.llvm_name = "k8",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -1996,7 +1997,7 @@ pub const cpu = struct {
|
||||
.x87,
|
||||
}),
|
||||
};
|
||||
pub const k8_sse3 = Cpu{
|
||||
pub const k8_sse3 = CpuModel{
|
||||
.name = "k8_sse3",
|
||||
.llvm_name = "k8-sse3",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -2014,7 +2015,7 @@ pub const cpu = struct {
|
||||
.x87,
|
||||
}),
|
||||
};
|
||||
pub const knl = Cpu{
|
||||
pub const knl = CpuModel{
|
||||
.name = "knl",
|
||||
.llvm_name = "knl",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -2057,7 +2058,7 @@ pub const cpu = struct {
|
||||
.xsaveopt,
|
||||
}),
|
||||
};
|
||||
pub const knm = Cpu{
|
||||
pub const knm = CpuModel{
|
||||
.name = "knm",
|
||||
.llvm_name = "knm",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -2101,12 +2102,12 @@ pub const cpu = struct {
|
||||
.xsaveopt,
|
||||
}),
|
||||
};
|
||||
pub const lakemont = Cpu{
|
||||
pub const lakemont = CpuModel{
|
||||
.name = "lakemont",
|
||||
.llvm_name = "lakemont",
|
||||
.features = featureSet(&[_]Feature{}),
|
||||
};
|
||||
pub const nehalem = Cpu{
|
||||
pub const nehalem = CpuModel{
|
||||
.name = "nehalem",
|
||||
.llvm_name = "nehalem",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -2124,7 +2125,7 @@ pub const cpu = struct {
|
||||
.x87,
|
||||
}),
|
||||
};
|
||||
pub const nocona = Cpu{
|
||||
pub const nocona = CpuModel{
|
||||
.name = "nocona",
|
||||
.llvm_name = "nocona",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -2140,7 +2141,7 @@ pub const cpu = struct {
|
||||
.x87,
|
||||
}),
|
||||
};
|
||||
pub const opteron = Cpu{
|
||||
pub const opteron = CpuModel{
|
||||
.name = "opteron",
|
||||
.llvm_name = "opteron",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -2157,7 +2158,7 @@ pub const cpu = struct {
|
||||
.x87,
|
||||
}),
|
||||
};
|
||||
pub const opteron_sse3 = Cpu{
|
||||
pub const opteron_sse3 = CpuModel{
|
||||
.name = "opteron_sse3",
|
||||
.llvm_name = "opteron-sse3",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -2175,7 +2176,7 @@ pub const cpu = struct {
|
||||
.x87,
|
||||
}),
|
||||
};
|
||||
pub const penryn = Cpu{
|
||||
pub const penryn = CpuModel{
|
||||
.name = "penryn",
|
||||
.llvm_name = "penryn",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -2193,7 +2194,7 @@ pub const cpu = struct {
|
||||
.x87,
|
||||
}),
|
||||
};
|
||||
pub const pentium = Cpu{
|
||||
pub const pentium = CpuModel{
|
||||
.name = "pentium",
|
||||
.llvm_name = "pentium",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -2202,7 +2203,7 @@ pub const cpu = struct {
|
||||
.x87,
|
||||
}),
|
||||
};
|
||||
pub const pentium_m = Cpu{
|
||||
pub const pentium_m = CpuModel{
|
||||
.name = "pentium_m",
|
||||
.llvm_name = "pentium-m",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -2216,7 +2217,7 @@ pub const cpu = struct {
|
||||
.x87,
|
||||
}),
|
||||
};
|
||||
pub const pentium_mmx = Cpu{
|
||||
pub const pentium_mmx = CpuModel{
|
||||
.name = "pentium_mmx",
|
||||
.llvm_name = "pentium-mmx",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -2226,7 +2227,7 @@ pub const cpu = struct {
|
||||
.x87,
|
||||
}),
|
||||
};
|
||||
pub const pentium2 = Cpu{
|
||||
pub const pentium2 = CpuModel{
|
||||
.name = "pentium2",
|
||||
.llvm_name = "pentium2",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -2239,7 +2240,7 @@ pub const cpu = struct {
|
||||
.x87,
|
||||
}),
|
||||
};
|
||||
pub const pentium3 = Cpu{
|
||||
pub const pentium3 = CpuModel{
|
||||
.name = "pentium3",
|
||||
.llvm_name = "pentium3",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -2253,7 +2254,7 @@ pub const cpu = struct {
|
||||
.x87,
|
||||
}),
|
||||
};
|
||||
pub const pentium3m = Cpu{
|
||||
pub const pentium3m = CpuModel{
|
||||
.name = "pentium3m",
|
||||
.llvm_name = "pentium3m",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -2267,7 +2268,7 @@ pub const cpu = struct {
|
||||
.x87,
|
||||
}),
|
||||
};
|
||||
pub const pentium4 = Cpu{
|
||||
pub const pentium4 = CpuModel{
|
||||
.name = "pentium4",
|
||||
.llvm_name = "pentium4",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -2281,7 +2282,7 @@ pub const cpu = struct {
|
||||
.x87,
|
||||
}),
|
||||
};
|
||||
pub const pentium4m = Cpu{
|
||||
pub const pentium4m = CpuModel{
|
||||
.name = "pentium4m",
|
||||
.llvm_name = "pentium4m",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -2295,7 +2296,7 @@ pub const cpu = struct {
|
||||
.x87,
|
||||
}),
|
||||
};
|
||||
pub const pentiumpro = Cpu{
|
||||
pub const pentiumpro = CpuModel{
|
||||
.name = "pentiumpro",
|
||||
.llvm_name = "pentiumpro",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -2306,7 +2307,7 @@ pub const cpu = struct {
|
||||
.x87,
|
||||
}),
|
||||
};
|
||||
pub const prescott = Cpu{
|
||||
pub const prescott = CpuModel{
|
||||
.name = "prescott",
|
||||
.llvm_name = "prescott",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -2320,7 +2321,7 @@ pub const cpu = struct {
|
||||
.x87,
|
||||
}),
|
||||
};
|
||||
pub const sandybridge = Cpu{
|
||||
pub const sandybridge = CpuModel{
|
||||
.name = "sandybridge",
|
||||
.llvm_name = "sandybridge",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -2349,7 +2350,7 @@ pub const cpu = struct {
|
||||
.xsaveopt,
|
||||
}),
|
||||
};
|
||||
pub const silvermont = Cpu{
|
||||
pub const silvermont = CpuModel{
|
||||
.name = "silvermont",
|
||||
.llvm_name = "silvermont",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -2377,7 +2378,7 @@ pub const cpu = struct {
|
||||
.x87,
|
||||
}),
|
||||
};
|
||||
pub const skx = Cpu{
|
||||
pub const skx = CpuModel{
|
||||
.name = "skx",
|
||||
.llvm_name = "skx",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -2434,7 +2435,7 @@ pub const cpu = struct {
|
||||
.xsaves,
|
||||
}),
|
||||
};
|
||||
pub const skylake = Cpu{
|
||||
pub const skylake = CpuModel{
|
||||
.name = "skylake",
|
||||
.llvm_name = "skylake",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -2485,7 +2486,7 @@ pub const cpu = struct {
|
||||
.xsaves,
|
||||
}),
|
||||
};
|
||||
pub const skylake_avx512 = Cpu{
|
||||
pub const skylake_avx512 = CpuModel{
|
||||
.name = "skylake_avx512",
|
||||
.llvm_name = "skylake-avx512",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -2542,7 +2543,7 @@ pub const cpu = struct {
|
||||
.xsaves,
|
||||
}),
|
||||
};
|
||||
pub const slm = Cpu{
|
||||
pub const slm = CpuModel{
|
||||
.name = "slm",
|
||||
.llvm_name = "slm",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -2570,7 +2571,7 @@ pub const cpu = struct {
|
||||
.x87,
|
||||
}),
|
||||
};
|
||||
pub const tremont = Cpu{
|
||||
pub const tremont = CpuModel{
|
||||
.name = "tremont",
|
||||
.llvm_name = "tremont",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -2613,7 +2614,7 @@ pub const cpu = struct {
|
||||
.xsaves,
|
||||
}),
|
||||
};
|
||||
pub const westmere = Cpu{
|
||||
pub const westmere = CpuModel{
|
||||
.name = "westmere",
|
||||
.llvm_name = "westmere",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -2632,7 +2633,7 @@ pub const cpu = struct {
|
||||
.x87,
|
||||
}),
|
||||
};
|
||||
pub const winchip_c6 = Cpu{
|
||||
pub const winchip_c6 = CpuModel{
|
||||
.name = "winchip_c6",
|
||||
.llvm_name = "winchip-c6",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -2641,7 +2642,7 @@ pub const cpu = struct {
|
||||
.x87,
|
||||
}),
|
||||
};
|
||||
pub const winchip2 = Cpu{
|
||||
pub const winchip2 = CpuModel{
|
||||
.name = "winchip2",
|
||||
.llvm_name = "winchip2",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -2650,7 +2651,7 @@ pub const cpu = struct {
|
||||
.x87,
|
||||
}),
|
||||
};
|
||||
pub const x86_64 = Cpu{
|
||||
pub const x86_64 = CpuModel{
|
||||
.name = "x86_64",
|
||||
.llvm_name = "x86-64",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -2667,7 +2668,7 @@ pub const cpu = struct {
|
||||
.x87,
|
||||
}),
|
||||
};
|
||||
pub const yonah = Cpu{
|
||||
pub const yonah = CpuModel{
|
||||
.name = "yonah",
|
||||
.llvm_name = "yonah",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -2681,7 +2682,7 @@ pub const cpu = struct {
|
||||
.x87,
|
||||
}),
|
||||
};
|
||||
pub const znver1 = Cpu{
|
||||
pub const znver1 = CpuModel{
|
||||
.name = "znver1",
|
||||
.llvm_name = "znver1",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -2725,7 +2726,7 @@ pub const cpu = struct {
|
||||
.xsaves,
|
||||
}),
|
||||
};
|
||||
pub const znver2 = Cpu{
|
||||
pub const znver2 = CpuModel{
|
||||
.name = "znver2",
|
||||
.llvm_name = "znver2",
|
||||
.features = featureSet(&[_]Feature{
|
||||
@ -2777,7 +2778,7 @@ pub const cpu = struct {
|
||||
/// All x86 CPUs, sorted alphabetically by name.
|
||||
/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
|
||||
/// compiler has inefficient memory and CPU usage, affecting build times.
|
||||
pub const all_cpus = &[_]*const Cpu{
|
||||
pub const all_cpus = &[_]*const CpuModel{
|
||||
&cpu.amdfam10,
|
||||
&cpu.athlon,
|
||||
&cpu.athlon_4,
|
||||
|
||||
@ -577,10 +577,9 @@ pub fn detectNativeDynamicLinker(allocator: *Allocator) error{
|
||||
// skip adding it to `ld_info_list`.
|
||||
const target: Target = .{
|
||||
.Cross = .{
|
||||
.arch = Target.current.getArch(),
|
||||
.cpu = Target.Cpu.baseline(Target.current.getArch()),
|
||||
.os = Target.current.getOs(),
|
||||
.abi = abi,
|
||||
.cpu_features = Target.current.getArch().getBaselineCpuFeatures(),
|
||||
},
|
||||
};
|
||||
const standard_ld_path = target.getStandardDynamicLinkerPath(allocator) catch |err| switch (err) {
|
||||
|
||||
@ -113,37 +113,14 @@ pub fn cmdTargets(
|
||||
try jws.beginObject();
|
||||
|
||||
try jws.objectField("arch");
|
||||
try jws.beginObject();
|
||||
try jws.beginArray();
|
||||
{
|
||||
inline for (@typeInfo(Target.Arch).Union.fields) |field| {
|
||||
try jws.objectField(field.name);
|
||||
if (field.field_type == void) {
|
||||
try jws.emitNull();
|
||||
} else {
|
||||
try jws.emitString(@typeName(field.field_type));
|
||||
}
|
||||
}
|
||||
}
|
||||
try jws.endObject();
|
||||
|
||||
try jws.objectField("subArch");
|
||||
try jws.beginObject();
|
||||
const sub_arch_list = [_]type{
|
||||
Target.Arch.Arm32,
|
||||
Target.Arch.Arm64,
|
||||
Target.Arch.Kalimba,
|
||||
Target.Arch.Mips,
|
||||
};
|
||||
inline for (sub_arch_list) |SubArch| {
|
||||
try jws.objectField(@typeName(SubArch));
|
||||
try jws.beginArray();
|
||||
inline for (@typeInfo(SubArch).Enum.fields) |field| {
|
||||
inline for (@typeInfo(Target.Cpu.Arch).Enum.fields) |field| {
|
||||
try jws.arrayElem();
|
||||
try jws.emitString(field.name);
|
||||
}
|
||||
try jws.endArray();
|
||||
}
|
||||
try jws.endObject();
|
||||
try jws.endArray();
|
||||
|
||||
try jws.objectField("os");
|
||||
try jws.beginArray();
|
||||
@ -179,15 +156,15 @@ pub fn cmdTargets(
|
||||
|
||||
try jws.objectField("cpus");
|
||||
try jws.beginObject();
|
||||
inline for (@typeInfo(Target.Arch).Union.fields) |field| {
|
||||
inline for (@typeInfo(Target.Cpu.Arch).Enum.fields) |field| {
|
||||
try jws.objectField(field.name);
|
||||
try jws.beginObject();
|
||||
const arch = @unionInit(Target.Arch, field.name, undefined);
|
||||
for (arch.allCpus()) |cpu| {
|
||||
try jws.objectField(cpu.name);
|
||||
const arch = @field(Target.Cpu.Arch, field.name);
|
||||
for (arch.allCpuModels()) |model| {
|
||||
try jws.objectField(model.name);
|
||||
try jws.beginArray();
|
||||
for (arch.allFeaturesList()) |feature, i| {
|
||||
if (cpu.features.isEnabled(@intCast(u8, i))) {
|
||||
if (model.features.isEnabled(@intCast(u8, i))) {
|
||||
try jws.arrayElem();
|
||||
try jws.emitString(feature.name);
|
||||
}
|
||||
@ -200,10 +177,10 @@ pub fn cmdTargets(
|
||||
|
||||
try jws.objectField("cpuFeatures");
|
||||
try jws.beginObject();
|
||||
inline for (@typeInfo(Target.Arch).Union.fields) |field| {
|
||||
inline for (@typeInfo(Target.Cpu.Arch).Enum.fields) |field| {
|
||||
try jws.objectField(field.name);
|
||||
try jws.beginArray();
|
||||
const arch = @unionInit(Target.Arch, field.name, undefined);
|
||||
const arch = @field(Target.Cpu.Arch, field.name);
|
||||
for (arch.allFeaturesList()) |feature| {
|
||||
try jws.arrayElem();
|
||||
try jws.emitString(feature.name);
|
||||
@ -220,27 +197,34 @@ pub fn cmdTargets(
|
||||
try jws.objectField("triple");
|
||||
try jws.emitString(triple);
|
||||
}
|
||||
try jws.objectField("arch");
|
||||
try jws.emitString(@tagName(native_target.getArch()));
|
||||
{
|
||||
try jws.objectField("cpu");
|
||||
try jws.beginObject();
|
||||
try jws.objectField("arch");
|
||||
try jws.emitString(@tagName(native_target.getArch()));
|
||||
|
||||
try jws.objectField("name");
|
||||
const cpu = native_target.getCpu();
|
||||
try jws.emitString(cpu.model.name);
|
||||
|
||||
{
|
||||
try jws.objectField("features");
|
||||
try jws.beginArray();
|
||||
for (native_target.getArch().allFeaturesList()) |feature, i_usize| {
|
||||
const index = @intCast(Target.Cpu.Feature.Set.Index, i_usize);
|
||||
if (cpu.features.isEnabled(index)) {
|
||||
try jws.arrayElem();
|
||||
try jws.emitString(feature.name);
|
||||
}
|
||||
}
|
||||
try jws.endArray();
|
||||
}
|
||||
try jws.endObject();
|
||||
}
|
||||
try jws.objectField("os");
|
||||
try jws.emitString(@tagName(native_target.getOs()));
|
||||
try jws.objectField("abi");
|
||||
try jws.emitString(@tagName(native_target.getAbi()));
|
||||
try jws.objectField("cpuName");
|
||||
const cpu_features = native_target.getCpuFeatures();
|
||||
try jws.emitString(cpu_features.cpu.name);
|
||||
{
|
||||
try jws.objectField("cpuFeatures");
|
||||
try jws.beginArray();
|
||||
for (native_target.getArch().allFeaturesList()) |feature, i_usize| {
|
||||
const index = @intCast(Target.Cpu.Feature.Set.Index, i_usize);
|
||||
if (cpu_features.features.isEnabled(index)) {
|
||||
try jws.arrayElem();
|
||||
try jws.emitString(feature.name);
|
||||
}
|
||||
}
|
||||
try jws.endArray();
|
||||
}
|
||||
// TODO implement native glibc version detection in self-hosted
|
||||
try jws.endObject();
|
||||
|
||||
|
||||
@ -88,7 +88,6 @@ const Error = extern enum {
|
||||
IsAsync,
|
||||
ImportOutsidePkgPath,
|
||||
UnknownCpu,
|
||||
UnknownSubArchitecture,
|
||||
UnknownCpuFeature,
|
||||
InvalidCpuFeatures,
|
||||
InvalidLlvmCpuFeaturesFormat,
|
||||
@ -560,25 +559,26 @@ export fn stage2_progress_update_node(node: *std.Progress.Node, done_count: usiz
|
||||
node.context.maybeRefresh();
|
||||
}
|
||||
|
||||
fn cpuFeaturesFromLLVM(
|
||||
arch: Target.Arch,
|
||||
fn detectNativeCpuWithLLVM(
|
||||
arch: Target.Cpu.Arch,
|
||||
llvm_cpu_name_z: ?[*:0]const u8,
|
||||
llvm_cpu_features_opt: ?[*:0]const u8,
|
||||
) !Target.CpuFeatures {
|
||||
var result = arch.getBaselineCpuFeatures();
|
||||
) !Target.Cpu {
|
||||
var result = Target.Cpu.baseline(arch);
|
||||
|
||||
if (llvm_cpu_name_z) |cpu_name_z| {
|
||||
const llvm_cpu_name = mem.toSliceConst(u8, cpu_name_z);
|
||||
|
||||
for (arch.allCpus()) |cpu| {
|
||||
const this_llvm_name = cpu.llvm_name orelse continue;
|
||||
for (arch.allCpuModels()) |model| {
|
||||
const this_llvm_name = model.llvm_name orelse continue;
|
||||
if (mem.eql(u8, this_llvm_name, llvm_cpu_name)) {
|
||||
// Here we use the non-dependencies-populated set,
|
||||
// so that subtracting features later in this function
|
||||
// affect the prepopulated set.
|
||||
result = Target.CpuFeatures{
|
||||
.cpu = cpu,
|
||||
.features = cpu.features,
|
||||
result = Target.Cpu{
|
||||
.arch = arch,
|
||||
.model = model,
|
||||
.features = model.features,
|
||||
};
|
||||
break;
|
||||
}
|
||||
@ -632,12 +632,12 @@ export fn stage2_cmd_targets(zig_triple: [*:0]const u8) c_int {
|
||||
}
|
||||
|
||||
fn cmdTargets(zig_triple: [*:0]const u8) !void {
|
||||
var target = try Target.parse(mem.toSliceConst(u8, zig_triple));
|
||||
target.Cross.cpu_features = blk: {
|
||||
var target = try Target.parse(.{ .arch_os_abi = mem.toSliceConst(u8, zig_triple) });
|
||||
target.Cross.cpu = blk: {
|
||||
const llvm = @import("llvm.zig");
|
||||
const llvm_cpu_name = llvm.GetHostCPUName();
|
||||
const llvm_cpu_features = llvm.GetNativeFeatures();
|
||||
break :blk try cpuFeaturesFromLLVM(target.Cross.arch, llvm_cpu_name, llvm_cpu_features);
|
||||
break :blk try detectNativeCpuWithLLVM(target.getArch(), llvm_cpu_name, llvm_cpu_features);
|
||||
};
|
||||
return @import("print_targets.zig").cmdTargets(
|
||||
std.heap.c_allocator,
|
||||
@ -647,208 +647,130 @@ fn cmdTargets(zig_triple: [*:0]const u8) !void {
|
||||
);
|
||||
}
|
||||
|
||||
const Stage2CpuFeatures = struct {
|
||||
allocator: *mem.Allocator,
|
||||
cpu_features: Target.CpuFeatures,
|
||||
|
||||
llvm_features_str: ?[*:0]const u8,
|
||||
|
||||
builtin_str: [:0]const u8,
|
||||
cache_hash: [:0]const u8,
|
||||
|
||||
const Self = @This();
|
||||
|
||||
fn createFromNative(allocator: *mem.Allocator) !*Self {
|
||||
const arch = Target.current.getArch();
|
||||
const llvm = @import("llvm.zig");
|
||||
const llvm_cpu_name = llvm.GetHostCPUName();
|
||||
const llvm_cpu_features = llvm.GetNativeFeatures();
|
||||
const cpu_features = try cpuFeaturesFromLLVM(arch, llvm_cpu_name, llvm_cpu_features);
|
||||
return createFromCpuFeatures(allocator, arch, cpu_features);
|
||||
}
|
||||
|
||||
fn createFromCpuFeatures(
|
||||
allocator: *mem.Allocator,
|
||||
arch: Target.Arch,
|
||||
cpu_features: Target.CpuFeatures,
|
||||
) !*Self {
|
||||
const self = try allocator.create(Self);
|
||||
errdefer allocator.destroy(self);
|
||||
|
||||
const cache_hash = try std.fmt.allocPrint0(allocator, "{}\n{}", .{
|
||||
cpu_features.cpu.name,
|
||||
cpu_features.features.asBytes(),
|
||||
});
|
||||
errdefer allocator.free(cache_hash);
|
||||
|
||||
const generic_arch_name = arch.genericName();
|
||||
var builtin_str_buffer = try std.Buffer.allocPrint(allocator,
|
||||
\\CpuFeatures{{
|
||||
\\ .cpu = &Target.{}.cpu.{},
|
||||
\\ .features = Target.{}.featureSet(&[_]Target.{}.Feature{{
|
||||
\\
|
||||
, .{
|
||||
generic_arch_name,
|
||||
cpu_features.cpu.name,
|
||||
generic_arch_name,
|
||||
generic_arch_name,
|
||||
});
|
||||
defer builtin_str_buffer.deinit();
|
||||
|
||||
var llvm_features_buffer = try std.Buffer.initSize(allocator, 0);
|
||||
defer llvm_features_buffer.deinit();
|
||||
|
||||
for (arch.allFeaturesList()) |feature, index_usize| {
|
||||
const index = @intCast(Target.Cpu.Feature.Set.Index, index_usize);
|
||||
const is_enabled = cpu_features.features.isEnabled(index);
|
||||
|
||||
if (feature.llvm_name) |llvm_name| {
|
||||
const plus_or_minus = "-+"[@boolToInt(is_enabled)];
|
||||
try llvm_features_buffer.appendByte(plus_or_minus);
|
||||
try llvm_features_buffer.append(llvm_name);
|
||||
try llvm_features_buffer.append(",");
|
||||
}
|
||||
|
||||
if (is_enabled) {
|
||||
// TODO some kind of "zig identifier escape" function rather than
|
||||
// unconditionally using @"" syntax
|
||||
try builtin_str_buffer.append(" .@\"");
|
||||
try builtin_str_buffer.append(feature.name);
|
||||
try builtin_str_buffer.append("\",\n");
|
||||
}
|
||||
}
|
||||
|
||||
try builtin_str_buffer.append(
|
||||
\\ }),
|
||||
\\};
|
||||
\\
|
||||
);
|
||||
|
||||
assert(mem.endsWith(u8, llvm_features_buffer.toSliceConst(), ","));
|
||||
llvm_features_buffer.shrink(llvm_features_buffer.len() - 1);
|
||||
|
||||
self.* = Self{
|
||||
.allocator = allocator,
|
||||
.cpu_features = cpu_features,
|
||||
.llvm_features_str = llvm_features_buffer.toOwnedSlice().ptr,
|
||||
.builtin_str = builtin_str_buffer.toOwnedSlice(),
|
||||
.cache_hash = cache_hash,
|
||||
};
|
||||
return self;
|
||||
}
|
||||
|
||||
fn destroy(self: *Self) void {
|
||||
self.allocator.free(self.cache_hash);
|
||||
self.allocator.free(self.builtin_str);
|
||||
// TODO if (self.llvm_features_str) |llvm_features_str| self.allocator.free(llvm_features_str);
|
||||
self.allocator.destroy(self);
|
||||
}
|
||||
};
|
||||
|
||||
// ABI warning
|
||||
export fn stage2_cpu_features_parse(
|
||||
result: **Stage2CpuFeatures,
|
||||
export fn stage2_target_parse(
|
||||
target: *Stage2Target,
|
||||
zig_triple: ?[*:0]const u8,
|
||||
cpu_name: ?[*:0]const u8,
|
||||
cpu_features: ?[*:0]const u8,
|
||||
mcpu: ?[*:0]const u8,
|
||||
) Error {
|
||||
result.* = stage2ParseCpuFeatures(zig_triple, cpu_name, cpu_features) catch |err| switch (err) {
|
||||
stage2TargetParse(target, zig_triple, mcpu) catch |err| switch (err) {
|
||||
error.OutOfMemory => return .OutOfMemory,
|
||||
error.UnknownArchitecture => return .UnknownArchitecture,
|
||||
error.UnknownSubArchitecture => return .UnknownSubArchitecture,
|
||||
error.UnknownOperatingSystem => return .UnknownOperatingSystem,
|
||||
error.UnknownApplicationBinaryInterface => return .UnknownApplicationBinaryInterface,
|
||||
error.MissingOperatingSystem => return .MissingOperatingSystem,
|
||||
error.MissingArchitecture => return .MissingArchitecture,
|
||||
error.InvalidLlvmCpuFeaturesFormat => return .InvalidLlvmCpuFeaturesFormat,
|
||||
error.InvalidCpuFeatures => return .InvalidCpuFeatures,
|
||||
error.UnexpectedExtraField => return .SemanticAnalyzeFail,
|
||||
};
|
||||
return .None;
|
||||
}
|
||||
|
||||
fn stage2ParseCpuFeatures(
|
||||
fn stage2TargetParse(
|
||||
stage1_target: *Stage2Target,
|
||||
zig_triple_oz: ?[*:0]const u8,
|
||||
cpu_name_oz: ?[*:0]const u8,
|
||||
cpu_features_oz: ?[*:0]const u8,
|
||||
) !*Stage2CpuFeatures {
|
||||
const zig_triple_z = zig_triple_oz orelse return Stage2CpuFeatures.createFromNative(std.heap.c_allocator);
|
||||
const target = try Target.parse(mem.toSliceConst(u8, zig_triple_z));
|
||||
const arch = target.Cross.arch;
|
||||
|
||||
const cpu = if (cpu_name_oz) |cpu_name_z| blk: {
|
||||
const cpu_name = mem.toSliceConst(u8, cpu_name_z);
|
||||
break :blk arch.parseCpu(cpu_name) catch |err| switch (err) {
|
||||
mcpu_oz: ?[*:0]const u8,
|
||||
) !void {
|
||||
const target: Target = if (zig_triple_oz) |zig_triple_z| blk: {
|
||||
const zig_triple = mem.toSliceConst(u8, zig_triple_z);
|
||||
const mcpu = if (mcpu_oz) |mcpu_z| mem.toSliceConst(u8, mcpu_z) else "baseline";
|
||||
var diags: std.Target.ParseOptions.Diagnostics = .{};
|
||||
break :blk Target.parse(.{
|
||||
.arch_os_abi = zig_triple,
|
||||
.cpu_features = mcpu,
|
||||
.diagnostics = &diags,
|
||||
}) catch |err| switch (err) {
|
||||
error.UnknownCpu => {
|
||||
std.debug.warn("Unknown CPU: '{}'\nAvailable CPUs for architecture '{}':\n", .{
|
||||
cpu_name,
|
||||
@tagName(arch),
|
||||
diags.cpu_name.?,
|
||||
@tagName(diags.arch.?),
|
||||
});
|
||||
for (arch.allCpus()) |cpu| {
|
||||
for (diags.arch.?.allCpuModels()) |cpu| {
|
||||
std.debug.warn(" {}\n", .{cpu.name});
|
||||
}
|
||||
process.exit(1);
|
||||
},
|
||||
else => |e| return e,
|
||||
};
|
||||
} else target.Cross.cpu_features.cpu;
|
||||
|
||||
var set = if (cpu_features_oz) |cpu_features_z| blk: {
|
||||
const cpu_features = mem.toSliceConst(u8, cpu_features_z);
|
||||
break :blk arch.parseCpuFeatureSet(cpu, cpu_features) catch |err| switch (err) {
|
||||
error.UnknownCpuFeature => {
|
||||
std.debug.warn(
|
||||
\\Unknown CPU features specified.
|
||||
\\Unknown CPU feature: '{}'
|
||||
\\Available CPU features for architecture '{}':
|
||||
\\
|
||||
, .{@tagName(arch)});
|
||||
for (arch.allFeaturesList()) |feature| {
|
||||
std.debug.warn(" {}\n", .{feature.name});
|
||||
, .{
|
||||
diags.unknown_feature_name,
|
||||
@tagName(diags.arch.?),
|
||||
});
|
||||
for (diags.arch.?.allFeaturesList()) |feature| {
|
||||
std.debug.warn(" {}: {}\n", .{ feature.name, feature.description });
|
||||
}
|
||||
process.exit(1);
|
||||
},
|
||||
else => |e| return e,
|
||||
};
|
||||
} else cpu.features;
|
||||
} else Target.Native;
|
||||
|
||||
if (arch.subArchFeature()) |index| {
|
||||
set.addFeature(index);
|
||||
}
|
||||
set.populateDependencies(arch.allFeaturesList());
|
||||
try stage1_target.fromTarget(target);
|
||||
}
|
||||
|
||||
return Stage2CpuFeatures.createFromCpuFeatures(std.heap.c_allocator, arch, .{
|
||||
.cpu = cpu,
|
||||
.features = set,
|
||||
fn initStage1TargetCpuFeatures(stage1_target: *Stage2Target, cpu: Target.Cpu) !void {
|
||||
const allocator = std.heap.c_allocator;
|
||||
const cache_hash = try std.fmt.allocPrint0(allocator, "{}\n{}", .{
|
||||
cpu.model.name,
|
||||
cpu.features.asBytes(),
|
||||
});
|
||||
}
|
||||
errdefer allocator.free(cache_hash);
|
||||
|
||||
// ABI warning
|
||||
export fn stage2_cpu_features_get_cache_hash(
|
||||
cpu_features: *const Stage2CpuFeatures,
|
||||
ptr: *[*:0]const u8,
|
||||
len: *usize,
|
||||
) void {
|
||||
ptr.* = cpu_features.cache_hash.ptr;
|
||||
len.* = cpu_features.cache_hash.len;
|
||||
}
|
||||
const generic_arch_name = cpu.arch.genericName();
|
||||
var builtin_str_buffer = try std.Buffer.allocPrint(allocator,
|
||||
\\Cpu{{
|
||||
\\ .arch = .{},
|
||||
\\ .model = &Target.{}.cpu.{},
|
||||
\\ .features = Target.{}.featureSet(&[_]Target.{}.Feature{{
|
||||
\\
|
||||
, .{
|
||||
@tagName(cpu.arch),
|
||||
generic_arch_name,
|
||||
cpu.model.name,
|
||||
generic_arch_name,
|
||||
generic_arch_name,
|
||||
});
|
||||
defer builtin_str_buffer.deinit();
|
||||
|
||||
// ABI warning
|
||||
export fn stage2_cpu_features_get_builtin_str(
|
||||
cpu_features: *const Stage2CpuFeatures,
|
||||
ptr: *[*:0]const u8,
|
||||
len: *usize,
|
||||
) void {
|
||||
ptr.* = cpu_features.builtin_str.ptr;
|
||||
len.* = cpu_features.builtin_str.len;
|
||||
}
|
||||
var llvm_features_buffer = try std.Buffer.initSize(allocator, 0);
|
||||
defer llvm_features_buffer.deinit();
|
||||
|
||||
// ABI warning
|
||||
export fn stage2_cpu_features_get_llvm_cpu(cpu_features: *const Stage2CpuFeatures) ?[*:0]const u8 {
|
||||
return if (cpu_features.cpu_features.cpu.llvm_name) |s| s.ptr else null;
|
||||
}
|
||||
for (cpu.arch.allFeaturesList()) |feature, index_usize| {
|
||||
const index = @intCast(Target.Cpu.Feature.Set.Index, index_usize);
|
||||
const is_enabled = cpu.features.isEnabled(index);
|
||||
|
||||
// ABI warning
|
||||
export fn stage2_cpu_features_get_llvm_features(cpu_features: *const Stage2CpuFeatures) ?[*:0]const u8 {
|
||||
return cpu_features.llvm_features_str;
|
||||
if (feature.llvm_name) |llvm_name| {
|
||||
const plus_or_minus = "-+"[@boolToInt(is_enabled)];
|
||||
try llvm_features_buffer.appendByte(plus_or_minus);
|
||||
try llvm_features_buffer.append(llvm_name);
|
||||
try llvm_features_buffer.append(",");
|
||||
}
|
||||
|
||||
if (is_enabled) {
|
||||
// TODO some kind of "zig identifier escape" function rather than
|
||||
// unconditionally using @"" syntax
|
||||
try builtin_str_buffer.append(" .@\"");
|
||||
try builtin_str_buffer.append(feature.name);
|
||||
try builtin_str_buffer.append("\",\n");
|
||||
}
|
||||
}
|
||||
|
||||
try builtin_str_buffer.append(
|
||||
\\ }),
|
||||
\\};
|
||||
\\
|
||||
);
|
||||
|
||||
assert(mem.endsWith(u8, llvm_features_buffer.toSliceConst(), ","));
|
||||
llvm_features_buffer.shrink(llvm_features_buffer.len() - 1);
|
||||
|
||||
stage1_target.llvm_cpu_name = if (cpu.model.llvm_name) |s| s.ptr else null;
|
||||
stage1_target.llvm_cpu_features = llvm_features_buffer.toOwnedSlice().ptr;
|
||||
stage1_target.builtin_str = builtin_str_buffer.toOwnedSlice().ptr;
|
||||
stage1_target.cache_hash = cache_hash.ptr;
|
||||
}
|
||||
|
||||
// ABI warning
|
||||
@ -1016,13 +938,61 @@ export fn stage2_libc_render(stage1_libc: *Stage2LibCInstallation, output_file:
|
||||
// ABI warning
|
||||
const Stage2Target = extern struct {
|
||||
arch: c_int,
|
||||
sub_arch: c_int,
|
||||
vendor: c_int,
|
||||
os: c_int,
|
||||
|
||||
abi: c_int,
|
||||
glibc_version: ?*Stage2GLibCVersion, // null means default
|
||||
cpu_features: *Stage2CpuFeatures,
|
||||
os: c_int,
|
||||
|
||||
is_native: bool,
|
||||
|
||||
glibc_version: ?*Stage2GLibCVersion, // null means default
|
||||
|
||||
llvm_cpu_name: ?[*:0]const u8,
|
||||
llvm_cpu_features: ?[*:0]const u8,
|
||||
builtin_str: ?[*:0]const u8,
|
||||
cache_hash: ?[*:0]const u8,
|
||||
|
||||
fn toTarget(in_target: Stage2Target) Target {
|
||||
if (in_target.is_native) return .Native;
|
||||
|
||||
const in_arch = in_target.arch - 1; // skip over ZigLLVM_UnknownArch
|
||||
const in_os = in_target.os;
|
||||
const in_abi = in_target.abi;
|
||||
|
||||
return .{
|
||||
.Cross = .{
|
||||
.cpu = Target.Cpu.baseline(enumInt(Target.Cpu.Arch, in_arch)),
|
||||
.os = enumInt(Target.Os, in_os),
|
||||
.abi = enumInt(Target.Abi, in_abi),
|
||||
},
|
||||
};
|
||||
}
|
||||
|
||||
fn fromTarget(self: *Stage2Target, target: Target) !void {
|
||||
const cpu = switch (target) {
|
||||
.Native => blk: {
|
||||
// TODO self-host CPU model and feature detection instead of relying on LLVM
|
||||
const llvm = @import("llvm.zig");
|
||||
const llvm_cpu_name = llvm.GetHostCPUName();
|
||||
const llvm_cpu_features = llvm.GetNativeFeatures();
|
||||
break :blk try detectNativeCpuWithLLVM(target.getArch(), llvm_cpu_name, llvm_cpu_features);
|
||||
},
|
||||
.Cross => target.getCpu(),
|
||||
};
|
||||
self.* = .{
|
||||
.arch = @enumToInt(target.getArch()) + 1, // skip over ZigLLVM_UnknownArch
|
||||
.vendor = 0,
|
||||
.os = @enumToInt(target.getOs()),
|
||||
.abi = @enumToInt(target.getAbi()),
|
||||
.llvm_cpu_name = null,
|
||||
.llvm_cpu_features = null,
|
||||
.builtin_str = null,
|
||||
.cache_hash = null,
|
||||
.is_native = target == .Native,
|
||||
.glibc_version = null,
|
||||
};
|
||||
try initStage1TargetCpuFeatures(self, cpu);
|
||||
}
|
||||
};
|
||||
|
||||
// ABI warning
|
||||
@ -1034,72 +1004,7 @@ const Stage2GLibCVersion = extern struct {
|
||||
|
||||
// ABI warning
|
||||
export fn stage2_detect_dynamic_linker(in_target: *const Stage2Target, out_ptr: *[*:0]u8, out_len: *usize) Error {
|
||||
const in_arch = in_target.arch - 1; // skip over ZigLLVM_UnknownArch
|
||||
const in_sub_arch = in_target.sub_arch - 1; // skip over ZigLLVM_NoSubArch
|
||||
const in_os = in_target.os;
|
||||
const in_abi = in_target.abi - 1; // skip over ZigLLVM_UnknownEnvironment
|
||||
const target: Target = if (in_target.is_native) .Native else .{
|
||||
.Cross = .{
|
||||
.arch = switch (enumInt(@TagType(Target.Arch), in_arch)) {
|
||||
.arm => .{ .arm = enumInt(Target.Arch.Arm32, in_sub_arch) },
|
||||
.armeb => .{ .armeb = enumInt(Target.Arch.Arm32, in_sub_arch) },
|
||||
.thumb => .{ .thumb = enumInt(Target.Arch.Arm32, in_sub_arch) },
|
||||
.thumbeb => .{ .thumbeb = enumInt(Target.Arch.Arm32, in_sub_arch) },
|
||||
|
||||
.aarch64 => .{ .aarch64 = enumInt(Target.Arch.Arm64, in_sub_arch) },
|
||||
.aarch64_be => .{ .aarch64_be = enumInt(Target.Arch.Arm64, in_sub_arch) },
|
||||
.aarch64_32 => .{ .aarch64_32 = enumInt(Target.Arch.Arm64, in_sub_arch) },
|
||||
|
||||
.kalimba => .{ .kalimba = enumInt(Target.Arch.Kalimba, in_sub_arch) },
|
||||
|
||||
.arc => .arc,
|
||||
.avr => .avr,
|
||||
.bpfel => .bpfel,
|
||||
.bpfeb => .bpfeb,
|
||||
.hexagon => .hexagon,
|
||||
.mips => .mips,
|
||||
.mipsel => .mipsel,
|
||||
.mips64 => .mips64,
|
||||
.mips64el => .mips64el,
|
||||
.msp430 => .msp430,
|
||||
.powerpc => .powerpc,
|
||||
.powerpc64 => .powerpc64,
|
||||
.powerpc64le => .powerpc64le,
|
||||
.r600 => .r600,
|
||||
.amdgcn => .amdgcn,
|
||||
.riscv32 => .riscv32,
|
||||
.riscv64 => .riscv64,
|
||||
.sparc => .sparc,
|
||||
.sparcv9 => .sparcv9,
|
||||
.sparcel => .sparcel,
|
||||
.s390x => .s390x,
|
||||
.tce => .tce,
|
||||
.tcele => .tcele,
|
||||
.i386 => .i386,
|
||||
.x86_64 => .x86_64,
|
||||
.xcore => .xcore,
|
||||
.nvptx => .nvptx,
|
||||
.nvptx64 => .nvptx64,
|
||||
.le32 => .le32,
|
||||
.le64 => .le64,
|
||||
.amdil => .amdil,
|
||||
.amdil64 => .amdil64,
|
||||
.hsail => .hsail,
|
||||
.hsail64 => .hsail64,
|
||||
.spir => .spir,
|
||||
.spir64 => .spir64,
|
||||
.shave => .shave,
|
||||
.lanai => .lanai,
|
||||
.wasm32 => .wasm32,
|
||||
.wasm64 => .wasm64,
|
||||
.renderscript32 => .renderscript32,
|
||||
.renderscript64 => .renderscript64,
|
||||
},
|
||||
.os = enumInt(Target.Os, in_os),
|
||||
.abi = enumInt(Target.Abi, in_abi),
|
||||
.cpu_features = in_target.cpu_features.cpu_features,
|
||||
},
|
||||
};
|
||||
const target = in_target.toTarget();
|
||||
const result = @import("introspect.zig").detectDynamicLinker(
|
||||
std.heap.c_allocator,
|
||||
target,
|
||||
|
||||
@ -8504,25 +8504,9 @@ Buf *codegen_generate_builtin_source(CodeGen *g) {
|
||||
for (uint32_t arch_i = 0; arch_i < field_count; arch_i += 1) {
|
||||
ZigLLVM_ArchType arch = target_arch_enum(arch_i);
|
||||
const char *arch_name = target_arch_name(arch);
|
||||
SubArchList sub_arch_list = target_subarch_list(arch);
|
||||
if (sub_arch_list == SubArchListNone) {
|
||||
if (arch == g->zig_target->arch) {
|
||||
g->target_arch_index = arch_i;
|
||||
cur_arch = buf_ptr(buf_sprintf("Arch.%s", arch_name));
|
||||
}
|
||||
} else {
|
||||
const char *sub_arch_list_name = target_subarch_list_name(sub_arch_list);
|
||||
if (arch == g->zig_target->arch) {
|
||||
size_t sub_count = target_subarch_count(sub_arch_list);
|
||||
for (size_t sub_i = 0; sub_i < sub_count; sub_i += 1) {
|
||||
ZigLLVM_SubArchType sub = target_subarch_enum(sub_arch_list, sub_i);
|
||||
if (sub == g->zig_target->sub_arch) {
|
||||
g->target_sub_arch_index = sub_i;
|
||||
cur_arch = buf_ptr(buf_sprintf("Arch{ .%s = Arch.%s.%s }",
|
||||
arch_name, sub_arch_list_name, target_subarch_name(sub)));
|
||||
}
|
||||
}
|
||||
}
|
||||
if (arch == g->zig_target->arch) {
|
||||
g->target_arch_index = arch_i;
|
||||
cur_arch = arch_name;
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -8621,17 +8605,14 @@ Buf *codegen_generate_builtin_source(CodeGen *g) {
|
||||
buf_appendf(contents, "pub const is_test = %s;\n", bool_to_str(g->is_test_build));
|
||||
buf_appendf(contents, "pub const single_threaded = %s;\n", bool_to_str(g->is_single_threaded));
|
||||
buf_appendf(contents, "pub const os = Os.%s;\n", cur_os);
|
||||
buf_appendf(contents, "pub const arch = %s;\n", cur_arch);
|
||||
buf_appendf(contents, "pub const arch = Arch.%s;\n", cur_arch);
|
||||
buf_appendf(contents, "pub const abi = Abi.%s;\n", cur_abi);
|
||||
{
|
||||
buf_append_str(contents, "pub const cpu_features: CpuFeatures = ");
|
||||
if (g->zig_target->cpu_features != nullptr) {
|
||||
const char *ptr;
|
||||
size_t len;
|
||||
stage2_cpu_features_get_builtin_str(g->zig_target->cpu_features, &ptr, &len);
|
||||
buf_append_mem(contents, ptr, len);
|
||||
buf_append_str(contents, "pub const cpu: Cpu = ");
|
||||
if (g->zig_target->builtin_str != nullptr) {
|
||||
buf_append_str(contents, g->zig_target->builtin_str);
|
||||
} else {
|
||||
buf_append_str(contents, "arch.getBaselineCpuFeatures();\n");
|
||||
buf_append_str(contents, "Target.Cpu.baseline(arch);\n");
|
||||
}
|
||||
}
|
||||
if (g->libc_link_lib != nullptr && g->zig_target->glibc_version != nullptr) {
|
||||
@ -8730,15 +8711,11 @@ static Error define_builtin_compile_vars(CodeGen *g) {
|
||||
cache_int(&cache_hash, g->code_model);
|
||||
cache_int(&cache_hash, g->zig_target->is_native);
|
||||
cache_int(&cache_hash, g->zig_target->arch);
|
||||
cache_int(&cache_hash, g->zig_target->sub_arch);
|
||||
cache_int(&cache_hash, g->zig_target->vendor);
|
||||
cache_int(&cache_hash, g->zig_target->os);
|
||||
cache_int(&cache_hash, g->zig_target->abi);
|
||||
if (g->zig_target->cpu_features != nullptr) {
|
||||
const char *ptr;
|
||||
size_t len;
|
||||
stage2_cpu_features_get_cache_hash(g->zig_target->cpu_features, &ptr, &len);
|
||||
cache_str(&cache_hash, ptr);
|
||||
if (g->zig_target->cache_hash != nullptr) {
|
||||
cache_str(&cache_hash, g->zig_target->cache_hash);
|
||||
}
|
||||
if (g->zig_target->glibc_version != nullptr) {
|
||||
cache_int(&cache_hash, g->zig_target->glibc_version->major);
|
||||
@ -8873,9 +8850,11 @@ static void init(CodeGen *g) {
|
||||
}
|
||||
|
||||
// Override CPU and features if defined by user.
|
||||
if (g->zig_target->cpu_features != nullptr) {
|
||||
target_specific_cpu_args = stage2_cpu_features_get_llvm_cpu(g->zig_target->cpu_features);
|
||||
target_specific_features = stage2_cpu_features_get_llvm_features(g->zig_target->cpu_features);
|
||||
if (g->zig_target->llvm_cpu_name != nullptr) {
|
||||
target_specific_cpu_args = g->zig_target->llvm_cpu_name;
|
||||
}
|
||||
if (g->zig_target->llvm_cpu_features != nullptr) {
|
||||
target_specific_features = g->zig_target->llvm_cpu_features;
|
||||
}
|
||||
if (g->verbose_llvm_cpu_features) {
|
||||
fprintf(stderr, "name=%s triple=%s\n", buf_ptr(g->root_out_name), buf_ptr(&g->llvm_triple_str));
|
||||
@ -9190,19 +9169,17 @@ void add_cc_args(CodeGen *g, ZigList<const char *> &args, const char *out_dep_pa
|
||||
args.append("-target");
|
||||
args.append(buf_ptr(&g->llvm_triple_str));
|
||||
|
||||
const char *llvm_cpu = stage2_cpu_features_get_llvm_cpu(g->zig_target->cpu_features);
|
||||
if (llvm_cpu != nullptr) {
|
||||
if (g->zig_target->llvm_cpu_name != nullptr) {
|
||||
args.append("-Xclang");
|
||||
args.append("-target-cpu");
|
||||
args.append("-Xclang");
|
||||
args.append(llvm_cpu);
|
||||
args.append(g->zig_target->llvm_cpu_name);
|
||||
}
|
||||
const char *llvm_target_features = stage2_cpu_features_get_llvm_features(g->zig_target->cpu_features);
|
||||
if (llvm_target_features != nullptr) {
|
||||
if (g->zig_target->llvm_cpu_features != nullptr) {
|
||||
args.append("-Xclang");
|
||||
args.append("-target-feature");
|
||||
args.append("-Xclang");
|
||||
args.append(llvm_target_features);
|
||||
args.append(g->zig_target->llvm_cpu_features);
|
||||
}
|
||||
}
|
||||
|
||||
@ -9638,7 +9615,6 @@ Error create_c_object_cache(CodeGen *g, CacheHash **out_cache_hash, bool verbose
|
||||
cache_list_of_str(cache_hash, g->libc_include_dir_list, g->libc_include_dir_len);
|
||||
cache_int(cache_hash, g->zig_target->is_native);
|
||||
cache_int(cache_hash, g->zig_target->arch);
|
||||
cache_int(cache_hash, g->zig_target->sub_arch);
|
||||
cache_int(cache_hash, g->zig_target->vendor);
|
||||
cache_int(cache_hash, g->zig_target->os);
|
||||
cache_int(cache_hash, g->zig_target->abi);
|
||||
@ -10402,15 +10378,11 @@ static Error check_cache(CodeGen *g, Buf *manifest_dir, Buf *digest) {
|
||||
cache_int(ch, g->out_type);
|
||||
cache_bool(ch, g->zig_target->is_native);
|
||||
cache_int(ch, g->zig_target->arch);
|
||||
cache_int(ch, g->zig_target->sub_arch);
|
||||
cache_int(ch, g->zig_target->vendor);
|
||||
cache_int(ch, g->zig_target->os);
|
||||
cache_int(ch, g->zig_target->abi);
|
||||
if (g->zig_target->cpu_features != nullptr) {
|
||||
const char *ptr;
|
||||
size_t len;
|
||||
stage2_cpu_features_get_cache_hash(g->zig_target->cpu_features, &ptr, &len);
|
||||
cache_str(ch, ptr);
|
||||
if (g->zig_target->cache_hash != nullptr) {
|
||||
cache_str(ch, g->zig_target->cache_hash);
|
||||
}
|
||||
if (g->zig_target->glibc_version != nullptr) {
|
||||
cache_int(ch, g->zig_target->glibc_version->major);
|
||||
|
||||
@ -59,7 +59,6 @@ const char *err_str(Error err) {
|
||||
case ErrorIsAsync: return "is async";
|
||||
case ErrorImportOutsidePkgPath: return "import of file outside package path";
|
||||
case ErrorUnknownCpu: return "unknown CPU";
|
||||
case ErrorUnknownSubArchitecture: return "unknown sub-architecture";
|
||||
case ErrorUnknownCpuFeature: return "unknown CPU feature";
|
||||
case ErrorInvalidCpuFeatures: return "invalid CPU features";
|
||||
case ErrorInvalidLlvmCpuFeaturesFormat: return "invalid LLVM CPU features format";
|
||||
|
||||
@ -116,10 +116,8 @@ Error glibc_load_metadata(ZigGLibCAbi **out_result, Buf *zig_lib_dir, bool verbo
|
||||
assert(opt_abi.is_some);
|
||||
|
||||
|
||||
err = target_parse_archsub(&target->arch, &target->sub_arch,
|
||||
(char*)opt_arch.value.ptr, opt_arch.value.len);
|
||||
// there's no sub arch so we might get an error, but the arch is still populated
|
||||
assert(err == ErrorNone || err == ErrorUnknownArchitecture);
|
||||
err = target_parse_arch(&target->arch, (char*)opt_arch.value.ptr, opt_arch.value.len);
|
||||
assert(err == ErrorNone);
|
||||
|
||||
target->os = OsLinux;
|
||||
|
||||
|
||||
85
src/main.cpp
85
src/main.cpp
@ -106,8 +106,7 @@ static int print_full_usage(const char *arg0, FILE *file, int return_code) {
|
||||
" --override-lib-dir [arg] override path to Zig lib directory\n"
|
||||
" -ffunction-sections places each function in a separate section\n"
|
||||
" -D[macro]=[value] define C [macro] to [value] (1 if [value] omitted)\n"
|
||||
" -target-cpu [cpu] target one specific CPU by name\n"
|
||||
" -target-feature [features] specify the set of CPU features to target\n"
|
||||
" -mcpu [cpu] specify target CPU and feature set\n"
|
||||
" -code-model [default|tiny| set target code model\n"
|
||||
" small|kernel|\n"
|
||||
" medium|large]\n"
|
||||
@ -238,6 +237,14 @@ static int zig_error_no_build_file(void) {
|
||||
return EXIT_FAILURE;
|
||||
}
|
||||
|
||||
static bool str_starts_with(const char *s1, const char *s2) {
|
||||
size_t s2_len = strlen(s2);
|
||||
if (strlen(s1) < s2_len) {
|
||||
return false;
|
||||
}
|
||||
return memcmp(s1, s2, s2_len) == 0;
|
||||
}
|
||||
|
||||
extern "C" int ZigClang_main(int argc, char **argv);
|
||||
|
||||
#ifdef ZIG_ENABLE_MEM_PROFILE
|
||||
@ -447,10 +454,8 @@ static int main0(int argc, char **argv) {
|
||||
WantStackCheck want_stack_check = WantStackCheckAuto;
|
||||
WantCSanitize want_sanitize_c = WantCSanitizeAuto;
|
||||
bool function_sections = false;
|
||||
const char *cpu = nullptr;
|
||||
const char *features = nullptr;
|
||||
const char *mcpu = nullptr;
|
||||
CodeModel code_model = CodeModelDefault;
|
||||
bool baseline_cpu = false;
|
||||
|
||||
ZigList<const char *> llvm_argv = {0};
|
||||
llvm_argv.append("zig (LLVM option parsing)");
|
||||
@ -717,8 +722,8 @@ static int main0(int argc, char **argv) {
|
||||
emit_llvm_ir = true;
|
||||
} else if (strcmp(arg, "-fno-emit-llvm-ir") == 0) {
|
||||
emit_llvm_ir = false;
|
||||
} else if (strcmp(arg, "-mcpu=baseline") == 0) {
|
||||
baseline_cpu = true;
|
||||
} else if (str_starts_with(arg, "-mcpu=")) {
|
||||
mcpu = arg + strlen("-mcpu=");
|
||||
} else if (i + 1 >= argc) {
|
||||
fprintf(stderr, "Expected another argument after %s\n", arg);
|
||||
return print_error_usage(arg0);
|
||||
@ -895,10 +900,8 @@ static int main0(int argc, char **argv) {
|
||||
, argv[i]);
|
||||
return EXIT_FAILURE;
|
||||
}
|
||||
} else if (strcmp(arg, "-target-cpu") == 0) {
|
||||
cpu = argv[i];
|
||||
} else if (strcmp(arg, "-target-feature") == 0) {
|
||||
features = argv[i];
|
||||
} else if (strcmp(arg, "-mcpu") == 0) {
|
||||
mcpu = argv[i];
|
||||
} else {
|
||||
fprintf(stderr, "Invalid argument: %s\n", arg);
|
||||
return print_error_usage(arg0);
|
||||
@ -974,58 +977,30 @@ static int main0(int argc, char **argv) {
|
||||
init_all_targets();
|
||||
|
||||
ZigTarget target;
|
||||
if (target_string == nullptr) {
|
||||
get_native_target(&target);
|
||||
if (target_glibc != nullptr) {
|
||||
fprintf(stderr, "-target-glibc provided but no -target parameter\n");
|
||||
return print_error_usage(arg0);
|
||||
}
|
||||
if (baseline_cpu) {
|
||||
target.is_native = false;
|
||||
}
|
||||
} else {
|
||||
if ((err = target_parse_triple(&target, target_string))) {
|
||||
if (err == ErrorUnknownArchitecture && target.arch != ZigLLVM_UnknownArch) {
|
||||
fprintf(stderr, "'%s' requires a sub-architecture. Try one of these:\n",
|
||||
target_arch_name(target.arch));
|
||||
SubArchList sub_arch_list = target_subarch_list(target.arch);
|
||||
size_t subarch_count = target_subarch_count(sub_arch_list);
|
||||
for (size_t sub_i = 0; sub_i < subarch_count; sub_i += 1) {
|
||||
ZigLLVM_SubArchType sub = target_subarch_enum(sub_arch_list, sub_i);
|
||||
fprintf(stderr, " %s%s\n", target_arch_name(target.arch), target_subarch_name(sub));
|
||||
}
|
||||
return print_error_usage(arg0);
|
||||
} else {
|
||||
fprintf(stderr, "invalid target: %s\n", err_str(err));
|
||||
return print_error_usage(arg0);
|
||||
}
|
||||
}
|
||||
if (target_is_glibc(&target)) {
|
||||
target.glibc_version = heap::c_allocator.create<ZigGLibCVersion>();
|
||||
if ((err = target_parse_triple(&target, target_string, mcpu))) {
|
||||
fprintf(stderr, "invalid target: %s\n"
|
||||
"See `%s targets` to display valid targets.\n", err_str(err), arg0);
|
||||
return print_error_usage(arg0);
|
||||
}
|
||||
if (target_is_glibc(&target)) {
|
||||
target.glibc_version = heap::c_allocator.create<ZigGLibCVersion>();
|
||||
|
||||
if (target_glibc != nullptr) {
|
||||
if ((err = target_parse_glibc_version(target.glibc_version, target_glibc))) {
|
||||
fprintf(stderr, "invalid glibc version '%s': %s\n", target_glibc, err_str(err));
|
||||
return print_error_usage(arg0);
|
||||
}
|
||||
} else {
|
||||
target_init_default_glibc_version(&target);
|
||||
if (target_glibc != nullptr) {
|
||||
if ((err = target_parse_glibc_version(target.glibc_version, target_glibc))) {
|
||||
fprintf(stderr, "invalid glibc version '%s': %s\n", target_glibc, err_str(err));
|
||||
return print_error_usage(arg0);
|
||||
}
|
||||
} else if (target_glibc != nullptr) {
|
||||
fprintf(stderr, "'%s' is not a glibc-compatible target", target_string);
|
||||
return print_error_usage(arg0);
|
||||
} else {
|
||||
target_init_default_glibc_version(&target);
|
||||
}
|
||||
} else if (target_glibc != nullptr) {
|
||||
fprintf(stderr, "'%s' is not a glibc-compatible target", target_string);
|
||||
return print_error_usage(arg0);
|
||||
}
|
||||
|
||||
Buf zig_triple_buf = BUF_INIT;
|
||||
target_triple_zig(&zig_triple_buf, &target);
|
||||
|
||||
const char *stage2_triple_arg = target.is_native ? nullptr : buf_ptr(&zig_triple_buf);
|
||||
if ((err = stage2_cpu_features_parse(&target.cpu_features, stage2_triple_arg, cpu, features))) {
|
||||
fprintf(stderr, "unable to initialize CPU features: %s\n", err_str(err));
|
||||
return main_exit(root_progress_node, EXIT_FAILURE);
|
||||
}
|
||||
|
||||
// If both output_dir and enable_cache are provided, and doing build-lib, we
|
||||
// will just do a file copy at the end. This helps when bootstrapping zig from zig0
|
||||
// because we want to pass something like this:
|
||||
|
||||
103
src/stage2.cpp
103
src/stage2.cpp
@ -4,6 +4,7 @@
|
||||
#include "stage2.h"
|
||||
#include "util.hpp"
|
||||
#include "zig_llvm.h"
|
||||
#include "target.hpp"
|
||||
#include <stdio.h>
|
||||
#include <stdlib.h>
|
||||
#include <string.h>
|
||||
@ -90,54 +91,68 @@ void stage2_progress_complete_one(Stage2ProgressNode *node) {}
|
||||
void stage2_progress_disable_tty(Stage2Progress *progress) {}
|
||||
void stage2_progress_update_node(Stage2ProgressNode *node, size_t completed_count, size_t estimated_total_items){}
|
||||
|
||||
struct Stage2CpuFeatures {
|
||||
const char *llvm_cpu_name;
|
||||
const char *llvm_cpu_features;
|
||||
const char *builtin_str;
|
||||
const char *cache_hash;
|
||||
};
|
||||
Error stage2_target_parse(struct ZigTarget *target, const char *zig_triple, const char *mcpu) {
|
||||
Error err;
|
||||
|
||||
Error stage2_cpu_features_parse(struct Stage2CpuFeatures **out, const char *zig_triple,
|
||||
const char *cpu_name, const char *cpu_features)
|
||||
{
|
||||
if (zig_triple == nullptr) {
|
||||
Stage2CpuFeatures *result = heap::c_allocator.create<Stage2CpuFeatures>();
|
||||
result->llvm_cpu_name = ZigLLVMGetHostCPUName();
|
||||
result->llvm_cpu_features = ZigLLVMGetNativeFeatures();
|
||||
result->builtin_str = "arch.getBaselineCpuFeatures();\n";
|
||||
result->cache_hash = "native\n\n";
|
||||
*out = result;
|
||||
return ErrorNone;
|
||||
}
|
||||
if (cpu_name == nullptr && cpu_features == nullptr) {
|
||||
Stage2CpuFeatures *result = heap::c_allocator.create<Stage2CpuFeatures>();
|
||||
result->builtin_str = "arch.getBaselineCpuFeatures();\n";
|
||||
result->cache_hash = "\n\n";
|
||||
*out = result;
|
||||
return ErrorNone;
|
||||
get_native_target(target);
|
||||
|
||||
if (mcpu == nullptr) {
|
||||
target->llvm_cpu_name = ZigLLVMGetHostCPUName();
|
||||
target->llvm_cpu_features = ZigLLVMGetNativeFeatures();
|
||||
target->builtin_str = "Target.Cpu.baseline(arch);\n";
|
||||
target->cache_hash = "native\n\n";
|
||||
} else if (strcmp(mcpu, "baseline") == 0) {
|
||||
target->is_native = false;
|
||||
target->llvm_cpu_name = "";
|
||||
target->llvm_cpu_features = "";
|
||||
target->builtin_str = "Target.Cpu.baseline(arch);\n";
|
||||
target->cache_hash = "baseline\n\n";
|
||||
} else {
|
||||
const char *msg = "stage0 can't handle CPU/features in the target";
|
||||
stage2_panic(msg, strlen(msg));
|
||||
}
|
||||
} else {
|
||||
// first initialize all to zero
|
||||
*target = {};
|
||||
|
||||
SplitIterator it = memSplit(str(zig_triple), str("-"));
|
||||
|
||||
Optional<Slice<uint8_t>> opt_archsub = SplitIterator_next(&it);
|
||||
Optional<Slice<uint8_t>> opt_os = SplitIterator_next(&it);
|
||||
Optional<Slice<uint8_t>> opt_abi = SplitIterator_next(&it);
|
||||
|
||||
if (!opt_archsub.is_some)
|
||||
return ErrorMissingArchitecture;
|
||||
|
||||
if ((err = target_parse_arch(&target->arch, (char*)opt_archsub.value.ptr, opt_archsub.value.len))) {
|
||||
return err;
|
||||
}
|
||||
|
||||
if (!opt_os.is_some)
|
||||
return ErrorMissingOperatingSystem;
|
||||
|
||||
if ((err = target_parse_os(&target->os, (char*)opt_os.value.ptr, opt_os.value.len))) {
|
||||
return err;
|
||||
}
|
||||
|
||||
if (opt_abi.is_some) {
|
||||
if ((err = target_parse_abi(&target->abi, (char*)opt_abi.value.ptr, opt_abi.value.len))) {
|
||||
return err;
|
||||
}
|
||||
} else {
|
||||
target->abi = target_default_abi(target->arch, target->os);
|
||||
}
|
||||
|
||||
if (mcpu != nullptr && strcmp(mcpu, "baseline") != 0) {
|
||||
const char *msg = "stage0 can't handle CPU/features in the target";
|
||||
stage2_panic(msg, strlen(msg));
|
||||
}
|
||||
target->builtin_str = "Target.Cpu.baseline(arch);\n";
|
||||
target->cache_hash = "\n\n";
|
||||
}
|
||||
|
||||
const char *msg = "stage0 called stage2_cpu_features_parse with non-null cpu name or features";
|
||||
stage2_panic(msg, strlen(msg));
|
||||
}
|
||||
|
||||
void stage2_cpu_features_get_cache_hash(const Stage2CpuFeatures *cpu_features,
|
||||
const char **ptr, size_t *len)
|
||||
{
|
||||
*ptr = cpu_features->cache_hash;
|
||||
*len = strlen(cpu_features->cache_hash);
|
||||
}
|
||||
const char *stage2_cpu_features_get_llvm_cpu(const Stage2CpuFeatures *cpu_features) {
|
||||
return cpu_features->llvm_cpu_name;
|
||||
}
|
||||
const char *stage2_cpu_features_get_llvm_features(const Stage2CpuFeatures *cpu_features) {
|
||||
return cpu_features->llvm_cpu_features;
|
||||
}
|
||||
void stage2_cpu_features_get_builtin_str(const Stage2CpuFeatures *cpu_features,
|
||||
const char **ptr, size_t *len)
|
||||
{
|
||||
*ptr = cpu_features->builtin_str;
|
||||
*len = strlen(cpu_features->builtin_str);
|
||||
return ErrorNone;
|
||||
}
|
||||
|
||||
int stage2_cmd_targets(const char *zig_triple) {
|
||||
|
||||
40
src/stage2.h
40
src/stage2.h
@ -81,7 +81,6 @@ enum Error {
|
||||
ErrorIsAsync,
|
||||
ErrorImportOutsidePkgPath,
|
||||
ErrorUnknownCpu,
|
||||
ErrorUnknownSubArchitecture,
|
||||
ErrorUnknownCpuFeature,
|
||||
ErrorInvalidCpuFeatures,
|
||||
ErrorInvalidLlvmCpuFeaturesFormat,
|
||||
@ -200,27 +199,6 @@ ZIG_EXTERN_C void stage2_progress_complete_one(Stage2ProgressNode *node);
|
||||
ZIG_EXTERN_C void stage2_progress_update_node(Stage2ProgressNode *node,
|
||||
size_t completed_count, size_t estimated_total_items);
|
||||
|
||||
// ABI warning
|
||||
struct Stage2CpuFeatures;
|
||||
|
||||
// ABI warning
|
||||
ZIG_EXTERN_C enum Error stage2_cpu_features_parse(struct Stage2CpuFeatures **result,
|
||||
const char *zig_triple, const char *cpu_name, const char *cpu_features);
|
||||
|
||||
// ABI warning
|
||||
ZIG_EXTERN_C const char *stage2_cpu_features_get_llvm_cpu(const struct Stage2CpuFeatures *cpu_features);
|
||||
|
||||
// ABI warning
|
||||
ZIG_EXTERN_C const char *stage2_cpu_features_get_llvm_features(const struct Stage2CpuFeatures *cpu_features);
|
||||
|
||||
// ABI warning
|
||||
ZIG_EXTERN_C void stage2_cpu_features_get_builtin_str(const struct Stage2CpuFeatures *cpu_features,
|
||||
const char **ptr, size_t *len);
|
||||
|
||||
// ABI warning
|
||||
ZIG_EXTERN_C void stage2_cpu_features_get_cache_hash(const struct Stage2CpuFeatures *cpu_features,
|
||||
const char **ptr, size_t *len);
|
||||
|
||||
// ABI warning
|
||||
ZIG_EXTERN_C int stage2_cmd_targets(const char *zig_triple);
|
||||
|
||||
@ -296,22 +274,32 @@ struct ZigGLibCVersion {
|
||||
uint32_t patch;
|
||||
};
|
||||
|
||||
struct Stage2TargetData;
|
||||
|
||||
// ABI warning
|
||||
struct ZigTarget {
|
||||
enum ZigLLVM_ArchType arch;
|
||||
enum ZigLLVM_SubArchType sub_arch;
|
||||
enum ZigLLVM_VendorType vendor;
|
||||
Os os;
|
||||
|
||||
enum ZigLLVM_EnvironmentType abi;
|
||||
struct ZigGLibCVersion *glibc_version; // null means default
|
||||
struct Stage2CpuFeatures *cpu_features;
|
||||
Os os;
|
||||
|
||||
bool is_native;
|
||||
|
||||
struct ZigGLibCVersion *glibc_version; // null means default
|
||||
|
||||
const char *llvm_cpu_name;
|
||||
const char *llvm_cpu_features;
|
||||
const char *builtin_str;
|
||||
const char *cache_hash;
|
||||
};
|
||||
|
||||
// ABI warning
|
||||
ZIG_EXTERN_C enum Error stage2_detect_dynamic_linker(const struct ZigTarget *target,
|
||||
char **out_ptr, size_t *out_len);
|
||||
|
||||
// ABI warning
|
||||
ZIG_EXTERN_C enum Error stage2_target_parse(struct ZigTarget *target, const char *zig_triple, const char *mcpu);
|
||||
|
||||
|
||||
// ABI warning
|
||||
|
||||
317
src/target.cpp
317
src/target.cpp
@ -15,60 +15,6 @@
|
||||
|
||||
#include <stdio.h>
|
||||
|
||||
static const SubArchList subarch_list_list[] = {
|
||||
SubArchListNone,
|
||||
SubArchListArm32,
|
||||
SubArchListArm64,
|
||||
SubArchListKalimba,
|
||||
SubArchListMips,
|
||||
};
|
||||
|
||||
static const ZigLLVM_SubArchType subarch_list_arm32[] = {
|
||||
ZigLLVM_ARMSubArch_v8_5a,
|
||||
ZigLLVM_ARMSubArch_v8_4a,
|
||||
ZigLLVM_ARMSubArch_v8_3a,
|
||||
ZigLLVM_ARMSubArch_v8_2a,
|
||||
ZigLLVM_ARMSubArch_v8_1a,
|
||||
ZigLLVM_ARMSubArch_v8,
|
||||
ZigLLVM_ARMSubArch_v8r,
|
||||
ZigLLVM_ARMSubArch_v8m_baseline,
|
||||
ZigLLVM_ARMSubArch_v8m_mainline,
|
||||
ZigLLVM_ARMSubArch_v8_1m_mainline,
|
||||
ZigLLVM_ARMSubArch_v7,
|
||||
ZigLLVM_ARMSubArch_v7em,
|
||||
ZigLLVM_ARMSubArch_v7m,
|
||||
ZigLLVM_ARMSubArch_v7s,
|
||||
ZigLLVM_ARMSubArch_v7k,
|
||||
ZigLLVM_ARMSubArch_v7ve,
|
||||
ZigLLVM_ARMSubArch_v6,
|
||||
ZigLLVM_ARMSubArch_v6m,
|
||||
ZigLLVM_ARMSubArch_v6k,
|
||||
ZigLLVM_ARMSubArch_v6t2,
|
||||
ZigLLVM_ARMSubArch_v5,
|
||||
ZigLLVM_ARMSubArch_v5te,
|
||||
ZigLLVM_ARMSubArch_v4t,
|
||||
|
||||
};
|
||||
|
||||
static const ZigLLVM_SubArchType subarch_list_arm64[] = {
|
||||
ZigLLVM_ARMSubArch_v8_5a,
|
||||
ZigLLVM_ARMSubArch_v8_4a,
|
||||
ZigLLVM_ARMSubArch_v8_3a,
|
||||
ZigLLVM_ARMSubArch_v8_2a,
|
||||
ZigLLVM_ARMSubArch_v8_1a,
|
||||
ZigLLVM_ARMSubArch_v8,
|
||||
};
|
||||
|
||||
static const ZigLLVM_SubArchType subarch_list_kalimba[] = {
|
||||
ZigLLVM_KalimbaSubArch_v5,
|
||||
ZigLLVM_KalimbaSubArch_v4,
|
||||
ZigLLVM_KalimbaSubArch_v3,
|
||||
};
|
||||
|
||||
static const ZigLLVM_SubArchType subarch_list_mips[] = {
|
||||
ZigLLVM_MipsSubArch_r6,
|
||||
};
|
||||
|
||||
static const ZigLLVM_ArchType arch_list[] = {
|
||||
ZigLLVM_arm, // ARM (little endian): arm, armv.*, xscale
|
||||
ZigLLVM_armeb, // ARM (big endian): armeb
|
||||
@ -509,7 +455,6 @@ void get_native_target(ZigTarget *target) {
|
||||
ZigLLVM_ObjectFormatType oformat; // ignored; based on arch/os
|
||||
ZigLLVMGetNativeTarget(
|
||||
&target->arch,
|
||||
&target->sub_arch,
|
||||
&target->vendor,
|
||||
&os_type,
|
||||
&target->abi,
|
||||
@ -535,223 +480,18 @@ void target_init_default_glibc_version(ZigTarget *target) {
|
||||
*target->glibc_version = {2, 17, 0};
|
||||
}
|
||||
|
||||
Error target_parse_archsub(ZigLLVM_ArchType *out_arch, ZigLLVM_SubArchType *out_sub,
|
||||
const char *archsub_ptr, size_t archsub_len)
|
||||
{
|
||||
Error target_parse_arch(ZigLLVM_ArchType *out_arch, const char *arch_ptr, size_t arch_len) {
|
||||
*out_arch = ZigLLVM_UnknownArch;
|
||||
*out_sub = ZigLLVM_NoSubArch;
|
||||
for (size_t arch_i = 0; arch_i < array_length(arch_list); arch_i += 1) {
|
||||
ZigLLVM_ArchType arch = arch_list[arch_i];
|
||||
SubArchList sub_arch_list = target_subarch_list(arch);
|
||||
size_t subarch_count = target_subarch_count(sub_arch_list);
|
||||
if (mem_eql_str(archsub_ptr, archsub_len, target_arch_name(arch))) {
|
||||
if (mem_eql_str(arch_ptr, arch_len, target_arch_name(arch))) {
|
||||
*out_arch = arch;
|
||||
if (subarch_count == 0) {
|
||||
return ErrorNone;
|
||||
}
|
||||
}
|
||||
for (size_t sub_i = 0; sub_i < subarch_count; sub_i += 1) {
|
||||
ZigLLVM_SubArchType sub = target_subarch_enum(sub_arch_list, sub_i);
|
||||
char arch_name[64];
|
||||
int n = sprintf(arch_name, "%s%s", target_arch_name(arch), target_subarch_name(sub));
|
||||
if (mem_eql_mem(arch_name, n, archsub_ptr, archsub_len)) {
|
||||
*out_arch = arch;
|
||||
*out_sub = sub;
|
||||
return ErrorNone;
|
||||
}
|
||||
return ErrorNone;
|
||||
}
|
||||
}
|
||||
return ErrorUnknownArchitecture;
|
||||
}
|
||||
|
||||
SubArchList target_subarch_list(ZigLLVM_ArchType arch) {
|
||||
switch (arch) {
|
||||
case ZigLLVM_UnknownArch:
|
||||
zig_unreachable();
|
||||
case ZigLLVM_arm:
|
||||
case ZigLLVM_armeb:
|
||||
case ZigLLVM_thumb:
|
||||
case ZigLLVM_thumbeb:
|
||||
return SubArchListArm32;
|
||||
|
||||
case ZigLLVM_aarch64:
|
||||
case ZigLLVM_aarch64_be:
|
||||
case ZigLLVM_aarch64_32:
|
||||
return SubArchListArm64;
|
||||
|
||||
case ZigLLVM_kalimba:
|
||||
return SubArchListKalimba;
|
||||
|
||||
case ZigLLVM_arc:
|
||||
case ZigLLVM_avr:
|
||||
case ZigLLVM_bpfel:
|
||||
case ZigLLVM_bpfeb:
|
||||
case ZigLLVM_hexagon:
|
||||
case ZigLLVM_mips:
|
||||
case ZigLLVM_mipsel:
|
||||
case ZigLLVM_mips64:
|
||||
case ZigLLVM_mips64el:
|
||||
case ZigLLVM_msp430:
|
||||
case ZigLLVM_ppc:
|
||||
case ZigLLVM_ppc64:
|
||||
case ZigLLVM_ppc64le:
|
||||
case ZigLLVM_r600:
|
||||
case ZigLLVM_amdgcn:
|
||||
case ZigLLVM_riscv32:
|
||||
case ZigLLVM_riscv64:
|
||||
case ZigLLVM_sparc:
|
||||
case ZigLLVM_sparcv9:
|
||||
case ZigLLVM_sparcel:
|
||||
case ZigLLVM_systemz:
|
||||
case ZigLLVM_tce:
|
||||
case ZigLLVM_tcele:
|
||||
case ZigLLVM_x86:
|
||||
case ZigLLVM_x86_64:
|
||||
case ZigLLVM_xcore:
|
||||
case ZigLLVM_nvptx:
|
||||
case ZigLLVM_nvptx64:
|
||||
case ZigLLVM_le32:
|
||||
case ZigLLVM_le64:
|
||||
case ZigLLVM_amdil:
|
||||
case ZigLLVM_amdil64:
|
||||
case ZigLLVM_hsail:
|
||||
case ZigLLVM_hsail64:
|
||||
case ZigLLVM_spir:
|
||||
case ZigLLVM_spir64:
|
||||
case ZigLLVM_shave:
|
||||
case ZigLLVM_lanai:
|
||||
case ZigLLVM_wasm32:
|
||||
case ZigLLVM_wasm64:
|
||||
case ZigLLVM_renderscript32:
|
||||
case ZigLLVM_renderscript64:
|
||||
return SubArchListNone;
|
||||
}
|
||||
zig_unreachable();
|
||||
}
|
||||
|
||||
size_t target_subarch_count(SubArchList sub_arch_list) {
|
||||
switch (sub_arch_list) {
|
||||
case SubArchListNone:
|
||||
return 0;
|
||||
case SubArchListArm32:
|
||||
return array_length(subarch_list_arm32);
|
||||
case SubArchListArm64:
|
||||
return array_length(subarch_list_arm64);
|
||||
case SubArchListKalimba:
|
||||
return array_length(subarch_list_kalimba);
|
||||
case SubArchListMips:
|
||||
return array_length(subarch_list_mips);
|
||||
}
|
||||
zig_unreachable();
|
||||
}
|
||||
|
||||
ZigLLVM_SubArchType target_subarch_enum(SubArchList sub_arch_list, size_t i) {
|
||||
switch (sub_arch_list) {
|
||||
case SubArchListNone:
|
||||
zig_unreachable();
|
||||
case SubArchListArm32:
|
||||
assert(i < array_length(subarch_list_arm32));
|
||||
return subarch_list_arm32[i];
|
||||
case SubArchListArm64:
|
||||
assert(i < array_length(subarch_list_arm64));
|
||||
return subarch_list_arm64[i];
|
||||
case SubArchListKalimba:
|
||||
assert(i < array_length(subarch_list_kalimba));
|
||||
return subarch_list_kalimba[i];
|
||||
case SubArchListMips:
|
||||
assert(i < array_length(subarch_list_mips));
|
||||
return subarch_list_mips[i];
|
||||
}
|
||||
zig_unreachable();
|
||||
}
|
||||
|
||||
const char *target_subarch_name(ZigLLVM_SubArchType subarch) {
|
||||
switch (subarch) {
|
||||
case ZigLLVM_NoSubArch:
|
||||
return "";
|
||||
case ZigLLVM_ARMSubArch_v8_5a:
|
||||
return "v8_5a";
|
||||
case ZigLLVM_ARMSubArch_v8_4a:
|
||||
return "v8_4a";
|
||||
case ZigLLVM_ARMSubArch_v8_3a:
|
||||
return "v8_3a";
|
||||
case ZigLLVM_ARMSubArch_v8_2a:
|
||||
return "v8_2a";
|
||||
case ZigLLVM_ARMSubArch_v8_1a:
|
||||
return "v8_1a";
|
||||
case ZigLLVM_ARMSubArch_v8:
|
||||
return "v8a";
|
||||
case ZigLLVM_ARMSubArch_v8r:
|
||||
return "v8r";
|
||||
case ZigLLVM_ARMSubArch_v8m_baseline:
|
||||
return "v8m_baseline";
|
||||
case ZigLLVM_ARMSubArch_v8m_mainline:
|
||||
return "v8m_mainline";
|
||||
case ZigLLVM_ARMSubArch_v8_1m_mainline:
|
||||
return "v8_1m_mainline";
|
||||
case ZigLLVM_ARMSubArch_v7:
|
||||
return "v7a";
|
||||
case ZigLLVM_ARMSubArch_v7em:
|
||||
return "v7em";
|
||||
case ZigLLVM_ARMSubArch_v7m:
|
||||
return "v7m";
|
||||
case ZigLLVM_ARMSubArch_v7s:
|
||||
return "v7s";
|
||||
case ZigLLVM_ARMSubArch_v7k:
|
||||
return "v7k";
|
||||
case ZigLLVM_ARMSubArch_v7ve:
|
||||
return "v7ve";
|
||||
case ZigLLVM_ARMSubArch_v6:
|
||||
return "v6";
|
||||
case ZigLLVM_ARMSubArch_v6m:
|
||||
return "v6m";
|
||||
case ZigLLVM_ARMSubArch_v6k:
|
||||
return "v6k";
|
||||
case ZigLLVM_ARMSubArch_v6t2:
|
||||
return "v6t2";
|
||||
case ZigLLVM_ARMSubArch_v5:
|
||||
return "v5";
|
||||
case ZigLLVM_ARMSubArch_v5te:
|
||||
return "v5te";
|
||||
case ZigLLVM_ARMSubArch_v4t:
|
||||
return "v4t";
|
||||
case ZigLLVM_KalimbaSubArch_v3:
|
||||
return "v3";
|
||||
case ZigLLVM_KalimbaSubArch_v4:
|
||||
return "v4";
|
||||
case ZigLLVM_KalimbaSubArch_v5:
|
||||
return "v5";
|
||||
case ZigLLVM_MipsSubArch_r6:
|
||||
return "r6";
|
||||
}
|
||||
zig_unreachable();
|
||||
}
|
||||
|
||||
size_t target_subarch_list_count(void) {
|
||||
return array_length(subarch_list_list);
|
||||
}
|
||||
|
||||
SubArchList target_subarch_list_enum(size_t index) {
|
||||
assert(index < array_length(subarch_list_list));
|
||||
return subarch_list_list[index];
|
||||
}
|
||||
|
||||
const char *target_subarch_list_name(SubArchList sub_arch_list) {
|
||||
switch (sub_arch_list) {
|
||||
case SubArchListNone:
|
||||
return "None";
|
||||
case SubArchListArm32:
|
||||
return "Arm32";
|
||||
case SubArchListArm64:
|
||||
return "Arm64";
|
||||
case SubArchListKalimba:
|
||||
return "Kalimba";
|
||||
case SubArchListMips:
|
||||
return "Mips";
|
||||
}
|
||||
zig_unreachable();
|
||||
}
|
||||
|
||||
Error target_parse_os(Os *out_os, const char *os_ptr, size_t os_len) {
|
||||
for (size_t i = 0; i < array_length(os_list); i += 1) {
|
||||
Os os = os_list[i];
|
||||
@ -776,42 +516,8 @@ Error target_parse_abi(ZigLLVM_EnvironmentType *out_abi, const char *abi_ptr, si
|
||||
return ErrorUnknownABI;
|
||||
}
|
||||
|
||||
Error target_parse_triple(ZigTarget *target, const char *triple) {
|
||||
Error err;
|
||||
|
||||
// first initialize all to zero
|
||||
*target = {};
|
||||
|
||||
SplitIterator it = memSplit(str(triple), str("-"));
|
||||
|
||||
Optional<Slice<uint8_t>> opt_archsub = SplitIterator_next(&it);
|
||||
Optional<Slice<uint8_t>> opt_os = SplitIterator_next(&it);
|
||||
Optional<Slice<uint8_t>> opt_abi = SplitIterator_next(&it);
|
||||
|
||||
if (!opt_archsub.is_some)
|
||||
return ErrorMissingArchitecture;
|
||||
|
||||
if ((err = target_parse_archsub(&target->arch, &target->sub_arch,
|
||||
(char*)opt_archsub.value.ptr, opt_archsub.value.len)))
|
||||
{
|
||||
return err;
|
||||
}
|
||||
|
||||
if (!opt_os.is_some)
|
||||
return ErrorMissingOperatingSystem;
|
||||
|
||||
if ((err = target_parse_os(&target->os, (char*)opt_os.value.ptr, opt_os.value.len))) {
|
||||
return err;
|
||||
}
|
||||
|
||||
if (opt_abi.is_some) {
|
||||
if ((err = target_parse_abi(&target->abi, (char*)opt_abi.value.ptr, opt_abi.value.len))) {
|
||||
return err;
|
||||
}
|
||||
} else {
|
||||
target->abi = target_default_abi(target->arch, target->os);
|
||||
}
|
||||
return ErrorNone;
|
||||
Error target_parse_triple(ZigTarget *target, const char *triple, const char *mcpu) {
|
||||
return stage2_target_parse(target, triple, mcpu);
|
||||
}
|
||||
|
||||
const char *target_arch_name(ZigLLVM_ArchType arch) {
|
||||
@ -828,18 +534,16 @@ void init_all_targets(void) {
|
||||
|
||||
void target_triple_zig(Buf *triple, const ZigTarget *target) {
|
||||
buf_resize(triple, 0);
|
||||
buf_appendf(triple, "%s%s-%s-%s",
|
||||
buf_appendf(triple, "%s-%s-%s",
|
||||
target_arch_name(target->arch),
|
||||
target_subarch_name(target->sub_arch),
|
||||
target_os_name(target->os),
|
||||
target_abi_name(target->abi));
|
||||
}
|
||||
|
||||
void target_triple_llvm(Buf *triple, const ZigTarget *target) {
|
||||
buf_resize(triple, 0);
|
||||
buf_appendf(triple, "%s%s-%s-%s-%s",
|
||||
buf_appendf(triple, "%s-%s-%s-%s",
|
||||
ZigLLVMGetArchTypeName(target->arch),
|
||||
ZigLLVMGetSubArchTypeName(target->sub_arch),
|
||||
ZigLLVMGetVendorTypeName(target->vendor),
|
||||
ZigLLVMGetOSTypeName(get_llvm_os_type(target->os)),
|
||||
ZigLLVMGetEnvironmentTypeName(target->abi));
|
||||
@ -1216,10 +920,8 @@ bool target_can_exec(const ZigTarget *host_target, const ZigTarget *guest_target
|
||||
return true;
|
||||
}
|
||||
|
||||
if (guest_target->os == host_target->os && guest_target->arch == host_target->arch &&
|
||||
guest_target->sub_arch == host_target->sub_arch)
|
||||
{
|
||||
// OS, arch, and sub-arch match
|
||||
if (guest_target->os == host_target->os && guest_target->arch == host_target->arch) {
|
||||
// OS and arch match
|
||||
return true;
|
||||
}
|
||||
|
||||
@ -1641,7 +1343,6 @@ void target_libc_enum(size_t index, ZigTarget *out_target) {
|
||||
out_target->arch = libcs_available[index].arch;
|
||||
out_target->os = libcs_available[index].os;
|
||||
out_target->abi = libcs_available[index].abi;
|
||||
out_target->sub_arch = ZigLLVM_NoSubArch;
|
||||
out_target->vendor = ZigLLVM_UnknownVendor;
|
||||
out_target->is_native = false;
|
||||
}
|
||||
|
||||
@ -12,15 +12,6 @@
|
||||
|
||||
struct Buf;
|
||||
|
||||
// Synchronize with target.cpp::subarch_list_list
|
||||
enum SubArchList {
|
||||
SubArchListNone,
|
||||
SubArchListArm32,
|
||||
SubArchListArm64,
|
||||
SubArchListKalimba,
|
||||
SubArchListMips,
|
||||
};
|
||||
|
||||
enum TargetSubsystem {
|
||||
TargetSubsystemConsole,
|
||||
TargetSubsystemWindows,
|
||||
@ -50,9 +41,8 @@ enum CIntType {
|
||||
CIntTypeCount,
|
||||
};
|
||||
|
||||
Error target_parse_triple(ZigTarget *target, const char *triple);
|
||||
Error target_parse_archsub(ZigLLVM_ArchType *arch, ZigLLVM_SubArchType *sub,
|
||||
const char *archsub_ptr, size_t archsub_len);
|
||||
Error target_parse_triple(ZigTarget *target, const char *triple, const char *mcpu);
|
||||
Error target_parse_arch(ZigLLVM_ArchType *arch, const char *arch_ptr, size_t arch_len);
|
||||
Error target_parse_os(Os *os, const char *os_ptr, size_t os_len);
|
||||
Error target_parse_abi(ZigLLVM_EnvironmentType *abi, const char *abi_ptr, size_t abi_len);
|
||||
|
||||
@ -63,15 +53,6 @@ size_t target_arch_count(void);
|
||||
ZigLLVM_ArchType target_arch_enum(size_t index);
|
||||
const char *target_arch_name(ZigLLVM_ArchType arch);
|
||||
|
||||
SubArchList target_subarch_list(ZigLLVM_ArchType arch);
|
||||
size_t target_subarch_count(SubArchList sub_arch_list);
|
||||
ZigLLVM_SubArchType target_subarch_enum(SubArchList subarch_list, size_t index);
|
||||
const char *target_subarch_name(ZigLLVM_SubArchType subarch);
|
||||
|
||||
size_t target_subarch_list_count(void);
|
||||
SubArchList target_subarch_list_enum(size_t index);
|
||||
const char *target_subarch_list_name(SubArchList sub_arch_list);
|
||||
|
||||
const char *arch_stack_pointer_register_name(ZigLLVM_ArchType arch);
|
||||
|
||||
size_t target_vendor_count(void);
|
||||
|
||||
@ -806,7 +806,7 @@ const char *ZigLLVMGetEnvironmentTypeName(ZigLLVM_EnvironmentType env_type) {
|
||||
return (const char*)Triple::getEnvironmentTypeName((Triple::EnvironmentType)env_type).bytes_begin();
|
||||
}
|
||||
|
||||
void ZigLLVMGetNativeTarget(ZigLLVM_ArchType *arch_type, ZigLLVM_SubArchType *sub_arch_type,
|
||||
void ZigLLVMGetNativeTarget(ZigLLVM_ArchType *arch_type,
|
||||
ZigLLVM_VendorType *vendor_type, ZigLLVM_OSType *os_type, ZigLLVM_EnvironmentType *environ_type,
|
||||
ZigLLVM_ObjectFormatType *oformat)
|
||||
{
|
||||
@ -814,7 +814,6 @@ void ZigLLVMGetNativeTarget(ZigLLVM_ArchType *arch_type, ZigLLVM_SubArchType *su
|
||||
Triple triple(Triple::normalize(native_triple));
|
||||
|
||||
*arch_type = (ZigLLVM_ArchType)triple.getArch();
|
||||
*sub_arch_type = (ZigLLVM_SubArchType)triple.getSubArch();
|
||||
*vendor_type = (ZigLLVM_VendorType)triple.getVendor();
|
||||
*os_type = (ZigLLVM_OSType)triple.getOS();
|
||||
*environ_type = (ZigLLVM_EnvironmentType)triple.getEnvironment();
|
||||
@ -823,68 +822,6 @@ void ZigLLVMGetNativeTarget(ZigLLVM_ArchType *arch_type, ZigLLVM_SubArchType *su
|
||||
free(native_triple);
|
||||
}
|
||||
|
||||
const char *ZigLLVMGetSubArchTypeName(ZigLLVM_SubArchType sub_arch) {
|
||||
switch (sub_arch) {
|
||||
case ZigLLVM_NoSubArch:
|
||||
return "";
|
||||
case ZigLLVM_ARMSubArch_v8_5a:
|
||||
return "v8.5a";
|
||||
case ZigLLVM_ARMSubArch_v8_4a:
|
||||
return "v8.4a";
|
||||
case ZigLLVM_ARMSubArch_v8_3a:
|
||||
return "v8.3a";
|
||||
case ZigLLVM_ARMSubArch_v8_2a:
|
||||
return "v8.2a";
|
||||
case ZigLLVM_ARMSubArch_v8_1a:
|
||||
return "v8.1a";
|
||||
case ZigLLVM_ARMSubArch_v8:
|
||||
return "v8a";
|
||||
case ZigLLVM_ARMSubArch_v8r:
|
||||
return "v8r";
|
||||
case ZigLLVM_ARMSubArch_v8m_baseline:
|
||||
return "v8m.base";
|
||||
case ZigLLVM_ARMSubArch_v8m_mainline:
|
||||
return "v8m.main";
|
||||
case ZigLLVM_ARMSubArch_v8_1m_mainline:
|
||||
return "v8.1m.main";
|
||||
case ZigLLVM_ARMSubArch_v7:
|
||||
return "v7a";
|
||||
case ZigLLVM_ARMSubArch_v7em:
|
||||
return "v7em";
|
||||
case ZigLLVM_ARMSubArch_v7m:
|
||||
return "v7m";
|
||||
case ZigLLVM_ARMSubArch_v7s:
|
||||
return "v7s";
|
||||
case ZigLLVM_ARMSubArch_v7k:
|
||||
return "v7k";
|
||||
case ZigLLVM_ARMSubArch_v7ve:
|
||||
return "v7ve";
|
||||
case ZigLLVM_ARMSubArch_v6:
|
||||
return "v6";
|
||||
case ZigLLVM_ARMSubArch_v6m:
|
||||
return "v6m";
|
||||
case ZigLLVM_ARMSubArch_v6k:
|
||||
return "v6k";
|
||||
case ZigLLVM_ARMSubArch_v6t2:
|
||||
return "v6t2";
|
||||
case ZigLLVM_ARMSubArch_v5:
|
||||
return "v5";
|
||||
case ZigLLVM_ARMSubArch_v5te:
|
||||
return "v5te";
|
||||
case ZigLLVM_ARMSubArch_v4t:
|
||||
return "v4t";
|
||||
case ZigLLVM_KalimbaSubArch_v3:
|
||||
return "v3";
|
||||
case ZigLLVM_KalimbaSubArch_v4:
|
||||
return "v4";
|
||||
case ZigLLVM_KalimbaSubArch_v5:
|
||||
return "v5";
|
||||
case ZigLLVM_MipsSubArch_r6:
|
||||
return "r6";
|
||||
}
|
||||
abort();
|
||||
}
|
||||
|
||||
void ZigLLVMAddModuleDebugInfoFlag(LLVMModuleRef module) {
|
||||
unwrap(module)->addModuleFlag(Module::Warning, "Debug Info Version", DEBUG_METADATA_VERSION);
|
||||
unwrap(module)->addModuleFlag(Module::Warning, "Dwarf Version", 4);
|
||||
@ -1218,35 +1155,6 @@ static_assert((Triple::ArchType)ZigLLVM_renderscript32 == Triple::renderscript32
|
||||
static_assert((Triple::ArchType)ZigLLVM_renderscript64 == Triple::renderscript64, "");
|
||||
static_assert((Triple::ArchType)ZigLLVM_LastArchType == Triple::LastArchType, "");
|
||||
|
||||
static_assert((Triple::SubArchType)ZigLLVM_NoSubArch == Triple::NoSubArch, "");
|
||||
static_assert((Triple::SubArchType)ZigLLVM_ARMSubArch_v8_4a == Triple::ARMSubArch_v8_4a, "");
|
||||
static_assert((Triple::SubArchType)ZigLLVM_ARMSubArch_v8_3a == Triple::ARMSubArch_v8_3a, "");
|
||||
static_assert((Triple::SubArchType)ZigLLVM_ARMSubArch_v8_2a == Triple::ARMSubArch_v8_2a, "");
|
||||
static_assert((Triple::SubArchType)ZigLLVM_ARMSubArch_v8_1a == Triple::ARMSubArch_v8_1a, "");
|
||||
static_assert((Triple::SubArchType)ZigLLVM_ARMSubArch_v8 == Triple::ARMSubArch_v8, "");
|
||||
static_assert((Triple::SubArchType)ZigLLVM_ARMSubArch_v8r == Triple::ARMSubArch_v8r, "");
|
||||
static_assert((Triple::SubArchType)ZigLLVM_ARMSubArch_v8m_baseline == Triple::ARMSubArch_v8m_baseline, "");
|
||||
static_assert((Triple::SubArchType)ZigLLVM_ARMSubArch_v8m_mainline == Triple::ARMSubArch_v8m_mainline, "");
|
||||
static_assert((Triple::SubArchType)ZigLLVM_ARMSubArch_v8_1m_mainline == Triple::ARMSubArch_v8_1m_mainline, "");
|
||||
static_assert((Triple::SubArchType)ZigLLVM_ARMSubArch_v7 == Triple::ARMSubArch_v7, "");
|
||||
static_assert((Triple::SubArchType)ZigLLVM_ARMSubArch_v7em == Triple::ARMSubArch_v7em, "");
|
||||
static_assert((Triple::SubArchType)ZigLLVM_ARMSubArch_v7m == Triple::ARMSubArch_v7m, "");
|
||||
static_assert((Triple::SubArchType)ZigLLVM_ARMSubArch_v7s == Triple::ARMSubArch_v7s, "");
|
||||
static_assert((Triple::SubArchType)ZigLLVM_ARMSubArch_v7k == Triple::ARMSubArch_v7k, "");
|
||||
static_assert((Triple::SubArchType)ZigLLVM_ARMSubArch_v7ve == Triple::ARMSubArch_v7ve, "");
|
||||
static_assert((Triple::SubArchType)ZigLLVM_ARMSubArch_v6 == Triple::ARMSubArch_v6, "");
|
||||
static_assert((Triple::SubArchType)ZigLLVM_ARMSubArch_v6m == Triple::ARMSubArch_v6m, "");
|
||||
static_assert((Triple::SubArchType)ZigLLVM_ARMSubArch_v6k == Triple::ARMSubArch_v6k, "");
|
||||
static_assert((Triple::SubArchType)ZigLLVM_ARMSubArch_v6t2 == Triple::ARMSubArch_v6t2, "");
|
||||
static_assert((Triple::SubArchType)ZigLLVM_ARMSubArch_v5 == Triple::ARMSubArch_v5, "");
|
||||
static_assert((Triple::SubArchType)ZigLLVM_ARMSubArch_v5te == Triple::ARMSubArch_v5te, "");
|
||||
static_assert((Triple::SubArchType)ZigLLVM_ARMSubArch_v4t == Triple::ARMSubArch_v4t, "");
|
||||
static_assert((Triple::SubArchType)ZigLLVM_KalimbaSubArch_v3 == Triple::KalimbaSubArch_v3, "");
|
||||
static_assert((Triple::SubArchType)ZigLLVM_KalimbaSubArch_v4 == Triple::KalimbaSubArch_v4, "");
|
||||
static_assert((Triple::SubArchType)ZigLLVM_KalimbaSubArch_v5 == Triple::KalimbaSubArch_v5, "");
|
||||
static_assert((Triple::SubArchType)ZigLLVM_KalimbaSubArch_v5 == Triple::KalimbaSubArch_v5, "");
|
||||
static_assert((Triple::SubArchType)ZigLLVM_MipsSubArch_r6 == Triple::MipsSubArch_r6, "");
|
||||
|
||||
static_assert((Triple::VendorType)ZigLLVM_UnknownVendor == Triple::UnknownVendor, "");
|
||||
static_assert((Triple::VendorType)ZigLLVM_Apple == Triple::Apple, "");
|
||||
static_assert((Triple::VendorType)ZigLLVM_PC == Triple::PC, "");
|
||||
|
||||
@ -324,41 +324,6 @@ enum ZigLLVM_ArchType {
|
||||
ZigLLVM_LastArchType = ZigLLVM_renderscript64
|
||||
};
|
||||
|
||||
// synchronize with lists in target.cpp
|
||||
enum ZigLLVM_SubArchType {
|
||||
ZigLLVM_NoSubArch,
|
||||
|
||||
ZigLLVM_ARMSubArch_v8_5a,
|
||||
ZigLLVM_ARMSubArch_v8_4a,
|
||||
ZigLLVM_ARMSubArch_v8_3a,
|
||||
ZigLLVM_ARMSubArch_v8_2a,
|
||||
ZigLLVM_ARMSubArch_v8_1a,
|
||||
ZigLLVM_ARMSubArch_v8,
|
||||
ZigLLVM_ARMSubArch_v8r,
|
||||
ZigLLVM_ARMSubArch_v8m_baseline,
|
||||
ZigLLVM_ARMSubArch_v8m_mainline,
|
||||
ZigLLVM_ARMSubArch_v8_1m_mainline,
|
||||
ZigLLVM_ARMSubArch_v7,
|
||||
ZigLLVM_ARMSubArch_v7em,
|
||||
ZigLLVM_ARMSubArch_v7m,
|
||||
ZigLLVM_ARMSubArch_v7s,
|
||||
ZigLLVM_ARMSubArch_v7k,
|
||||
ZigLLVM_ARMSubArch_v7ve,
|
||||
ZigLLVM_ARMSubArch_v6,
|
||||
ZigLLVM_ARMSubArch_v6m,
|
||||
ZigLLVM_ARMSubArch_v6k,
|
||||
ZigLLVM_ARMSubArch_v6t2,
|
||||
ZigLLVM_ARMSubArch_v5,
|
||||
ZigLLVM_ARMSubArch_v5te,
|
||||
ZigLLVM_ARMSubArch_v4t,
|
||||
|
||||
ZigLLVM_KalimbaSubArch_v3,
|
||||
ZigLLVM_KalimbaSubArch_v4,
|
||||
ZigLLVM_KalimbaSubArch_v5,
|
||||
|
||||
ZigLLVM_MipsSubArch_r6,
|
||||
};
|
||||
|
||||
enum ZigLLVM_VendorType {
|
||||
ZigLLVM_UnknownVendor,
|
||||
|
||||
@ -518,7 +483,6 @@ LLVMValueRef ZigLLVMBuildAtomicRMW(LLVMBuilderRef B, enum ZigLLVM_AtomicRMWBinOp
|
||||
#define ZigLLVM_DIFlags_AllCallsDescribed (1U << 29)
|
||||
|
||||
ZIG_EXTERN_C const char *ZigLLVMGetArchTypeName(enum ZigLLVM_ArchType arch);
|
||||
ZIG_EXTERN_C const char *ZigLLVMGetSubArchTypeName(enum ZigLLVM_SubArchType sub_arch);
|
||||
ZIG_EXTERN_C const char *ZigLLVMGetVendorTypeName(enum ZigLLVM_VendorType vendor);
|
||||
ZIG_EXTERN_C const char *ZigLLVMGetOSTypeName(enum ZigLLVM_OSType os);
|
||||
ZIG_EXTERN_C const char *ZigLLVMGetEnvironmentTypeName(enum ZigLLVM_EnvironmentType abi);
|
||||
@ -532,7 +496,7 @@ ZIG_EXTERN_C bool ZigLLVMWriteArchive(const char *archive_name, const char **fil
|
||||
bool ZigLLVMWriteImportLibrary(const char *def_path, const enum ZigLLVM_ArchType arch,
|
||||
const char *output_lib_path, const bool kill_at);
|
||||
|
||||
ZIG_EXTERN_C void ZigLLVMGetNativeTarget(enum ZigLLVM_ArchType *arch_type, enum ZigLLVM_SubArchType *sub_arch_type,
|
||||
ZIG_EXTERN_C void ZigLLVMGetNativeTarget(enum ZigLLVM_ArchType *arch_type,
|
||||
enum ZigLLVM_VendorType *vendor_type, enum ZigLLVM_OSType *os_type, enum ZigLLVM_EnvironmentType *environ_type,
|
||||
enum ZigLLVM_ObjectFormatType *oformat);
|
||||
|
||||
|
||||
@ -362,8 +362,7 @@ pub fn addCases(cases: *tests.CompileErrorContext) void {
|
||||
});
|
||||
tc.target = Target{
|
||||
.Cross = .{
|
||||
.arch = .wasm32,
|
||||
.cpu_features = Target.Arch.wasm32.getBaselineCpuFeatures(),
|
||||
.cpu = Target.Cpu.baseline(.wasm32),
|
||||
.os = .wasi,
|
||||
.abi = .none,
|
||||
},
|
||||
@ -764,8 +763,7 @@ pub fn addCases(cases: *tests.CompileErrorContext) void {
|
||||
});
|
||||
tc.target = Target{
|
||||
.Cross = .{
|
||||
.arch = .x86_64,
|
||||
.cpu_features = Target.Arch.x86_64.getBaselineCpuFeatures(),
|
||||
.cpu = Target.Cpu.baseline(.x86_64),
|
||||
.os = .linux,
|
||||
.abi = .gnu,
|
||||
},
|
||||
|
||||
@ -55,20 +55,18 @@ const test_targets = blk: {
|
||||
TestTarget{
|
||||
.target = Target{
|
||||
.Cross = CrossTarget{
|
||||
.cpu = Target.Cpu.baseline(.x86_64),
|
||||
.os = .linux,
|
||||
.arch = .x86_64,
|
||||
.abi = .none,
|
||||
.cpu_features = Target.Arch.x86_64.getBaselineCpuFeatures(),
|
||||
},
|
||||
},
|
||||
},
|
||||
TestTarget{
|
||||
.target = Target{
|
||||
.Cross = CrossTarget{
|
||||
.cpu = Target.Cpu.baseline(.x86_64),
|
||||
.os = .linux,
|
||||
.arch = .x86_64,
|
||||
.abi = .gnu,
|
||||
.cpu_features = Target.Arch.x86_64.getBaselineCpuFeatures(),
|
||||
},
|
||||
},
|
||||
.link_libc = true,
|
||||
@ -76,9 +74,8 @@ const test_targets = blk: {
|
||||
TestTarget{
|
||||
.target = Target{
|
||||
.Cross = CrossTarget{
|
||||
.cpu = Target.Cpu.baseline(.x86_64),
|
||||
.os = .linux,
|
||||
.arch = .x86_64,
|
||||
.cpu_features = Target.Arch.x86_64.getBaselineCpuFeatures(),
|
||||
.abi = .musl,
|
||||
},
|
||||
},
|
||||
@ -88,9 +85,8 @@ const test_targets = blk: {
|
||||
TestTarget{
|
||||
.target = Target{
|
||||
.Cross = CrossTarget{
|
||||
.cpu = Target.Cpu.baseline(.i386),
|
||||
.os = .linux,
|
||||
.arch = .i386,
|
||||
.cpu_features = Target.Arch.i386.getBaselineCpuFeatures(),
|
||||
.abi = .none,
|
||||
},
|
||||
},
|
||||
@ -98,9 +94,8 @@ const test_targets = blk: {
|
||||
TestTarget{
|
||||
.target = Target{
|
||||
.Cross = CrossTarget{
|
||||
.cpu = Target.Cpu.baseline(.i386),
|
||||
.os = .linux,
|
||||
.arch = .i386,
|
||||
.cpu_features = Target.Arch.i386.getBaselineCpuFeatures(),
|
||||
.abi = .musl,
|
||||
},
|
||||
},
|
||||
@ -110,9 +105,8 @@ const test_targets = blk: {
|
||||
TestTarget{
|
||||
.target = Target{
|
||||
.Cross = CrossTarget{
|
||||
.cpu = Target.Cpu.baseline(.aarch64),
|
||||
.os = .linux,
|
||||
.arch = Target.Arch{ .aarch64 = .v8a },
|
||||
.cpu_features = (Target.Arch{ .aarch64 = .v8a }).getBaselineCpuFeatures(),
|
||||
.abi = .none,
|
||||
},
|
||||
},
|
||||
@ -120,9 +114,8 @@ const test_targets = blk: {
|
||||
TestTarget{
|
||||
.target = Target{
|
||||
.Cross = CrossTarget{
|
||||
.cpu = Target.Cpu.baseline(.aarch64),
|
||||
.os = .linux,
|
||||
.arch = Target.Arch{ .aarch64 = .v8a },
|
||||
.cpu_features = (Target.Arch{ .aarch64 = .v8a }).getBaselineCpuFeatures(),
|
||||
.abi = .musl,
|
||||
},
|
||||
},
|
||||
@ -131,9 +124,8 @@ const test_targets = blk: {
|
||||
TestTarget{
|
||||
.target = Target{
|
||||
.Cross = CrossTarget{
|
||||
.cpu = Target.Cpu.baseline(.aarch64),
|
||||
.os = .linux,
|
||||
.arch = Target.Arch{ .aarch64 = .v8a },
|
||||
.cpu_features = (Target.Arch{ .aarch64 = .v8a }).getBaselineCpuFeatures(),
|
||||
.abi = .gnu,
|
||||
},
|
||||
},
|
||||
@ -141,45 +133,32 @@ const test_targets = blk: {
|
||||
},
|
||||
|
||||
TestTarget{
|
||||
.target = Target{
|
||||
.Cross = CrossTarget{
|
||||
.os = .linux,
|
||||
.arch = Target.Arch{ .arm = .v8a },
|
||||
.cpu_features = (Target.Arch{ .arm = .v8a }).getBaselineCpuFeatures(),
|
||||
.abi = .none,
|
||||
},
|
||||
},
|
||||
.target = Target.parse(.{
|
||||
.arch_os_abi = "arm-linux-none",
|
||||
.cpu_features = "generic+v8a",
|
||||
}) catch unreachable,
|
||||
},
|
||||
TestTarget{
|
||||
.target = Target{
|
||||
.Cross = CrossTarget{
|
||||
.os = .linux,
|
||||
.arch = Target.Arch{ .arm = .v8a },
|
||||
.cpu_features = (Target.Arch{ .arm = .v8a }).getBaselineCpuFeatures(),
|
||||
.abi = .musleabihf,
|
||||
},
|
||||
},
|
||||
.target = Target.parse(.{
|
||||
.arch_os_abi = "arm-linux-musleabihf",
|
||||
.cpu_features = "generic+v8a",
|
||||
}) catch unreachable,
|
||||
.link_libc = true,
|
||||
},
|
||||
// TODO https://github.com/ziglang/zig/issues/3287
|
||||
//TestTarget{
|
||||
// .target = Target{
|
||||
// .Cross = CrossTarget{
|
||||
// .os = .linux,
|
||||
// .arch = Target.Arch{ .arm = .v8a },
|
||||
// .cpu_features = (Target.Arch{ .arm = .v8a }).getBaselineCpuFeatures(),
|
||||
// .abi = .gnueabihf,
|
||||
// },
|
||||
// },
|
||||
// .target = Target.parse(.{
|
||||
// .arch_os_abi = "arm-linux-gnueabihf",
|
||||
// .cpu_features = "generic+v8a",
|
||||
// }) catch unreachable,
|
||||
// .link_libc = true,
|
||||
//},
|
||||
|
||||
TestTarget{
|
||||
.target = Target{
|
||||
.Cross = CrossTarget{
|
||||
.cpu = Target.Cpu.baseline(.mipsel),
|
||||
.os = .linux,
|
||||
.arch = .mipsel,
|
||||
.cpu_features = Target.Arch.mipsel.getBaselineCpuFeatures(),
|
||||
.abi = .none,
|
||||
},
|
||||
},
|
||||
@ -187,9 +166,8 @@ const test_targets = blk: {
|
||||
TestTarget{
|
||||
.target = Target{
|
||||
.Cross = CrossTarget{
|
||||
.cpu = Target.Cpu.baseline(.mipsel),
|
||||
.os = .linux,
|
||||
.arch = .mipsel,
|
||||
.cpu_features = Target.Arch.mipsel.getBaselineCpuFeatures(),
|
||||
.abi = .musl,
|
||||
},
|
||||
},
|
||||
@ -199,9 +177,8 @@ const test_targets = blk: {
|
||||
TestTarget{
|
||||
.target = Target{
|
||||
.Cross = CrossTarget{
|
||||
.cpu = Target.Cpu.baseline(.x86_64),
|
||||
.os = .macosx,
|
||||
.arch = .x86_64,
|
||||
.cpu_features = Target.Arch.x86_64.getBaselineCpuFeatures(),
|
||||
.abi = .gnu,
|
||||
},
|
||||
},
|
||||
@ -212,9 +189,8 @@ const test_targets = blk: {
|
||||
TestTarget{
|
||||
.target = Target{
|
||||
.Cross = CrossTarget{
|
||||
.cpu = Target.Cpu.baseline(.i386),
|
||||
.os = .windows,
|
||||
.arch = .i386,
|
||||
.cpu_features = Target.Arch.i386.getBaselineCpuFeatures(),
|
||||
.abi = .msvc,
|
||||
},
|
||||
},
|
||||
@ -223,9 +199,8 @@ const test_targets = blk: {
|
||||
TestTarget{
|
||||
.target = Target{
|
||||
.Cross = CrossTarget{
|
||||
.cpu = Target.Cpu.baseline(.x86_64),
|
||||
.os = .windows,
|
||||
.arch = .x86_64,
|
||||
.cpu_features = Target.Arch.x86_64.getBaselineCpuFeatures(),
|
||||
.abi = .msvc,
|
||||
},
|
||||
},
|
||||
@ -234,9 +209,8 @@ const test_targets = blk: {
|
||||
TestTarget{
|
||||
.target = Target{
|
||||
.Cross = CrossTarget{
|
||||
.cpu = Target.Cpu.baseline(.i386),
|
||||
.os = .windows,
|
||||
.arch = .i386,
|
||||
.cpu_features = Target.Arch.i386.getBaselineCpuFeatures(),
|
||||
.abi = .gnu,
|
||||
},
|
||||
},
|
||||
@ -246,9 +220,8 @@ const test_targets = blk: {
|
||||
TestTarget{
|
||||
.target = Target{
|
||||
.Cross = CrossTarget{
|
||||
.cpu = Target.Cpu.baseline(.x86_64),
|
||||
.os = .windows,
|
||||
.arch = .x86_64,
|
||||
.cpu_features = Target.Arch.x86_64.getBaselineCpuFeatures(),
|
||||
.abi = .gnu,
|
||||
},
|
||||
},
|
||||
@ -476,7 +449,7 @@ pub fn addPkgTests(
|
||||
const ArchTag = @TagType(builtin.Arch);
|
||||
if (test_target.disable_native and
|
||||
test_target.target.getOs() == builtin.os and
|
||||
@as(ArchTag, test_target.target.getArch()) == @as(ArchTag, builtin.arch))
|
||||
test_target.target.getArch() == builtin.arch)
|
||||
{
|
||||
continue;
|
||||
}
|
||||
|
||||
@ -1095,10 +1095,9 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
|
||||
|
||||
cases.addWithTarget("Calling convention", tests.Target{
|
||||
.Cross = .{
|
||||
.cpu = Target.Cpu.baseline(.i386),
|
||||
.os = .linux,
|
||||
.arch = .i386,
|
||||
.abi = .none,
|
||||
.cpu_features = Target.Arch.i386.getBaselineCpuFeatures(),
|
||||
},
|
||||
},
|
||||
\\void __attribute__((fastcall)) foo1(float *a);
|
||||
@ -1114,14 +1113,10 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
|
||||
\\pub fn foo5(a: [*c]f32) callconv(.Thiscall) void;
|
||||
});
|
||||
|
||||
cases.addWithTarget("Calling convention", tests.Target{
|
||||
.Cross = .{
|
||||
.os = .linux,
|
||||
.arch = .{ .arm = .v8_5a },
|
||||
.abi = .none,
|
||||
.cpu_features = (Target.Arch{ .arm = .v8_5a }).getBaselineCpuFeatures(),
|
||||
},
|
||||
},
|
||||
cases.addWithTarget("Calling convention", Target.parse(.{
|
||||
.arch_os_abi = "arm-linux-none",
|
||||
.cpu_features = "generic+v8_5a",
|
||||
}) catch unreachable,
|
||||
\\void __attribute__((pcs("aapcs"))) foo1(float *a);
|
||||
\\void __attribute__((pcs("aapcs-vfp"))) foo2(float *a);
|
||||
, &[_][]const u8{
|
||||
@ -1129,14 +1124,10 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
|
||||
\\pub fn foo2(a: [*c]f32) callconv(.AAPCSVFP) void;
|
||||
});
|
||||
|
||||
cases.addWithTarget("Calling convention", tests.Target{
|
||||
.Cross = .{
|
||||
.os = .linux,
|
||||
.arch = .{ .aarch64 = .v8_5a },
|
||||
.abi = .none,
|
||||
.cpu_features = (Target.Arch{ .aarch64 = .v8_5a }).getBaselineCpuFeatures(),
|
||||
},
|
||||
},
|
||||
cases.addWithTarget("Calling convention", Target.parse(.{
|
||||
.arch_os_abi = "aarch64-linux-none",
|
||||
.cpu_features = "generic+v8_5a",
|
||||
}) catch unreachable,
|
||||
\\void __attribute__((aarch64_vector_pcs)) foo1(float *a);
|
||||
, &[_][]const u8{
|
||||
\\pub fn foo1(a: [*c]f32) callconv(.Vectorcall) void;
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user