From 4c6f207aff482cf973218bbda1d28e6d2a619df5 Mon Sep 17 00:00:00 2001 From: Andrew Kelley Date: Wed, 19 Feb 2020 18:12:06 -0500 Subject: [PATCH 01/18] clean up arm CPU features * remove "cpu features" that are actually just processors * rename `v8` to `v8a`. this matches the corresponding change to target/aarch64.zig * rename types in preparation for removing sub-architecture from `std.Target`. I have other files changed in my dirty working tree, but about to make some changes to arm.zig that I don't want batched with this commit. --- lib/std/target/arm.zig | 333 +++++++++++++---------------------------- 1 file changed, 102 insertions(+), 231 deletions(-) diff --git a/lib/std/target/arm.zig b/lib/std/target/arm.zig index 62a4e1e835..16695b0006 100644 --- a/lib/std/target/arm.zig +++ b/lib/std/target/arm.zig @@ -1,25 +1,11 @@ const std = @import("../std.zig"); -const Cpu = std.Target.Cpu; +const CpuFeature = std.Target.Cpu.Feature; +const CpuModel = std.Target.Cpu.Model; pub const Feature = enum { @"32bit", @"8msecext", - a12, - a15, - a17, - a32, - a35, - a5, - a53, - a55, - a57, - a7, - a72, - a73, - a75, a76, - a8, - a9, aclass, acquire_release, aes, @@ -89,8 +75,6 @@ pub const Feature = enum { hwdiv_arm, iwmmxt, iwmmxt2, - krait, - kryo, lob, long_calls, loop_align, @@ -114,9 +98,6 @@ pub const Feature = enum { prefer_vmovsr, prof_unpr, r4, - r5, - r52, - r7, ras, rclass, read_tp_hard, @@ -148,7 +129,7 @@ pub const Feature = enum { v6t2, v7, v7clrex, - v8, + v8a, v8_1a, v8_1m_main, v8_2a, @@ -178,13 +159,13 @@ pub const Feature = enum { zcz, }; -pub usingnamespace Cpu.Feature.feature_set_fns(Feature); +pub usingnamespace CpuFeature.feature_set_fns(Feature); pub const all_features = blk: { @setEvalBranchQuota(10000); const len = @typeInfo(Feature).Enum.fields.len; - std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count); - var result: [len]Cpu.Feature = undefined; + std.debug.assert(len <= CpuFeature.Set.needed_bit_count); + var result: [len]CpuFeature = undefined; result[@enumToInt(Feature.@"32bit")] = .{ .llvm_name = "32bit", .description = "Prefer 32-bit Thumb instrs", @@ -195,86 +176,11 @@ pub const all_features = blk: { .description = "Enable support for ARMv8-M Security Extensions", .dependencies = featureSet(&[_]Feature{}), }; - result[@enumToInt(Feature.a12)] = .{ - .llvm_name = "a12", - .description = "Cortex-A12 ARM processors", - .dependencies = featureSet(&[_]Feature{}), - }; - result[@enumToInt(Feature.a15)] = .{ - .llvm_name = "a15", - .description = "Cortex-A15 ARM processors", - .dependencies = featureSet(&[_]Feature{}), - }; - result[@enumToInt(Feature.a17)] = .{ - .llvm_name = "a17", - .description = "Cortex-A17 ARM processors", - .dependencies = featureSet(&[_]Feature{}), - }; - result[@enumToInt(Feature.a32)] = .{ - .llvm_name = "a32", - .description = "Cortex-A32 ARM processors", - .dependencies = featureSet(&[_]Feature{}), - }; - result[@enumToInt(Feature.a35)] = .{ - .llvm_name = "a35", - .description = "Cortex-A35 ARM processors", - .dependencies = featureSet(&[_]Feature{}), - }; - result[@enumToInt(Feature.a5)] = .{ - .llvm_name = "a5", - .description = "Cortex-A5 ARM processors", - .dependencies = featureSet(&[_]Feature{}), - }; - result[@enumToInt(Feature.a53)] = .{ - .llvm_name = "a53", - .description = "Cortex-A53 ARM processors", - .dependencies = featureSet(&[_]Feature{}), - }; - result[@enumToInt(Feature.a55)] = .{ - .llvm_name = "a55", - .description = "Cortex-A55 ARM processors", - .dependencies = featureSet(&[_]Feature{}), - }; - result[@enumToInt(Feature.a57)] = .{ - .llvm_name = "a57", - .description = "Cortex-A57 ARM processors", - .dependencies = featureSet(&[_]Feature{}), - }; - result[@enumToInt(Feature.a7)] = .{ - .llvm_name = "a7", - .description = "Cortex-A7 ARM processors", - .dependencies = featureSet(&[_]Feature{}), - }; - result[@enumToInt(Feature.a72)] = .{ - .llvm_name = "a72", - .description = "Cortex-A72 ARM processors", - .dependencies = featureSet(&[_]Feature{}), - }; - result[@enumToInt(Feature.a73)] = .{ - .llvm_name = "a73", - .description = "Cortex-A73 ARM processors", - .dependencies = featureSet(&[_]Feature{}), - }; - result[@enumToInt(Feature.a75)] = .{ - .llvm_name = "a75", - .description = "Cortex-A75 ARM processors", - .dependencies = featureSet(&[_]Feature{}), - }; result[@enumToInt(Feature.a76)] = .{ .llvm_name = "a76", .description = "Cortex-A76 ARM processors", .dependencies = featureSet(&[_]Feature{}), }; - result[@enumToInt(Feature.a8)] = .{ - .llvm_name = "a8", - .description = "Cortex-A8 ARM processors", - .dependencies = featureSet(&[_]Feature{}), - }; - result[@enumToInt(Feature.a9)] = .{ - .llvm_name = "a9", - .description = "Cortex-A9 ARM processors", - .dependencies = featureSet(&[_]Feature{}), - }; result[@enumToInt(Feature.aclass)] = .{ .llvm_name = "aclass", .description = "Is application profile ('A' series)", @@ -497,7 +403,7 @@ pub const all_features = blk: { .mp, .neon, .trustzone, - .v8, + .v8a, .virtualization, }), }; @@ -543,7 +449,7 @@ pub const all_features = blk: { .mp, .neon, .rclass, - .v8, + .v8a, .virtualization, }), }; @@ -872,16 +778,6 @@ pub const all_features = blk: { .armv5te, }), }; - result[@enumToInt(Feature.krait)] = .{ - .llvm_name = "krait", - .description = "Qualcomm Krait processors", - .dependencies = featureSet(&[_]Feature{}), - }; - result[@enumToInt(Feature.kryo)] = .{ - .llvm_name = "kryo", - .description = "Qualcomm Kryo processors", - .dependencies = featureSet(&[_]Feature{}), - }; result[@enumToInt(Feature.lob)] = .{ .llvm_name = "lob", .description = "Enable Low Overhead Branch extensions", @@ -1008,21 +904,6 @@ pub const all_features = blk: { .description = "Cortex-R4 ARM processors", .dependencies = featureSet(&[_]Feature{}), }; - result[@enumToInt(Feature.r5)] = .{ - .llvm_name = "r5", - .description = "Cortex-R5 ARM processors", - .dependencies = featureSet(&[_]Feature{}), - }; - result[@enumToInt(Feature.r52)] = .{ - .llvm_name = "r52", - .description = "Cortex-R52 ARM processors", - .dependencies = featureSet(&[_]Feature{}), - }; - result[@enumToInt(Feature.r7)] = .{ - .llvm_name = "r7", - .description = "Cortex-R7 ARM processors", - .dependencies = featureSet(&[_]Feature{}), - }; result[@enumToInt(Feature.ras)] = .{ .llvm_name = "ras", .description = "Enable Reliability, Availability and Serviceability extensions", @@ -1200,9 +1081,9 @@ pub const all_features = blk: { .description = "Has v7 clrex instruction", .dependencies = featureSet(&[_]Feature{}), }; - result[@enumToInt(Feature.v8)] = .{ - .llvm_name = "v8", - .description = "Support ARM v8 instructions", + result[@enumToInt(Feature.v8a)] = .{ + .llvm_name = "v8a", + .description = "Support ARM v8a instructions", .dependencies = featureSet(&[_]Feature{ .acquire_release, .v7, @@ -1212,7 +1093,7 @@ pub const all_features = blk: { .llvm_name = "v8.1a", .description = "Support ARM v8.1a instructions", .dependencies = featureSet(&[_]Feature{ - .v8, + .v8a, }), }; result[@enumToInt(Feature.v8_1m_main)] = .{ @@ -1415,49 +1296,49 @@ pub const all_features = blk: { }; pub const cpu = struct { - pub const arm1020e = Cpu{ + pub const arm1020e = CpuModel{ .name = "arm1020e", .llvm_name = "arm1020e", .features = featureSet(&[_]Feature{ .armv5te, }), }; - pub const arm1020t = Cpu{ + pub const arm1020t = CpuModel{ .name = "arm1020t", .llvm_name = "arm1020t", .features = featureSet(&[_]Feature{ .armv5t, }), }; - pub const arm1022e = Cpu{ + pub const arm1022e = CpuModel{ .name = "arm1022e", .llvm_name = "arm1022e", .features = featureSet(&[_]Feature{ .armv5te, }), }; - pub const arm10e = Cpu{ + pub const arm10e = CpuModel{ .name = "arm10e", .llvm_name = "arm10e", .features = featureSet(&[_]Feature{ .armv5te, }), }; - pub const arm10tdmi = Cpu{ + pub const arm10tdmi = CpuModel{ .name = "arm10tdmi", .llvm_name = "arm10tdmi", .features = featureSet(&[_]Feature{ .armv5t, }), }; - pub const arm1136j_s = Cpu{ + pub const arm1136j_s = CpuModel{ .name = "arm1136j_s", .llvm_name = "arm1136j-s", .features = featureSet(&[_]Feature{ .armv6, }), }; - pub const arm1136jf_s = Cpu{ + pub const arm1136jf_s = CpuModel{ .name = "arm1136jf_s", .llvm_name = "arm1136jf-s", .features = featureSet(&[_]Feature{ @@ -1466,14 +1347,14 @@ pub const cpu = struct { .vfp2, }), }; - pub const arm1156t2_s = Cpu{ + pub const arm1156t2_s = CpuModel{ .name = "arm1156t2_s", .llvm_name = "arm1156t2-s", .features = featureSet(&[_]Feature{ .armv6t2, }), }; - pub const arm1156t2f_s = Cpu{ + pub const arm1156t2f_s = CpuModel{ .name = "arm1156t2f_s", .llvm_name = "arm1156t2f-s", .features = featureSet(&[_]Feature{ @@ -1482,21 +1363,21 @@ pub const cpu = struct { .vfp2, }), }; - pub const arm1176j_s = Cpu{ + pub const arm1176j_s = CpuModel{ .name = "arm1176j_s", .llvm_name = "arm1176j-s", .features = featureSet(&[_]Feature{ .armv6kz, }), }; - pub const arm1176jz_s = Cpu{ + pub const arm1176jz_s = CpuModel{ .name = "arm1176jz_s", .llvm_name = "arm1176jz-s", .features = featureSet(&[_]Feature{ .armv6kz, }), }; - pub const arm1176jzf_s = Cpu{ + pub const arm1176jzf_s = CpuModel{ .name = "arm1176jzf_s", .llvm_name = "arm1176jzf-s", .features = featureSet(&[_]Feature{ @@ -1505,126 +1386,133 @@ pub const cpu = struct { .vfp2, }), }; - pub const arm710t = Cpu{ + pub const arm710t = CpuModel{ .name = "arm710t", .llvm_name = "arm710t", .features = featureSet(&[_]Feature{ .armv4t, }), }; - pub const arm720t = Cpu{ + pub const arm720t = CpuModel{ .name = "arm720t", .llvm_name = "arm720t", .features = featureSet(&[_]Feature{ .armv4t, }), }; - pub const arm7tdmi = Cpu{ + pub const arm7tdmi = CpuModel{ .name = "arm7tdmi", .llvm_name = "arm7tdmi", .features = featureSet(&[_]Feature{ .armv4t, }), }; - pub const arm7tdmi_s = Cpu{ + pub const arm7tdmi_s = CpuModel{ .name = "arm7tdmi_s", .llvm_name = "arm7tdmi-s", .features = featureSet(&[_]Feature{ .armv4t, }), }; - pub const arm8 = Cpu{ + pub const arm8 = CpuModel{ .name = "arm8", .llvm_name = "arm8", .features = featureSet(&[_]Feature{ .armv4, }), }; - pub const arm810 = Cpu{ + pub const arm810 = CpuModel{ .name = "arm810", .llvm_name = "arm810", .features = featureSet(&[_]Feature{ .armv4, }), }; - pub const arm9 = Cpu{ + pub const arm9 = CpuModel{ .name = "arm9", .llvm_name = "arm9", .features = featureSet(&[_]Feature{ .armv4t, }), }; - pub const arm920 = Cpu{ + pub const arm920 = CpuModel{ .name = "arm920", .llvm_name = "arm920", .features = featureSet(&[_]Feature{ .armv4t, }), }; - pub const arm920t = Cpu{ + pub const arm920t = CpuModel{ .name = "arm920t", .llvm_name = "arm920t", .features = featureSet(&[_]Feature{ .armv4t, }), }; - pub const arm922t = Cpu{ + pub const arm922t = CpuModel{ .name = "arm922t", .llvm_name = "arm922t", .features = featureSet(&[_]Feature{ .armv4t, }), }; - pub const arm926ej_s = Cpu{ + pub const arm926ej_s = CpuModel{ .name = "arm926ej_s", .llvm_name = "arm926ej-s", .features = featureSet(&[_]Feature{ .armv5te, }), }; - pub const arm940t = Cpu{ + pub const arm940t = CpuModel{ .name = "arm940t", .llvm_name = "arm940t", .features = featureSet(&[_]Feature{ .armv4t, }), }; - pub const arm946e_s = Cpu{ + pub const arm946e_s = CpuModel{ .name = "arm946e_s", .llvm_name = "arm946e-s", .features = featureSet(&[_]Feature{ .armv5te, }), }; - pub const arm966e_s = Cpu{ + pub const arm966e_s = CpuModel{ .name = "arm966e_s", .llvm_name = "arm966e-s", .features = featureSet(&[_]Feature{ .armv5te, }), }; - pub const arm968e_s = Cpu{ + pub const arm968e_s = CpuModel{ .name = "arm968e_s", .llvm_name = "arm968e-s", .features = featureSet(&[_]Feature{ .armv5te, }), }; - pub const arm9e = Cpu{ + pub const arm9e = CpuModel{ .name = "arm9e", .llvm_name = "arm9e", .features = featureSet(&[_]Feature{ .armv5te, }), }; - pub const arm9tdmi = Cpu{ + pub const arm9tdmi = CpuModel{ .name = "arm9tdmi", .llvm_name = "arm9tdmi", .features = featureSet(&[_]Feature{ .armv4t, }), }; - pub const cortex_a12 = Cpu{ + pub const baseline = CpuModel{ + .name = "baseline", + .llvm_name = "generic", + .features = featureSet(&[_]Feature{ + .armv6_m, + }), + }; + pub const cortex_a12 = CpuModel{ .name = "cortex_a12", .llvm_name = "cortex-a12", .features = featureSet(&[_]Feature{ @@ -1639,11 +1527,10 @@ pub const cpu = struct { .vmlx_forwarding, }), }; - pub const cortex_a15 = Cpu{ + pub const cortex_a15 = CpuModel{ .name = "cortex_a15", .llvm_name = "cortex-a15", .features = featureSet(&[_]Feature{ - .a15, .armv7_a, .avoid_partial_cpsr, .dont_widen_vmovs, @@ -1657,11 +1544,10 @@ pub const cpu = struct { .vldn_align, }), }; - pub const cortex_a17 = Cpu{ + pub const cortex_a17 = CpuModel{ .name = "cortex_a17", .llvm_name = "cortex-a17", .features = featureSet(&[_]Feature{ - .a17, .armv7_a, .avoid_partial_cpsr, .mp, @@ -1672,7 +1558,7 @@ pub const cpu = struct { .vmlx_forwarding, }), }; - pub const cortex_a32 = Cpu{ + pub const cortex_a32 = CpuModel{ .name = "cortex_a32", .llvm_name = "cortex-a32", .features = featureSet(&[_]Feature{ @@ -1683,11 +1569,10 @@ pub const cpu = struct { .hwdiv_arm, }), }; - pub const cortex_a35 = Cpu{ + pub const cortex_a35 = CpuModel{ .name = "cortex_a35", .llvm_name = "cortex-a35", .features = featureSet(&[_]Feature{ - .a35, .armv8_a, .crc, .crypto, @@ -1695,11 +1580,10 @@ pub const cpu = struct { .hwdiv_arm, }), }; - pub const cortex_a5 = Cpu{ + pub const cortex_a5 = CpuModel{ .name = "cortex_a5", .llvm_name = "cortex-a5", .features = featureSet(&[_]Feature{ - .a5, .armv7_a, .mp, .ret_addr_stack, @@ -1710,11 +1594,10 @@ pub const cpu = struct { .vmlx_forwarding, }), }; - pub const cortex_a53 = Cpu{ + pub const cortex_a53 = CpuModel{ .name = "cortex_a53", .llvm_name = "cortex-a53", .features = featureSet(&[_]Feature{ - .a53, .armv8_a, .crc, .crypto, @@ -1723,22 +1606,20 @@ pub const cpu = struct { .hwdiv_arm, }), }; - pub const cortex_a55 = Cpu{ + pub const cortex_a55 = CpuModel{ .name = "cortex_a55", .llvm_name = "cortex-a55", .features = featureSet(&[_]Feature{ - .a55, .armv8_2_a, .dotprod, .hwdiv, .hwdiv_arm, }), }; - pub const cortex_a57 = Cpu{ + pub const cortex_a57 = CpuModel{ .name = "cortex_a57", .llvm_name = "cortex-a57", .features = featureSet(&[_]Feature{ - .a57, .armv8_a, .avoid_partial_cpsr, .cheap_predicable_cpsr, @@ -1749,11 +1630,10 @@ pub const cpu = struct { .hwdiv_arm, }), }; - pub const cortex_a7 = Cpu{ + pub const cortex_a7 = CpuModel{ .name = "cortex_a7", .llvm_name = "cortex-a7", .features = featureSet(&[_]Feature{ - .a7, .armv7_a, .mp, .ret_addr_stack, @@ -1766,11 +1646,10 @@ pub const cpu = struct { .vmlx_hazards, }), }; - pub const cortex_a72 = Cpu{ + pub const cortex_a72 = CpuModel{ .name = "cortex_a72", .llvm_name = "cortex-a72", .features = featureSet(&[_]Feature{ - .a72, .armv8_a, .crc, .crypto, @@ -1778,11 +1657,10 @@ pub const cpu = struct { .hwdiv_arm, }), }; - pub const cortex_a73 = Cpu{ + pub const cortex_a73 = CpuModel{ .name = "cortex_a73", .llvm_name = "cortex-a73", .features = featureSet(&[_]Feature{ - .a73, .armv8_a, .crc, .crypto, @@ -1790,18 +1668,17 @@ pub const cpu = struct { .hwdiv_arm, }), }; - pub const cortex_a75 = Cpu{ + pub const cortex_a75 = CpuModel{ .name = "cortex_a75", .llvm_name = "cortex-a75", .features = featureSet(&[_]Feature{ - .a75, .armv8_2_a, .dotprod, .hwdiv, .hwdiv_arm, }), }; - pub const cortex_a76 = Cpu{ + pub const cortex_a76 = CpuModel{ .name = "cortex_a76", .llvm_name = "cortex-a76", .features = featureSet(&[_]Feature{ @@ -1815,7 +1692,7 @@ pub const cpu = struct { .hwdiv_arm, }), }; - pub const cortex_a76ae = Cpu{ + pub const cortex_a76ae = CpuModel{ .name = "cortex_a76ae", .llvm_name = "cortex-a76ae", .features = featureSet(&[_]Feature{ @@ -1829,11 +1706,10 @@ pub const cpu = struct { .hwdiv_arm, }), }; - pub const cortex_a8 = Cpu{ + pub const cortex_a8 = CpuModel{ .name = "cortex_a8", .llvm_name = "cortex-a8", .features = featureSet(&[_]Feature{ - .a8, .armv7_a, .nonpipelined_vfp, .ret_addr_stack, @@ -1844,11 +1720,10 @@ pub const cpu = struct { .vmlx_hazards, }), }; - pub const cortex_a9 = Cpu{ + pub const cortex_a9 = CpuModel{ .name = "cortex_a9", .llvm_name = "cortex-a9", .features = featureSet(&[_]Feature{ - .a9, .armv7_a, .avoid_partial_cpsr, .expand_fp_mlx, @@ -1864,28 +1739,28 @@ pub const cpu = struct { .vmlx_hazards, }), }; - pub const cortex_m0 = Cpu{ + pub const cortex_m0 = CpuModel{ .name = "cortex_m0", .llvm_name = "cortex-m0", .features = featureSet(&[_]Feature{ .armv6_m, }), }; - pub const cortex_m0plus = Cpu{ + pub const cortex_m0plus = CpuModel{ .name = "cortex_m0plus", .llvm_name = "cortex-m0plus", .features = featureSet(&[_]Feature{ .armv6_m, }), }; - pub const cortex_m1 = Cpu{ + pub const cortex_m1 = CpuModel{ .name = "cortex_m1", .llvm_name = "cortex-m1", .features = featureSet(&[_]Feature{ .armv6_m, }), }; - pub const cortex_m23 = Cpu{ + pub const cortex_m23 = CpuModel{ .name = "cortex_m23", .llvm_name = "cortex-m23", .features = featureSet(&[_]Feature{ @@ -1893,7 +1768,7 @@ pub const cpu = struct { .no_movt, }), }; - pub const cortex_m3 = Cpu{ + pub const cortex_m3 = CpuModel{ .name = "cortex_m3", .llvm_name = "cortex-m3", .features = featureSet(&[_]Feature{ @@ -1905,7 +1780,7 @@ pub const cpu = struct { .use_misched, }), }; - pub const cortex_m33 = Cpu{ + pub const cortex_m33 = CpuModel{ .name = "cortex_m33", .llvm_name = "cortex-m33", .features = featureSet(&[_]Feature{ @@ -1919,7 +1794,7 @@ pub const cpu = struct { .use_misched, }), }; - pub const cortex_m35p = Cpu{ + pub const cortex_m35p = CpuModel{ .name = "cortex_m35p", .llvm_name = "cortex-m35p", .features = featureSet(&[_]Feature{ @@ -1933,7 +1808,7 @@ pub const cpu = struct { .use_misched, }), }; - pub const cortex_m4 = Cpu{ + pub const cortex_m4 = CpuModel{ .name = "cortex_m4", .llvm_name = "cortex-m4", .features = featureSet(&[_]Feature{ @@ -1946,7 +1821,7 @@ pub const cpu = struct { .vfp4d16sp, }), }; - pub const cortex_m7 = Cpu{ + pub const cortex_m7 = CpuModel{ .name = "cortex_m7", .llvm_name = "cortex-m7", .features = featureSet(&[_]Feature{ @@ -1954,7 +1829,7 @@ pub const cpu = struct { .fp_armv8d16, }), }; - pub const cortex_r4 = Cpu{ + pub const cortex_r4 = CpuModel{ .name = "cortex_r4", .llvm_name = "cortex-r4", .features = featureSet(&[_]Feature{ @@ -1964,7 +1839,7 @@ pub const cpu = struct { .ret_addr_stack, }), }; - pub const cortex_r4f = Cpu{ + pub const cortex_r4f = CpuModel{ .name = "cortex_r4f", .llvm_name = "cortex-r4f", .features = featureSet(&[_]Feature{ @@ -1977,32 +1852,30 @@ pub const cpu = struct { .vfp3d16, }), }; - pub const cortex_r5 = Cpu{ + pub const cortex_r5 = CpuModel{ .name = "cortex_r5", .llvm_name = "cortex-r5", .features = featureSet(&[_]Feature{ .armv7_r, .avoid_partial_cpsr, .hwdiv_arm, - .r5, .ret_addr_stack, .slow_fp_brcc, .slowfpvmlx, .vfp3d16, }), }; - pub const cortex_r52 = Cpu{ + pub const cortex_r52 = CpuModel{ .name = "cortex_r52", .llvm_name = "cortex-r52", .features = featureSet(&[_]Feature{ .armv8_r, .fpao, - .r52, .use_aa, .use_misched, }), }; - pub const cortex_r7 = Cpu{ + pub const cortex_r7 = CpuModel{ .name = "cortex_r7", .llvm_name = "cortex-r7", .features = featureSet(&[_]Feature{ @@ -2011,14 +1884,13 @@ pub const cpu = struct { .fp16, .hwdiv_arm, .mp, - .r7, .ret_addr_stack, .slow_fp_brcc, .slowfpvmlx, .vfp3d16, }), }; - pub const cortex_r8 = Cpu{ + pub const cortex_r8 = CpuModel{ .name = "cortex_r8", .llvm_name = "cortex-r8", .features = featureSet(&[_]Feature{ @@ -2033,7 +1905,7 @@ pub const cpu = struct { .vfp3d16, }), }; - pub const cyclone = Cpu{ + pub const cyclone = CpuModel{ .name = "cyclone", .llvm_name = "cyclone", .features = featureSet(&[_]Feature{ @@ -2054,14 +1926,14 @@ pub const cpu = struct { .zcz, }), }; - pub const ep9312 = Cpu{ + pub const ep9312 = CpuModel{ .name = "ep9312", .llvm_name = "ep9312", .features = featureSet(&[_]Feature{ .armv4t, }), }; - pub const exynos_m1 = Cpu{ + pub const exynos_m1 = CpuModel{ .name = "exynos_m1", .llvm_name = "exynos-m1", .features = featureSet(&[_]Feature{ @@ -2069,7 +1941,7 @@ pub const cpu = struct { .exynos, }), }; - pub const exynos_m2 = Cpu{ + pub const exynos_m2 = CpuModel{ .name = "exynos_m2", .llvm_name = "exynos-m2", .features = featureSet(&[_]Feature{ @@ -2077,7 +1949,7 @@ pub const cpu = struct { .exynos, }), }; - pub const exynos_m3 = Cpu{ + pub const exynos_m3 = CpuModel{ .name = "exynos_m3", .llvm_name = "exynos-m3", .features = featureSet(&[_]Feature{ @@ -2085,7 +1957,7 @@ pub const cpu = struct { .exynos, }), }; - pub const exynos_m4 = Cpu{ + pub const exynos_m4 = CpuModel{ .name = "exynos_m4", .llvm_name = "exynos-m4", .features = featureSet(&[_]Feature{ @@ -2095,7 +1967,7 @@ pub const cpu = struct { .fullfp16, }), }; - pub const exynos_m5 = Cpu{ + pub const exynos_m5 = CpuModel{ .name = "exynos_m5", .llvm_name = "exynos-m5", .features = featureSet(&[_]Feature{ @@ -2105,19 +1977,19 @@ pub const cpu = struct { .fullfp16, }), }; - pub const generic = Cpu{ + pub const generic = CpuModel{ .name = "generic", .llvm_name = "generic", .features = featureSet(&[_]Feature{}), }; - pub const iwmmxt = Cpu{ + pub const iwmmxt = CpuModel{ .name = "iwmmxt", .llvm_name = "iwmmxt", .features = featureSet(&[_]Feature{ .armv5te, }), }; - pub const krait = Cpu{ + pub const krait = CpuModel{ .name = "krait", .llvm_name = "krait", .features = featureSet(&[_]Feature{ @@ -2126,7 +1998,6 @@ pub const cpu = struct { .fp16, .hwdiv, .hwdiv_arm, - .krait, .muxed_units, .ret_addr_stack, .vfp4, @@ -2134,7 +2005,7 @@ pub const cpu = struct { .vmlx_forwarding, }), }; - pub const kryo = Cpu{ + pub const kryo = CpuModel{ .name = "kryo", .llvm_name = "kryo", .features = featureSet(&[_]Feature{ @@ -2146,7 +2017,7 @@ pub const cpu = struct { .kryo, }), }; - pub const mpcore = Cpu{ + pub const mpcore = CpuModel{ .name = "mpcore", .llvm_name = "mpcore", .features = featureSet(&[_]Feature{ @@ -2155,21 +2026,21 @@ pub const cpu = struct { .vfp2, }), }; - pub const mpcorenovfp = Cpu{ + pub const mpcorenovfp = CpuModel{ .name = "mpcorenovfp", .llvm_name = "mpcorenovfp", .features = featureSet(&[_]Feature{ .armv6k, }), }; - pub const sc000 = Cpu{ + pub const sc000 = CpuModel{ .name = "sc000", .llvm_name = "sc000", .features = featureSet(&[_]Feature{ .armv6_m, }), }; - pub const sc300 = Cpu{ + pub const sc300 = CpuModel{ .name = "sc300", .llvm_name = "sc300", .features = featureSet(&[_]Feature{ @@ -2180,35 +2051,35 @@ pub const cpu = struct { .use_misched, }), }; - pub const strongarm = Cpu{ + pub const strongarm = CpuModel{ .name = "strongarm", .llvm_name = "strongarm", .features = featureSet(&[_]Feature{ .armv4, }), }; - pub const strongarm110 = Cpu{ + pub const strongarm110 = CpuModel{ .name = "strongarm110", .llvm_name = "strongarm110", .features = featureSet(&[_]Feature{ .armv4, }), }; - pub const strongarm1100 = Cpu{ + pub const strongarm1100 = CpuModel{ .name = "strongarm1100", .llvm_name = "strongarm1100", .features = featureSet(&[_]Feature{ .armv4, }), }; - pub const strongarm1110 = Cpu{ + pub const strongarm1110 = CpuModel{ .name = "strongarm1110", .llvm_name = "strongarm1110", .features = featureSet(&[_]Feature{ .armv4, }), }; - pub const swift = Cpu{ + pub const swift = CpuModel{ .name = "swift", .llvm_name = "swift", .features = featureSet(&[_]Feature{ @@ -2235,7 +2106,7 @@ pub const cpu = struct { .wide_stride_vfp, }), }; - pub const xscale = Cpu{ + pub const xscale = CpuModel{ .name = "xscale", .llvm_name = "xscale", .features = featureSet(&[_]Feature{ @@ -2247,7 +2118,7 @@ pub const cpu = struct { /// All arm CPUs, sorted alphabetically by name. /// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1 /// compiler has inefficient memory and CPU usage, affecting build times. -pub const all_cpus = &[_]*const Cpu{ +pub const all_cpus = &[_]*const CpuModel{ &cpu.arm1020e, &cpu.arm1020t, &cpu.arm1022e, From 96f45c27b65307fe4abd5d1fb1cf314b1f493d8e Mon Sep 17 00:00:00 2001 From: Andrew Kelley Date: Wed, 19 Feb 2020 19:11:20 -0500 Subject: [PATCH 02/18] arm: clean up the messy sub-architecture & CPU features --- lib/std/target/arm.zig | 754 +++++++++++++++-------------------------- 1 file changed, 282 insertions(+), 472 deletions(-) diff --git a/lib/std/target/arm.zig b/lib/std/target/arm.zig index 16695b0006..48e9576004 100644 --- a/lib/std/target/arm.zig +++ b/lib/std/target/arm.zig @@ -9,39 +9,6 @@ pub const Feature = enum { aclass, acquire_release, aes, - armv2, - armv2a, - armv3, - armv3m, - armv4, - armv4t, - armv5t, - armv5te, - armv5tej, - armv6, - armv6_m, - armv6j, - armv6k, - armv6kz, - armv6s_m, - armv6t2, - armv7_a, - armv7_m, - armv7_r, - armv7e_m, - armv7k, - armv7s, - armv7ve, - armv8_a, - armv8_m_base, - armv8_m_main, - armv8_r, - armv8_1_a, - armv8_1_m_main, - armv8_2_a, - armv8_3_a, - armv8_4_a, - armv8_5_a, avoid_movs_shop, avoid_partial_cpsr, cheap_predicable_cpsr, @@ -57,13 +24,13 @@ pub const Feature = enum { execute_only, expand_fp_mlx, exynos, + fp16, + fp16fml, + fp64, fp_armv8, fp_armv8d16, fp_armv8d16sp, fp_armv8sp, - fp16, - fp16fml, - fp64, fpao, fpregs, fpregs16, @@ -115,29 +82,46 @@ pub const Feature = enum { splat_vfp_neon, strict_align, swift, - thumb_mode, thumb2, + thumb_mode, trustzone, use_aa, use_misched, + v2, + v2a, + v3, + v3m, + v4, v4t, v5t, v5te, + v5tej, v6, + v6j, v6k, + v6kz, v6m, + v6sm, v6t2, v7, + v7a, + v7m, + v7r, v7clrex, + v7em, + v7k, + v7s, + v7ve, v8a, + v8m, + v8m_main, + v8r, v8_1a, v8_1m_main, v8_2a, v8_3a, v8_4a, v8_5a, - v8m, - v8m_main, vfp2, vfp2d16, vfp2d16sp, @@ -198,368 +182,6 @@ pub const all_features = blk: { .neon, }), }; - result[@enumToInt(Feature.armv2)] = .{ - .llvm_name = "armv2", - .description = "ARMv2 architecture", - .dependencies = featureSet(&[_]Feature{}), - }; - result[@enumToInt(Feature.armv2a)] = .{ - .llvm_name = "armv2a", - .description = "ARMv2a architecture", - .dependencies = featureSet(&[_]Feature{}), - }; - result[@enumToInt(Feature.armv3)] = .{ - .llvm_name = "armv3", - .description = "ARMv3 architecture", - .dependencies = featureSet(&[_]Feature{}), - }; - result[@enumToInt(Feature.armv3m)] = .{ - .llvm_name = "armv3m", - .description = "ARMv3m architecture", - .dependencies = featureSet(&[_]Feature{}), - }; - result[@enumToInt(Feature.armv4)] = .{ - .llvm_name = "armv4", - .description = "ARMv4 architecture", - .dependencies = featureSet(&[_]Feature{}), - }; - result[@enumToInt(Feature.armv4t)] = .{ - .llvm_name = "armv4t", - .description = "ARMv4t architecture", - .dependencies = featureSet(&[_]Feature{ - .v4t, - }), - }; - result[@enumToInt(Feature.armv5t)] = .{ - .llvm_name = "armv5t", - .description = "ARMv5t architecture", - .dependencies = featureSet(&[_]Feature{ - .v5t, - }), - }; - result[@enumToInt(Feature.armv5te)] = .{ - .llvm_name = "armv5te", - .description = "ARMv5te architecture", - .dependencies = featureSet(&[_]Feature{ - .v5te, - }), - }; - result[@enumToInt(Feature.armv5tej)] = .{ - .llvm_name = "armv5tej", - .description = "ARMv5tej architecture", - .dependencies = featureSet(&[_]Feature{ - .v5te, - }), - }; - result[@enumToInt(Feature.armv6)] = .{ - .llvm_name = "armv6", - .description = "ARMv6 architecture", - .dependencies = featureSet(&[_]Feature{ - .dsp, - .v6, - }), - }; - result[@enumToInt(Feature.armv6_m)] = .{ - .llvm_name = "armv6-m", - .description = "ARMv6m architecture", - .dependencies = featureSet(&[_]Feature{ - .db, - .mclass, - .noarm, - .strict_align, - .thumb_mode, - .v6m, - }), - }; - result[@enumToInt(Feature.armv6j)] = .{ - .llvm_name = "armv6j", - .description = "ARMv7a architecture", - .dependencies = featureSet(&[_]Feature{ - .armv6, - }), - }; - result[@enumToInt(Feature.armv6k)] = .{ - .llvm_name = "armv6k", - .description = "ARMv6k architecture", - .dependencies = featureSet(&[_]Feature{ - .v6k, - }), - }; - result[@enumToInt(Feature.armv6kz)] = .{ - .llvm_name = "armv6kz", - .description = "ARMv6kz architecture", - .dependencies = featureSet(&[_]Feature{ - .trustzone, - .v6k, - }), - }; - result[@enumToInt(Feature.armv6s_m)] = .{ - .llvm_name = "armv6s-m", - .description = "ARMv6sm architecture", - .dependencies = featureSet(&[_]Feature{ - .db, - .mclass, - .noarm, - .strict_align, - .thumb_mode, - .v6m, - }), - }; - result[@enumToInt(Feature.armv6t2)] = .{ - .llvm_name = "armv6t2", - .description = "ARMv6t2 architecture", - .dependencies = featureSet(&[_]Feature{ - .dsp, - .v6t2, - }), - }; - result[@enumToInt(Feature.armv7_a)] = .{ - .llvm_name = "armv7-a", - .description = "ARMv7a architecture", - .dependencies = featureSet(&[_]Feature{ - .aclass, - .db, - .dsp, - .neon, - .v7, - }), - }; - result[@enumToInt(Feature.armv7_m)] = .{ - .llvm_name = "armv7-m", - .description = "ARMv7m architecture", - .dependencies = featureSet(&[_]Feature{ - .db, - .hwdiv, - .mclass, - .noarm, - .thumb_mode, - .thumb2, - .v7, - }), - }; - result[@enumToInt(Feature.armv7_r)] = .{ - .llvm_name = "armv7-r", - .description = "ARMv7r architecture", - .dependencies = featureSet(&[_]Feature{ - .db, - .dsp, - .hwdiv, - .rclass, - .v7, - }), - }; - result[@enumToInt(Feature.armv7e_m)] = .{ - .llvm_name = "armv7e-m", - .description = "ARMv7em architecture", - .dependencies = featureSet(&[_]Feature{ - .db, - .dsp, - .hwdiv, - .mclass, - .noarm, - .thumb_mode, - .thumb2, - .v7, - }), - }; - result[@enumToInt(Feature.armv7k)] = .{ - .llvm_name = "armv7k", - .description = "ARMv7a architecture", - .dependencies = featureSet(&[_]Feature{ - .armv7_a, - }), - }; - result[@enumToInt(Feature.armv7s)] = .{ - .llvm_name = "armv7s", - .description = "ARMv7a architecture", - .dependencies = featureSet(&[_]Feature{ - .armv7_a, - }), - }; - result[@enumToInt(Feature.armv7ve)] = .{ - .llvm_name = "armv7ve", - .description = "ARMv7ve architecture", - .dependencies = featureSet(&[_]Feature{ - .aclass, - .db, - .dsp, - .mp, - .neon, - .trustzone, - .v7, - .virtualization, - }), - }; - result[@enumToInt(Feature.armv8_a)] = .{ - .llvm_name = "armv8-a", - .description = "ARMv8a architecture", - .dependencies = featureSet(&[_]Feature{ - .aclass, - .crc, - .crypto, - .db, - .dsp, - .fp_armv8, - .mp, - .neon, - .trustzone, - .v8a, - .virtualization, - }), - }; - result[@enumToInt(Feature.armv8_m_base)] = .{ - .llvm_name = "armv8-m.base", - .description = "ARMv8mBaseline architecture", - .dependencies = featureSet(&[_]Feature{ - .@"8msecext", - .acquire_release, - .db, - .hwdiv, - .mclass, - .noarm, - .strict_align, - .thumb_mode, - .v7clrex, - .v8m, - }), - }; - result[@enumToInt(Feature.armv8_m_main)] = .{ - .llvm_name = "armv8-m.main", - .description = "ARMv8mMainline architecture", - .dependencies = featureSet(&[_]Feature{ - .@"8msecext", - .acquire_release, - .db, - .hwdiv, - .mclass, - .noarm, - .thumb_mode, - .v8m_main, - }), - }; - result[@enumToInt(Feature.armv8_r)] = .{ - .llvm_name = "armv8-r", - .description = "ARMv8r architecture", - .dependencies = featureSet(&[_]Feature{ - .crc, - .db, - .dfb, - .dsp, - .fp_armv8, - .mp, - .neon, - .rclass, - .v8a, - .virtualization, - }), - }; - result[@enumToInt(Feature.armv8_1_a)] = .{ - .llvm_name = "armv8.1-a", - .description = "ARMv81a architecture", - .dependencies = featureSet(&[_]Feature{ - .aclass, - .crc, - .crypto, - .db, - .dsp, - .fp_armv8, - .mp, - .neon, - .trustzone, - .v8_1a, - .virtualization, - }), - }; - result[@enumToInt(Feature.armv8_1_m_main)] = .{ - .llvm_name = "armv8.1-m.main", - .description = "ARMv81mMainline architecture", - .dependencies = featureSet(&[_]Feature{ - .@"8msecext", - .acquire_release, - .db, - .hwdiv, - .lob, - .mclass, - .noarm, - .ras, - .thumb_mode, - .v8_1m_main, - }), - }; - result[@enumToInt(Feature.armv8_2_a)] = .{ - .llvm_name = "armv8.2-a", - .description = "ARMv82a architecture", - .dependencies = featureSet(&[_]Feature{ - .aclass, - .crc, - .crypto, - .db, - .dsp, - .fp_armv8, - .mp, - .neon, - .ras, - .trustzone, - .v8_2a, - .virtualization, - }), - }; - result[@enumToInt(Feature.armv8_3_a)] = .{ - .llvm_name = "armv8.3-a", - .description = "ARMv83a architecture", - .dependencies = featureSet(&[_]Feature{ - .aclass, - .crc, - .crypto, - .db, - .dsp, - .fp_armv8, - .mp, - .neon, - .ras, - .trustzone, - .v8_3a, - .virtualization, - }), - }; - result[@enumToInt(Feature.armv8_4_a)] = .{ - .llvm_name = "armv8.4-a", - .description = "ARMv84a architecture", - .dependencies = featureSet(&[_]Feature{ - .aclass, - .crc, - .crypto, - .db, - .dotprod, - .dsp, - .fp_armv8, - .mp, - .neon, - .ras, - .trustzone, - .v8_4a, - .virtualization, - }), - }; - result[@enumToInt(Feature.armv8_5_a)] = .{ - .llvm_name = "armv8.5-a", - .description = "ARMv85a architecture", - .dependencies = featureSet(&[_]Feature{ - .aclass, - .crc, - .crypto, - .db, - .dotprod, - .dsp, - .fp_armv8, - .mp, - .neon, - .ras, - .trustzone, - .v8_5a, - .virtualization, - }), - }; result[@enumToInt(Feature.avoid_movs_shop)] = .{ .llvm_name = "avoid-movs-shop", .description = "Avoid movs instructions with shifter operand", @@ -659,6 +281,25 @@ pub const all_features = blk: { .zcz, }), }; + result[@enumToInt(Feature.fp16)] = .{ + .llvm_name = "fp16", + .description = "Enable half-precision floating point", + .dependencies = featureSet(&[_]Feature{}), + }; + result[@enumToInt(Feature.fp16fml)] = .{ + .llvm_name = "fp16fml", + .description = "Enable full half-precision floating point fml instructions", + .dependencies = featureSet(&[_]Feature{ + .fullfp16, + }), + }; + result[@enumToInt(Feature.fp64)] = .{ + .llvm_name = "fp64", + .description = "Floating point unit supports double precision", + .dependencies = featureSet(&[_]Feature{ + .fpregs64, + }), + }; result[@enumToInt(Feature.fp_armv8)] = .{ .llvm_name = "fp-armv8", .description = "Enable ARMv8 FP", @@ -693,25 +334,6 @@ pub const all_features = blk: { .vfp4sp, }), }; - result[@enumToInt(Feature.fp16)] = .{ - .llvm_name = "fp16", - .description = "Enable half-precision floating point", - .dependencies = featureSet(&[_]Feature{}), - }; - result[@enumToInt(Feature.fp16fml)] = .{ - .llvm_name = "fp16fml", - .description = "Enable full half-precision floating point fml instructions", - .dependencies = featureSet(&[_]Feature{ - .fullfp16, - }), - }; - result[@enumToInt(Feature.fp64)] = .{ - .llvm_name = "fp64", - .description = "Floating point unit supports double precision", - .dependencies = featureSet(&[_]Feature{ - .fpregs64, - }), - }; result[@enumToInt(Feature.fpao)] = .{ .llvm_name = "fpao", .description = "Enable fast computation of positive address offsets", @@ -993,16 +615,16 @@ pub const all_features = blk: { .description = "Swift ARM processors", .dependencies = featureSet(&[_]Feature{}), }; - result[@enumToInt(Feature.thumb_mode)] = .{ - .llvm_name = "thumb-mode", - .description = "Thumb mode", - .dependencies = featureSet(&[_]Feature{}), - }; result[@enumToInt(Feature.thumb2)] = .{ .llvm_name = "thumb2", .description = "Enable Thumb2 instructions", .dependencies = featureSet(&[_]Feature{}), }; + result[@enumToInt(Feature.thumb_mode)] = .{ + .llvm_name = "thumb-mode", + .description = "Thumb mode", + .dependencies = featureSet(&[_]Feature{}), + }; result[@enumToInt(Feature.trustzone)] = .{ .llvm_name = "trustzone", .description = "Enable support for TrustZone security extensions", @@ -1018,50 +640,116 @@ pub const all_features = blk: { .description = "Use the MachineScheduler", .dependencies = featureSet(&[_]Feature{}), }; + result[@enumToInt(Feature.v2)] = .{ + .llvm_name = "armv2", + .description = "ARMv2 architecture", + .dependencies = featureSet(&[_]Feature{}), + }; + result[@enumToInt(Feature.v2a)] = .{ + .llvm_name = "armv2a", + .description = "ARMv2a architecture", + .dependencies = featureSet(&[_]Feature{}), + }; + result[@enumToInt(Feature.v3)] = .{ + .llvm_name = "armv3", + .description = "ARMv3 architecture", + .dependencies = featureSet(&[_]Feature{}), + }; + result[@enumToInt(Feature.v3m)] = .{ + .llvm_name = "armv3m", + .description = "ARMv3m architecture", + .dependencies = featureSet(&[_]Feature{}), + }; + result[@enumToInt(Feature.v4)] = .{ + .llvm_name = "armv4", + .description = "ARMv4 architecture", + .dependencies = featureSet(&[_]Feature{}), + }; result[@enumToInt(Feature.v4t)] = .{ - .llvm_name = "v4t", - .description = "Support ARM v4T instructions", + .llvm_name = "armv4t", + .description = "ARMv4t architecture", .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.v5t)] = .{ - .llvm_name = "v5t", - .description = "Support ARM v5T instructions", + .llvm_name = "armv5t", + .description = "ARMv5t architecture", .dependencies = featureSet(&[_]Feature{ .v4t, }), }; result[@enumToInt(Feature.v5te)] = .{ - .llvm_name = "v5te", - .description = "Support ARM v5TE, v5TEj, and v5TExp instructions", + .llvm_name = "armv5te", + .description = "ARMv5te architecture", .dependencies = featureSet(&[_]Feature{ .v5t, }), }; - result[@enumToInt(Feature.v6)] = .{ - .llvm_name = "v6", - .description = "Support ARM v6 instructions", + result[@enumToInt(Feature.v5tej)] = .{ + .llvm_name = "armv5tej", + .description = "ARMv5tej architecture", .dependencies = featureSet(&[_]Feature{ .v5te, }), }; - result[@enumToInt(Feature.v6k)] = .{ - .llvm_name = "v6k", - .description = "Support ARM v6k instructions", + result[@enumToInt(Feature.v6)] = .{ + .llvm_name = "armv6", + .description = "ARMv6 architecture", + .dependencies = featureSet(&[_]Feature{ + .dsp, + .v5te, + }), + }; + result[@enumToInt(Feature.v6j)] = .{ + .llvm_name = "armv6j", + .description = "ARMv7a architecture", .dependencies = featureSet(&[_]Feature{ .v6, }), }; - result[@enumToInt(Feature.v6m)] = .{ - .llvm_name = "v6m", - .description = "Support ARM v6M instructions", + result[@enumToInt(Feature.v6k)] = .{ + .llvm_name = "armv6k", + .description = "ARMv6k architecture", .dependencies = featureSet(&[_]Feature{ .v6, }), }; + result[@enumToInt(Feature.v6kz)] = .{ + .llvm_name = "armv6kz", + .description = "ARMv6kz architecture", + .dependencies = featureSet(&[_]Feature{ + .trustzone, + .v6k, + }), + }; + result[@enumToInt(Feature.v6m)] = .{ + .llvm_name = "armv6-m", + .description = "ARMv6m architecture", + .dependencies = featureSet(&[_]Feature{ + .db, + .mclass, + .noarm, + .strict_align, + .thumb_mode, + .v6, + }), + }; + result[@enumToInt(Feature.v6sm)] = .{ + .llvm_name = "armv6s-m", + .description = "ARMv6sm architecture", + .dependencies = featureSet(&[_]Feature{ + .db, + .mclass, + .noarm, + .strict_align, + .thumb_mode, + .v6, + }), + }; result[@enumToInt(Feature.v6t2)] = .{ - .llvm_name = "v6t2", - .description = "Support ARM v6t2 instructions", + .llvm_name = "armv6t2", + .description = "ARMv6t2 architecture", .dependencies = featureSet(&[_]Feature{ + .dsp, .thumb2, .v6k, .v8m, @@ -1076,77 +764,199 @@ pub const all_features = blk: { .v7clrex, }), }; + result[@enumToInt(Feature.v7a)] = .{ + .llvm_name = "armv7-a", + .description = "ARMv7a architecture", + .dependencies = featureSet(&[_]Feature{ + .aclass, + .db, + .dsp, + .neon, + .v7, + }), + }; + result[@enumToInt(Feature.v7m)] = .{ + .llvm_name = "armv7-m", + .description = "ARMv7m architecture", + .dependencies = featureSet(&[_]Feature{ + .db, + .hwdiv, + .mclass, + .noarm, + .thumb_mode, + .thumb2, + .v7, + }), + }; + result[@enumToInt(Feature.v7r)] = .{ + .llvm_name = "armv7-r", + .description = "ARMv7r architecture", + .dependencies = featureSet(&[_]Feature{ + .db, + .dsp, + .hwdiv, + .rclass, + .v7, + }), + }; result[@enumToInt(Feature.v7clrex)] = .{ .llvm_name = "v7clrex", .description = "Has v7 clrex instruction", .dependencies = featureSet(&[_]Feature{}), }; - result[@enumToInt(Feature.v8a)] = .{ - .llvm_name = "v8a", - .description = "Support ARM v8a instructions", + result[@enumToInt(Feature.v7em)] = .{ + .llvm_name = "armv7e-m", + .description = "ARMv7em architecture", .dependencies = featureSet(&[_]Feature{ - .acquire_release, + .db, + .dsp, + .hwdiv, + .mclass, + .noarm, + .thumb_mode, + .thumb2, .v7, }), }; + result[@enumToInt(Feature.v7k)] = .{ + .llvm_name = "armv7k", + .description = "ARMv7a architecture", + .dependencies = featureSet(&[_]Feature{ + .v7a, + }), + }; + result[@enumToInt(Feature.v7s)] = .{ + .llvm_name = "armv7s", + .description = "ARMv7a architecture", + .dependencies = featureSet(&[_]Feature{ + .v7a, + }), + }; + result[@enumToInt(Feature.v7ve)] = .{ + .llvm_name = "armv7ve", + .description = "ARMv7ve architecture", + .dependencies = featureSet(&[_]Feature{ + .aclass, + .db, + .dsp, + .mp, + .neon, + .trustzone, + .v7, + .virtualization, + }), + }; + result[@enumToInt(Feature.v8a)] = .{ + .llvm_name = "armv8-a", + .description = "ARMv8a architecture", + .dependencies = featureSet(&[_]Feature{ + .aclass, + .acquire_release, + .crc, + .crypto, + .db, + .fp_armv8, + .mp, + .neon, + .trustzone, + .v7, + .virtualization, + }), + }; + result[@enumToInt(Feature.v8m)] = .{ + .llvm_name = "armv8-m.base", + .description = "ARMv8mBaseline architecture", + .dependencies = featureSet(&[_]Feature{ + .@"8msecext", + .acquire_release, + .db, + .hwdiv, + .mclass, + .noarm, + .strict_align, + .thumb_mode, + .v6m, + .v7clrex, + }), + }; + result[@enumToInt(Feature.v8m_main)] = .{ + .llvm_name = "armv8-m.main", + .description = "ARMv8mMainline architecture", + .dependencies = featureSet(&[_]Feature{ + .@"8msecext", + .acquire_release, + .db, + .hwdiv, + .mclass, + .noarm, + .thumb_mode, + .v7, + }), + }; + result[@enumToInt(Feature.v8r)] = .{ + .llvm_name = "armv8-r", + .description = "ARMv8r architecture", + .dependencies = featureSet(&[_]Feature{ + .dfb, + .rclass, + .v8a, + }), + }; result[@enumToInt(Feature.v8_1a)] = .{ - .llvm_name = "v8.1a", - .description = "Support ARM v8.1a instructions", + .llvm_name = "armv8.1-a", + .description = "ARMv81a architecture", .dependencies = featureSet(&[_]Feature{ .v8a, }), }; result[@enumToInt(Feature.v8_1m_main)] = .{ - .llvm_name = "v8.1m.main", - .description = "Support ARM v8-1M Mainline instructions", + .llvm_name = "armv8.1-m.main", + .description = "ARMv81mMainline architecture", .dependencies = featureSet(&[_]Feature{ + .@"8msecext", + .acquire_release, + .db, + .hwdiv, + .lob, + .mclass, + .noarm, + .ras, + .thumb_mode, .v8m_main, }), }; result[@enumToInt(Feature.v8_2a)] = .{ - .llvm_name = "v8.2a", - .description = "Support ARM v8.2a instructions", + .llvm_name = "armv8.2-a", + .description = "ARMv82a architecture", .dependencies = featureSet(&[_]Feature{ + .ras, .v8_1a, }), }; result[@enumToInt(Feature.v8_3a)] = .{ - .llvm_name = "v8.3a", - .description = "Support ARM v8.3a instructions", + .llvm_name = "armv8.3-a", + .description = "ARMv83a architecture", .dependencies = featureSet(&[_]Feature{ .v8_2a, }), }; result[@enumToInt(Feature.v8_4a)] = .{ - .llvm_name = "v8.4a", - .description = "Support ARM v8.4a instructions", + .llvm_name = "armv8.4-a", + .description = "ARMv84a architecture", .dependencies = featureSet(&[_]Feature{ .dotprod, .v8_3a, }), }; result[@enumToInt(Feature.v8_5a)] = .{ - .llvm_name = "v8.5a", - .description = "Support ARM v8.5a instructions", + .llvm_name = "armv8.5-a", + .description = "ARMv85a architecture", .dependencies = featureSet(&[_]Feature{ + .dotprod, .sb, .v8_4a, }), }; - result[@enumToInt(Feature.v8m)] = .{ - .llvm_name = "v8m", - .description = "Support ARM v8M Baseline instructions", - .dependencies = featureSet(&[_]Feature{ - .v6m, - }), - }; - result[@enumToInt(Feature.v8m_main)] = .{ - .llvm_name = "v8m.main", - .description = "Support ARM v8M Mainline instructions", - .dependencies = featureSet(&[_]Feature{ - .v7, - }), - }; result[@enumToInt(Feature.vfp2)] = .{ .llvm_name = "vfp2", .description = "Enable VFP2 instructions", From 84f1893c18c4ef12dbe268ed6d11a11966a9d447 Mon Sep 17 00:00:00 2001 From: Andrew Kelley Date: Wed, 19 Feb 2020 21:30:36 -0500 Subject: [PATCH 03/18] remove the concept of "sub-architecture" in favor of CPU features. Also rearrange the `std.Target` data structure. * note: `@import("builtin")` was already deprecated in favor of `@import("std").builtin`. * `std.builtin.arch` is now deprecated in favor of `std.builtin.cpu.arch`. * `std.Target.CpuFeatures.Cpu` is now `std.Target.Cpu.Model`. * `std.Target.CpuFeatures` is now `std.Target.Cpu`. * `std.Target` no longer has an `arch` field. Instead it has a `cpu` field, which has `arch`, `model`, and `features`. * `std.Target` no longer has a `cpu_features` field. * `std.Target.Arch` is moved to `std.Target.Cpu.Arch` and it is an enum instead of a tagged union. * `std.Target.parseOs` is moved to `std.Target.Os.parse`. * `std.Target.parseAbi` is moved to `std.Target.Abi.parse`. * `std.Target.parseArchSub` is only for arch now and moved to `std.Target.Cpu.Arch.parse`. * `std.Target.parse` is improved to accept CPU name and features. * `std.Target.Arch.getBaselineCpuFeatures` is moved to `std.Target.Cpu.baseline`. * `std.Target.allCpus` is renamed to `std.Target.allCpuModels`. * `std.Target.defaultAbi` is moved to `std.Target.Abi.default`. * Significant cleanup of aarch64 and arm CPU features, resulting in the needed bit count for cpu feature set going from 174 to 138. * Add `std.Target.Cpu.Feature.Set.addFeatureSet` for merging feature sets together. `-target-feature` and `-target-cpu` are removed in favor of `-mcpu`, to conform to established conventions, and it gains additional power to support cpu features. The syntax is: -mcpu=name+on1+on2-off1-off2 closes #4261 --- lib/std/builtin.zig | 7 +- lib/std/target.zig | 1198 ++++++++++++------------- lib/std/target/aarch64.zig | 551 ++++-------- lib/std/target/amdgpu.zig | 89 +- lib/std/target/arm.zig | 172 ++-- lib/std/target/avr.zig | 525 +++++------ lib/std/target/bpf.zig | 21 +- lib/std/target/hexagon.zig | 25 +- lib/std/target/mips.zig | 45 +- lib/std/target/msp430.zig | 17 +- lib/std/target/nvptx.zig | 41 +- lib/std/target/powerpc.zig | 85 +- lib/std/target/riscv.zig | 19 +- lib/std/target/sparc.zig | 91 +- lib/std/target/systemz.zig | 35 +- lib/std/target/wasm.zig | 17 +- lib/std/target/x86.zig | 167 ++-- src-self-hosted/libc_installation.zig | 3 +- src-self-hosted/print_targets.zig | 84 +- src-self-hosted/stage2.zig | 395 +++----- src/codegen.cpp | 43 +- src/error.cpp | 1 - src/main.cpp | 86 +- src/stage2.cpp | 93 +- src/stage2.h | 39 +- src/target.cpp | 38 +- src/target.hpp | 2 +- test/tests.zig | 81 +- 28 files changed, 1742 insertions(+), 2228 deletions(-) diff --git a/lib/std/builtin.zig b/lib/std/builtin.zig index 58a3f1a5bf..5440de4d3b 100644 --- a/lib/std/builtin.zig +++ b/lib/std/builtin.zig @@ -6,8 +6,8 @@ pub const Target = std.Target; /// Deprecated: use `std.Target.Os`. pub const Os = std.Target.Os; -/// Deprecated: use `std.Target.Arch`. -pub const Arch = std.Target.Arch; +/// Deprecated: use `std.Target.Cpu.Arch`. +pub const Arch = std.Target.Cpu.Arch; /// Deprecated: use `std.Target.Abi`. pub const Abi = std.Target.Abi; @@ -18,9 +18,6 @@ pub const ObjectFormat = std.Target.ObjectFormat; /// Deprecated: use `std.Target.SubSystem`. pub const SubSystem = std.Target.SubSystem; -/// Deprecated: use `std.Target.CpuFeatures`. -pub const CpuFeatures = std.Target.CpuFeatures; - /// Deprecated: use `std.Target.Cpu`. pub const Cpu = std.Target.Cpu; diff --git a/lib/std/target.zig b/lib/std/target.zig index bc78b2dce5..8a3ae23337 100644 --- a/lib/std/target.zig +++ b/lib/std/target.zig @@ -47,6 +47,18 @@ pub const Target = union(enum) { emscripten, uefi, other, + + pub fn parse(text: []const u8) !Os { + if (mem.eql(u8, text, "native")) return builtin.os; + + const info = @typeInfo(Os); + inline for (info.Enum.fields) |field| { + if (mem.eql(u8, text, field.name)) { + return @field(Os, field.name); + } + } + return error.UnknownOperatingSystem; + } }; pub const aarch64 = @import("target/aarch64.zig"); @@ -65,457 +77,6 @@ pub const Target = union(enum) { pub const wasm = @import("target/wasm.zig"); pub const x86 = @import("target/x86.zig"); - pub const Arch = union(enum) { - arm: Arm32, - armeb: Arm32, - aarch64: Arm64, - aarch64_be: Arm64, - aarch64_32: Arm64, - arc, - avr, - bpfel, - bpfeb, - hexagon, - mips, - mipsel, - mips64, - mips64el, - msp430, - powerpc, - powerpc64, - powerpc64le, - r600, - amdgcn, - riscv32, - riscv64, - sparc, - sparcv9, - sparcel, - s390x, - tce, - tcele, - thumb: Arm32, - thumbeb: Arm32, - i386, - x86_64, - xcore, - nvptx, - nvptx64, - le32, - le64, - amdil, - amdil64, - hsail, - hsail64, - spir, - spir64, - kalimba: Kalimba, - shave, - lanai, - wasm32, - wasm64, - renderscript32, - renderscript64, - - pub const Arm32 = enum { - v8_5a, - v8_4a, - v8_3a, - v8_2a, - v8_1a, - v8a, - v8r, - v8m_baseline, - v8m_mainline, - v8_1m_mainline, - v7a, - v7em, - v7m, - v7s, - v7k, - v7ve, - v6, - v6m, - v6k, - v6t2, - v5, - v5te, - v4t, - - pub fn version(version: Arm32) comptime_int { - return switch (version) { - .v8_5a, .v8_4a, .v8_3a, .v8_2a, .v8_1a, .v8a, .v8r, .v8m_baseline, .v8m_mainline, .v8_1m_mainline => 8, - .v7a, .v7em, .v7m, .v7s, .v7k, .v7ve => 7, - .v6, .v6m, .v6k, .v6t2 => 6, - .v5, .v5te => 5, - .v4t => 4, - }; - } - }; - pub const Arm64 = enum { - v8_5a, - v8_4a, - v8_3a, - v8_2a, - v8_1a, - v8a, - }; - pub const Kalimba = enum { - v5, - v4, - v3, - }; - pub const Mips = enum { - r6, - }; - - pub fn subArchName(arch: Arch) ?[]const u8 { - return switch (arch) { - .arm, .armeb, .thumb, .thumbeb => |arm32| @tagName(arm32), - .aarch64, .aarch64_be, .aarch64_32 => |arm64| @tagName(arm64), - .kalimba => |kalimba| @tagName(kalimba), - else => return null, - }; - } - - pub fn subArchFeature(arch: Arch) ?Cpu.Feature.Set.Index { - return switch (arch) { - .arm, .armeb, .thumb, .thumbeb => |arm32| switch (arm32) { - .v8_5a => @enumToInt(arm.Feature.armv8_5_a), - .v8_4a => @enumToInt(arm.Feature.armv8_4_a), - .v8_3a => @enumToInt(arm.Feature.armv8_3_a), - .v8_2a => @enumToInt(arm.Feature.armv8_2_a), - .v8_1a => @enumToInt(arm.Feature.armv8_1_a), - .v8a => @enumToInt(arm.Feature.armv8_a), - .v8r => @enumToInt(arm.Feature.armv8_r), - .v8m_baseline => @enumToInt(arm.Feature.armv8_m_base), - .v8m_mainline => @enumToInt(arm.Feature.armv8_m_main), - .v8_1m_mainline => @enumToInt(arm.Feature.armv8_1_m_main), - .v7a => @enumToInt(arm.Feature.armv7_a), - .v7em => @enumToInt(arm.Feature.armv7e_m), - .v7m => @enumToInt(arm.Feature.armv7_m), - .v7s => @enumToInt(arm.Feature.armv7s), - .v7k => @enumToInt(arm.Feature.armv7k), - .v7ve => @enumToInt(arm.Feature.armv7ve), - .v6 => @enumToInt(arm.Feature.armv6), - .v6m => @enumToInt(arm.Feature.armv6_m), - .v6k => @enumToInt(arm.Feature.armv6k), - .v6t2 => @enumToInt(arm.Feature.armv6t2), - .v5 => @enumToInt(arm.Feature.armv5t), - .v5te => @enumToInt(arm.Feature.armv5te), - .v4t => @enumToInt(arm.Feature.armv4t), - }, - .aarch64, .aarch64_be, .aarch64_32 => |arm64| switch (arm64) { - .v8_5a => @enumToInt(aarch64.Feature.v8_5a), - .v8_4a => @enumToInt(aarch64.Feature.v8_4a), - .v8_3a => @enumToInt(aarch64.Feature.v8_3a), - .v8_2a => @enumToInt(aarch64.Feature.v8_2a), - .v8_1a => @enumToInt(aarch64.Feature.v8_1a), - .v8a => @enumToInt(aarch64.Feature.v8a), - }, - else => return null, - }; - } - - pub fn isARM(arch: Arch) bool { - return switch (arch) { - .arm, .armeb => true, - else => false, - }; - } - - pub fn isThumb(arch: Arch) bool { - return switch (arch) { - .thumb, .thumbeb => true, - else => false, - }; - } - - pub fn isWasm(arch: Arch) bool { - return switch (arch) { - .wasm32, .wasm64 => true, - else => false, - }; - } - - pub fn isRISCV(arch: Arch) bool { - return switch (arch) { - .riscv32, .riscv64 => true, - else => false, - }; - } - - pub fn isMIPS(arch: Arch) bool { - return switch (arch) { - .mips, .mipsel, .mips64, .mips64el => true, - else => false, - }; - } - - pub fn parseCpu(arch: Arch, cpu_name: []const u8) !*const Cpu { - for (arch.allCpus()) |cpu| { - if (mem.eql(u8, cpu_name, cpu.name)) { - return cpu; - } - } - return error.UnknownCpu; - } - - /// Comma-separated list of features, with + or - in front of each feature. This - /// form represents a deviation from baseline CPU, which is provided as a parameter. - /// Extra commas are ignored. - pub fn parseCpuFeatureSet(arch: Arch, cpu: *const Cpu, features_text: []const u8) !Cpu.Feature.Set { - const all_features = arch.allFeaturesList(); - var set = cpu.features; - var it = mem.tokenize(features_text, ","); - while (it.next()) |item_text| { - var feature_name: []const u8 = undefined; - var op: enum { - add, - sub, - } = undefined; - if (mem.startsWith(u8, item_text, "+")) { - op = .add; - feature_name = item_text[1..]; - } else if (mem.startsWith(u8, item_text, "-")) { - op = .sub; - feature_name = item_text[1..]; - } else { - return error.InvalidCpuFeatures; - } - for (all_features) |feature, index_usize| { - const index = @intCast(Cpu.Feature.Set.Index, index_usize); - if (mem.eql(u8, feature_name, feature.name)) { - switch (op) { - .add => set.addFeature(index), - .sub => set.removeFeature(index), - } - break; - } - } else { - return error.UnknownCpuFeature; - } - } - return set; - } - - pub fn toElfMachine(arch: Arch) std.elf.EM { - return switch (arch) { - .avr => ._AVR, - .msp430 => ._MSP430, - .arc => ._ARC, - .arm => ._ARM, - .armeb => ._ARM, - .hexagon => ._HEXAGON, - .le32 => ._NONE, - .mips => ._MIPS, - .mipsel => ._MIPS_RS3_LE, - .powerpc => ._PPC, - .r600 => ._NONE, - .riscv32 => ._RISCV, - .sparc => ._SPARC, - .sparcel => ._SPARC, - .tce => ._NONE, - .tcele => ._NONE, - .thumb => ._ARM, - .thumbeb => ._ARM, - .i386 => ._386, - .xcore => ._XCORE, - .nvptx => ._NONE, - .amdil => ._NONE, - .hsail => ._NONE, - .spir => ._NONE, - .kalimba => ._CSR_KALIMBA, - .shave => ._NONE, - .lanai => ._LANAI, - .wasm32 => ._NONE, - .renderscript32 => ._NONE, - .aarch64_32 => ._AARCH64, - .aarch64 => ._AARCH64, - .aarch64_be => ._AARCH64, - .mips64 => ._MIPS, - .mips64el => ._MIPS_RS3_LE, - .powerpc64 => ._PPC64, - .powerpc64le => ._PPC64, - .riscv64 => ._RISCV, - .x86_64 => ._X86_64, - .nvptx64 => ._NONE, - .le64 => ._NONE, - .amdil64 => ._NONE, - .hsail64 => ._NONE, - .spir64 => ._NONE, - .wasm64 => ._NONE, - .renderscript64 => ._NONE, - .amdgcn => ._NONE, - .bpfel => ._BPF, - .bpfeb => ._BPF, - .sparcv9 => ._SPARCV9, - .s390x => ._S390, - }; - } - - pub fn endian(arch: Arch) builtin.Endian { - return switch (arch) { - .avr, - .arm, - .aarch64_32, - .aarch64, - .amdgcn, - .amdil, - .amdil64, - .bpfel, - .hexagon, - .hsail, - .hsail64, - .kalimba, - .le32, - .le64, - .mipsel, - .mips64el, - .msp430, - .nvptx, - .nvptx64, - .sparcel, - .tcele, - .powerpc64le, - .r600, - .riscv32, - .riscv64, - .i386, - .x86_64, - .wasm32, - .wasm64, - .xcore, - .thumb, - .spir, - .spir64, - .renderscript32, - .renderscript64, - .shave, - => .Little, - - .arc, - .armeb, - .aarch64_be, - .bpfeb, - .mips, - .mips64, - .powerpc, - .powerpc64, - .thumbeb, - .sparc, - .sparcv9, - .tce, - .lanai, - .s390x, - => .Big, - }; - } - - /// Returns a name that matches the lib/std/target/* directory name. - pub fn genericName(arch: Arch) []const u8 { - return switch (arch) { - .arm, .armeb, .thumb, .thumbeb => "arm", - .aarch64, .aarch64_be, .aarch64_32 => "aarch64", - .avr => "avr", - .bpfel, .bpfeb => "bpf", - .hexagon => "hexagon", - .mips, .mipsel, .mips64, .mips64el => "mips", - .msp430 => "msp430", - .powerpc, .powerpc64, .powerpc64le => "powerpc", - .amdgcn => "amdgpu", - .riscv32, .riscv64 => "riscv", - .sparc, .sparcv9, .sparcel => "sparc", - .s390x => "systemz", - .i386, .x86_64 => "x86", - .nvptx, .nvptx64 => "nvptx", - .wasm32, .wasm64 => "wasm", - else => @tagName(arch), - }; - } - - /// All CPU features Zig is aware of, sorted lexicographically by name. - pub fn allFeaturesList(arch: Arch) []const Cpu.Feature { - return switch (arch) { - .arm, .armeb, .thumb, .thumbeb => &arm.all_features, - .aarch64, .aarch64_be, .aarch64_32 => &aarch64.all_features, - .avr => &avr.all_features, - .bpfel, .bpfeb => &bpf.all_features, - .hexagon => &hexagon.all_features, - .mips, .mipsel, .mips64, .mips64el => &mips.all_features, - .msp430 => &msp430.all_features, - .powerpc, .powerpc64, .powerpc64le => &powerpc.all_features, - .amdgcn => &amdgpu.all_features, - .riscv32, .riscv64 => &riscv.all_features, - .sparc, .sparcv9, .sparcel => &sparc.all_features, - .s390x => &systemz.all_features, - .i386, .x86_64 => &x86.all_features, - .nvptx, .nvptx64 => &nvptx.all_features, - .wasm32, .wasm64 => &wasm.all_features, - - else => &[0]Cpu.Feature{}, - }; - } - - /// The "default" set of CPU features for cross-compiling. A conservative set - /// of features that is expected to be supported on most available hardware. - pub fn getBaselineCpuFeatures(arch: Arch) CpuFeatures { - const S = struct { - const generic_cpu = Cpu{ - .name = "generic", - .llvm_name = null, - .features = Cpu.Feature.Set.empty, - }; - }; - const cpu = switch (arch) { - .arm, .armeb, .thumb, .thumbeb => &arm.cpu.generic, - .aarch64, .aarch64_be, .aarch64_32 => &aarch64.cpu.generic, - .avr => &avr.cpu.avr1, - .bpfel, .bpfeb => &bpf.cpu.generic, - .hexagon => &hexagon.cpu.generic, - .mips, .mipsel => &mips.cpu.mips32, - .mips64, .mips64el => &mips.cpu.mips64, - .msp430 => &msp430.cpu.generic, - .powerpc, .powerpc64, .powerpc64le => &powerpc.cpu.generic, - .amdgcn => &amdgpu.cpu.generic, - .riscv32 => &riscv.cpu.baseline_rv32, - .riscv64 => &riscv.cpu.baseline_rv64, - .sparc, .sparcv9, .sparcel => &sparc.cpu.generic, - .s390x => &systemz.cpu.generic, - .i386 => &x86.cpu.pentium4, - .x86_64 => &x86.cpu.x86_64, - .nvptx, .nvptx64 => &nvptx.cpu.sm_20, - .wasm32, .wasm64 => &wasm.cpu.generic, - - else => &S.generic_cpu, - }; - return CpuFeatures.initFromCpu(arch, cpu); - } - - /// All CPUs Zig is aware of, sorted lexicographically by name. - pub fn allCpus(arch: Arch) []const *const Cpu { - return switch (arch) { - .arm, .armeb, .thumb, .thumbeb => arm.all_cpus, - .aarch64, .aarch64_be, .aarch64_32 => aarch64.all_cpus, - .avr => avr.all_cpus, - .bpfel, .bpfeb => bpf.all_cpus, - .hexagon => hexagon.all_cpus, - .mips, .mipsel, .mips64, .mips64el => mips.all_cpus, - .msp430 => msp430.all_cpus, - .powerpc, .powerpc64, .powerpc64le => powerpc.all_cpus, - .amdgcn => amdgpu.all_cpus, - .riscv32, .riscv64 => riscv.all_cpus, - .sparc, .sparcv9, .sparcel => sparc.all_cpus, - .s390x => systemz.all_cpus, - .i386, .x86_64 => x86.all_cpus, - .nvptx, .nvptx64 => nvptx.all_cpus, - .wasm32, .wasm64 => wasm.all_cpus, - - else => &[0]*const Cpu{}, - }; - } - }; - pub const Abi = enum { none, gnu, @@ -539,11 +100,104 @@ pub const Target = union(enum) { coreclr, simulator, macabi, + + pub fn default(arch: Cpu.Arch, target_os: Os) Abi { + switch (arch) { + .wasm32, .wasm64 => return .musl, + else => {}, + } + switch (target_os) { + .freestanding, + .ananas, + .cloudabi, + .dragonfly, + .lv2, + .solaris, + .haiku, + .minix, + .rtems, + .nacl, + .cnk, + .aix, + .cuda, + .nvcl, + .amdhsa, + .ps4, + .elfiamcu, + .mesa3d, + .contiki, + .amdpal, + .hermit, + .other, + => return .eabi, + .openbsd, + .macosx, + .freebsd, + .ios, + .tvos, + .watchos, + .fuchsia, + .kfreebsd, + .netbsd, + .hurd, + => return .gnu, + .windows, + .uefi, + => return .msvc, + .linux, + .wasi, + .emscripten, + => return .musl, + } + } + + pub fn parse(text: []const u8) !Abi { + if (mem.eql(u8, text, "native")) return builtin.abi; + + const info = @typeInfo(Abi); + inline for (info.Enum.fields) |field| { + if (mem.eql(u8, text, field.name)) { + return @field(Abi, field.name); + } + } + return error.UnknownApplicationBinaryInterface; + } + }; + + pub const ObjectFormat = enum { + unknown, + coff, + elf, + macho, + wasm, + }; + + pub const SubSystem = enum { + Console, + Windows, + Posix, + Native, + EfiApplication, + EfiBootServiceDriver, + EfiRom, + EfiRuntimeDriver, + }; + + pub const Cross = struct { + cpu: Cpu, + os: Os, + abi: Abi, }; pub const Cpu = struct { - name: []const u8, - llvm_name: ?[:0]const u8, + /// Architecture + arch: Arch, + + /// The CPU model to target. It has a set of features + /// which are overridden with the `features` field. + model: *const Model, + + /// An explicit list of the entire CPU feature set. It may differ from the specific CPU model's features. features: Feature.Set, pub const Feature = struct { @@ -569,7 +223,7 @@ pub const Target = union(enum) { pub const Set = struct { ints: [usize_count]usize, - pub const needed_bit_count = 174; + pub const needed_bit_count = 138; pub const byte_count = (needed_bit_count + 7) / 8; pub const usize_count = (byte_count + (@sizeOf(usize) - 1)) / @sizeOf(usize); pub const Index = std.math.Log2Int(@IntType(false, usize_count * @bitSizeOf(usize))); @@ -593,6 +247,12 @@ pub const Target = union(enum) { set.ints[usize_index] |= @as(usize, 1) << bit_index; } + /// Adds the specified feature set but not its dependencies. + pub fn addFeatureSet(set: *Set, other_set: Set) void { + set.ints = @as(@Vector(usize_count, usize), set.ints) | + @as(@Vector(usize_count, usize), other_set.ints); + } + /// Removes the specified feature but not its dependents. pub fn removeFeature(set: *Set, arch_feature_index: Index) void { const usize_index = arch_feature_index / @bitSizeOf(usize); @@ -608,8 +268,7 @@ pub const Target = union(enum) { for (all_features_list) |feature, index_usize| { const index = @intCast(Index, index_usize); if (set.isEnabled(index)) { - set.ints = @as(@Vector(usize_count, usize), set.ints) | - @as(@Vector(usize_count, usize), feature.dependencies.ints); + set.addFeatureSet(feature.dependencies); } } const nothing_changed = mem.eql(usize, &old, &set.ints); @@ -644,77 +303,362 @@ pub const Target = union(enum) { }; } }; - }; - pub const ObjectFormat = enum { - unknown, - coff, - elf, - macho, - wasm, - }; + pub const Arch = enum { + arm, + armeb, + aarch64, + aarch64_be, + aarch64_32, + arc, + avr, + bpfel, + bpfeb, + hexagon, + mips, + mipsel, + mips64, + mips64el, + msp430, + powerpc, + powerpc64, + powerpc64le, + r600, + amdgcn, + riscv32, + riscv64, + sparc, + sparcv9, + sparcel, + s390x, + tce, + tcele, + thumb, + thumbeb, + i386, + x86_64, + xcore, + nvptx, + nvptx64, + le32, + le64, + amdil, + amdil64, + hsail, + hsail64, + spir, + spir64, + kalimba, + shave, + lanai, + wasm32, + wasm64, + renderscript32, + renderscript64, - pub const SubSystem = enum { - Console, - Windows, - Posix, - Native, - EfiApplication, - EfiBootServiceDriver, - EfiRom, - EfiRuntimeDriver, - }; - - pub const Cross = struct { - arch: Arch, - os: Os, - abi: Abi, - cpu_features: CpuFeatures, - }; - - pub const CpuFeatures = struct { - /// The CPU to target. It has a set of features - /// which are overridden with the `features` field. - cpu: *const Cpu, - - /// Explicitly provide the entire CPU feature set. - features: Cpu.Feature.Set, - - pub fn initFromCpu(arch: Arch, cpu: *const Cpu) CpuFeatures { - var features = cpu.features; - if (arch.subArchFeature()) |sub_arch_index| { - features.addFeature(sub_arch_index); + pub fn isARM(arch: Arch) bool { + return switch (arch) { + .arm, .armeb => true, + else => false, + }; } - features.populateDependencies(arch.allFeaturesList()); - return CpuFeatures{ - .cpu = cpu, - .features = features, + + pub fn isThumb(arch: Arch) bool { + return switch (arch) { + .thumb, .thumbeb => true, + else => false, + }; + } + + pub fn isWasm(arch: Arch) bool { + return switch (arch) { + .wasm32, .wasm64 => true, + else => false, + }; + } + + pub fn isRISCV(arch: Arch) bool { + return switch (arch) { + .riscv32, .riscv64 => true, + else => false, + }; + } + + pub fn isMIPS(arch: Arch) bool { + return switch (arch) { + .mips, .mipsel, .mips64, .mips64el => true, + else => false, + }; + } + + pub fn parseCpuModel(arch: Arch, cpu_name: []const u8) !*const Cpu.Model { + for (arch.allCpuModels()) |cpu| { + if (mem.eql(u8, cpu_name, cpu.name)) { + return cpu; + } + } + return error.UnknownCpu; + } + + pub fn toElfMachine(arch: Arch) std.elf.EM { + return switch (arch) { + .avr => ._AVR, + .msp430 => ._MSP430, + .arc => ._ARC, + .arm => ._ARM, + .armeb => ._ARM, + .hexagon => ._HEXAGON, + .le32 => ._NONE, + .mips => ._MIPS, + .mipsel => ._MIPS_RS3_LE, + .powerpc => ._PPC, + .r600 => ._NONE, + .riscv32 => ._RISCV, + .sparc => ._SPARC, + .sparcel => ._SPARC, + .tce => ._NONE, + .tcele => ._NONE, + .thumb => ._ARM, + .thumbeb => ._ARM, + .i386 => ._386, + .xcore => ._XCORE, + .nvptx => ._NONE, + .amdil => ._NONE, + .hsail => ._NONE, + .spir => ._NONE, + .kalimba => ._CSR_KALIMBA, + .shave => ._NONE, + .lanai => ._LANAI, + .wasm32 => ._NONE, + .renderscript32 => ._NONE, + .aarch64_32 => ._AARCH64, + .aarch64 => ._AARCH64, + .aarch64_be => ._AARCH64, + .mips64 => ._MIPS, + .mips64el => ._MIPS_RS3_LE, + .powerpc64 => ._PPC64, + .powerpc64le => ._PPC64, + .riscv64 => ._RISCV, + .x86_64 => ._X86_64, + .nvptx64 => ._NONE, + .le64 => ._NONE, + .amdil64 => ._NONE, + .hsail64 => ._NONE, + .spir64 => ._NONE, + .wasm64 => ._NONE, + .renderscript64 => ._NONE, + .amdgcn => ._NONE, + .bpfel => ._BPF, + .bpfeb => ._BPF, + .sparcv9 => ._SPARCV9, + .s390x => ._S390, + }; + } + + pub fn endian(arch: Arch) builtin.Endian { + return switch (arch) { + .avr, + .arm, + .aarch64_32, + .aarch64, + .amdgcn, + .amdil, + .amdil64, + .bpfel, + .hexagon, + .hsail, + .hsail64, + .kalimba, + .le32, + .le64, + .mipsel, + .mips64el, + .msp430, + .nvptx, + .nvptx64, + .sparcel, + .tcele, + .powerpc64le, + .r600, + .riscv32, + .riscv64, + .i386, + .x86_64, + .wasm32, + .wasm64, + .xcore, + .thumb, + .spir, + .spir64, + .renderscript32, + .renderscript64, + .shave, + => .Little, + + .arc, + .armeb, + .aarch64_be, + .bpfeb, + .mips, + .mips64, + .powerpc, + .powerpc64, + .thumbeb, + .sparc, + .sparcv9, + .tce, + .lanai, + .s390x, + => .Big, + }; + } + + /// Returns a name that matches the lib/std/target/* directory name. + pub fn genericName(arch: Arch) []const u8 { + return switch (arch) { + .arm, .armeb, .thumb, .thumbeb => "arm", + .aarch64, .aarch64_be, .aarch64_32 => "aarch64", + .avr => "avr", + .bpfel, .bpfeb => "bpf", + .hexagon => "hexagon", + .mips, .mipsel, .mips64, .mips64el => "mips", + .msp430 => "msp430", + .powerpc, .powerpc64, .powerpc64le => "powerpc", + .amdgcn => "amdgpu", + .riscv32, .riscv64 => "riscv", + .sparc, .sparcv9, .sparcel => "sparc", + .s390x => "systemz", + .i386, .x86_64 => "x86", + .nvptx, .nvptx64 => "nvptx", + .wasm32, .wasm64 => "wasm", + else => @tagName(arch), + }; + } + + /// All CPU features Zig is aware of, sorted lexicographically by name. + pub fn allFeaturesList(arch: Arch) []const Cpu.Feature { + return switch (arch) { + .arm, .armeb, .thumb, .thumbeb => &arm.all_features, + .aarch64, .aarch64_be, .aarch64_32 => &aarch64.all_features, + .avr => &avr.all_features, + .bpfel, .bpfeb => &bpf.all_features, + .hexagon => &hexagon.all_features, + .mips, .mipsel, .mips64, .mips64el => &mips.all_features, + .msp430 => &msp430.all_features, + .powerpc, .powerpc64, .powerpc64le => &powerpc.all_features, + .amdgcn => &amdgpu.all_features, + .riscv32, .riscv64 => &riscv.all_features, + .sparc, .sparcv9, .sparcel => &sparc.all_features, + .s390x => &systemz.all_features, + .i386, .x86_64 => &x86.all_features, + .nvptx, .nvptx64 => &nvptx.all_features, + .wasm32, .wasm64 => &wasm.all_features, + + else => &[0]Cpu.Feature{}, + }; + } + + /// All processors Zig is aware of, sorted lexicographically by name. + pub fn allCpuModels(arch: Arch) []const *const Cpu.Model { + return switch (arch) { + .arm, .armeb, .thumb, .thumbeb => arm.all_cpus, + .aarch64, .aarch64_be, .aarch64_32 => aarch64.all_cpus, + .avr => avr.all_cpus, + .bpfel, .bpfeb => bpf.all_cpus, + .hexagon => hexagon.all_cpus, + .mips, .mipsel, .mips64, .mips64el => mips.all_cpus, + .msp430 => msp430.all_cpus, + .powerpc, .powerpc64, .powerpc64le => powerpc.all_cpus, + .amdgcn => amdgpu.all_cpus, + .riscv32, .riscv64 => riscv.all_cpus, + .sparc, .sparcv9, .sparcel => sparc.all_cpus, + .s390x => systemz.all_cpus, + .i386, .x86_64 => x86.all_cpus, + .nvptx, .nvptx64 => nvptx.all_cpus, + .wasm32, .wasm64 => wasm.all_cpus, + + else => &[0]*const Model{}, + }; + } + + pub fn parse(text: []const u8) !Arch { + if (mem.eql(u8, text, "native")) return builtin.arch; + + const info = @typeInfo(Arch); + inline for (info.Enum.fields) |field| { + if (mem.eql(u8, text, field.name)) { + return @as(Arch, @field(Arch, field.name)); + } + } + return error.UnknownArchitecture; + } + }; + + pub const Model = struct { + name: []const u8, + llvm_name: ?[:0]const u8, + features: Feature.Set, + + pub fn toCpu(model: *const Model, arch: Arch) Cpu { + var features = model.features; + features.populateDependencies(arch.allFeaturesList()); + return .{ + .arch = arch, + .model = model, + .features = features, + }; + } + }; + + /// The "default" set of CPU features for cross-compiling. A conservative set + /// of features that is expected to be supported on most available hardware. + pub fn baseline(arch: Arch) Cpu { + const S = struct { + const generic_model = Model{ + .name = "generic", + .llvm_name = null, + .features = Cpu.Feature.Set.empty, + }; }; + const model = switch (arch) { + .arm, .armeb, .thumb, .thumbeb => &arm.cpu.baseline, + .aarch64, .aarch64_be, .aarch64_32 => &aarch64.cpu.generic, + .avr => &avr.cpu.avr1, + .bpfel, .bpfeb => &bpf.cpu.generic, + .hexagon => &hexagon.cpu.generic, + .mips, .mipsel => &mips.cpu.mips32, + .mips64, .mips64el => &mips.cpu.mips64, + .msp430 => &msp430.cpu.generic, + .powerpc, .powerpc64, .powerpc64le => &powerpc.cpu.generic, + .amdgcn => &amdgpu.cpu.generic, + .riscv32 => &riscv.cpu.baseline_rv32, + .riscv64 => &riscv.cpu.baseline_rv64, + .sparc, .sparcv9, .sparcel => &sparc.cpu.generic, + .s390x => &systemz.cpu.generic, + .i386 => &x86.cpu.pentium4, + .x86_64 => &x86.cpu.x86_64, + .nvptx, .nvptx64 => &nvptx.cpu.sm_20, + .wasm32, .wasm64 => &wasm.cpu.generic, + + else => &S.generic_model, + }; + return model.toCpu(arch); } }; pub const current = Target{ .Cross = Cross{ - .arch = builtin.arch, + .cpu = builtin.cpu, .os = builtin.os, .abi = builtin.abi, - .cpu_features = builtin.cpu_features, }, }; pub const stack_align = 16; - pub fn getCpuFeatures(self: Target) CpuFeatures { - return switch (self) { - .Native => builtin.cpu_features, - .Cross => |cross| cross.cpu_features, - }; - } - pub fn zigTriple(self: Target, allocator: *mem.Allocator) ![]u8 { - return std.fmt.allocPrint(allocator, "{}{}-{}-{}", .{ + return std.fmt.allocPrint(allocator, "{}-{}-{}", .{ @tagName(self.getArch()), - Target.archSubArchName(self.getArch()), @tagName(self.getOs()), @tagName(self.getAbi()), }); @@ -776,139 +720,81 @@ pub const Target = union(enum) { }); } - /// TODO: Support CPU features here? - /// https://github.com/ziglang/zig/issues/4261 - pub fn parse(text: []const u8) !Target { - var it = mem.separate(text, "-"); + pub const ParseOptions = struct { + /// This is sometimes called a "triple". It looks roughly like this: + /// riscv64-linux-gnu + /// The fields are, respectively: + /// * CPU Architecture + /// * Operating System + /// * C ABI (optional) + /// "native" can be used for any of the fields. + arch_os_abi: []const u8, + + /// Looks like "name+a+b-c-d+e", where "name" is a CPU Model name, "a", "b", and "e" + /// are examples of CPU features to add to the set, and "c" and "d" are examples of CPU features + /// to remove from the set. + /// The default value of `null` means to use the "baseline" feature set. + /// "native" can be used to perform CPU introspection. + cpu: ?[]const u8 = null, + }; + + pub fn parse(args: ParseOptions) !Target { + var it = mem.separate(args.arch_os_abi, "-"); const arch_name = it.next() orelse return error.MissingArchitecture; const os_name = it.next() orelse return error.MissingOperatingSystem; const abi_name = it.next(); - const arch = try parseArchSub(arch_name); + if (it.next() != null) return error.UnexpectedExtraField; - var cross = Cross{ - .arch = arch, - .cpu_features = arch.getBaselineCpuFeatures(), - .os = try parseOs(os_name), - .abi = undefined, - }; - cross.abi = if (abi_name) |n| try parseAbi(n) else defaultAbi(cross.arch, cross.os); - return Target{ .Cross = cross }; - } + const arch = try Cpu.Arch.parse(arch_name); + const os = try Os.parse(os_name); + const abi = if (abi_name) |n| try Abi.parse(n) else Abi.default(arch, os); - pub fn defaultAbi(arch: Arch, target_os: Os) Abi { - switch (arch) { - .wasm32, .wasm64 => return .musl, - else => {}, - } - switch (target_os) { - .freestanding, - .ananas, - .cloudabi, - .dragonfly, - .lv2, - .solaris, - .haiku, - .minix, - .rtems, - .nacl, - .cnk, - .aix, - .cuda, - .nvcl, - .amdhsa, - .ps4, - .elfiamcu, - .mesa3d, - .contiki, - .amdpal, - .hermit, - .other, - => return .eabi, - .openbsd, - .macosx, - .freebsd, - .ios, - .tvos, - .watchos, - .fuchsia, - .kfreebsd, - .netbsd, - .hurd, - => return .gnu, - .windows, - .uefi, - => return .msvc, - .linux, - .wasi, - .emscripten, - => return .musl, - } - } + const all_features = arch.allFeaturesList(); + const cpu: Cpu = if (args.cpu) |cpu_text| blk: { + var index: usize = 0; + while (index < cpu_text.len and cpu_text[index] != '+' and cpu_text[index] != '-') { + index += 1; + } + const cpu_name = cpu_text[0..index]; + const cpu_model = try arch.parseCpuModel(cpu_name); - pub const ParseArchSubError = error{ - UnknownArchitecture, - UnknownSubArchitecture, - }; - - pub fn parseArchSub(text: []const u8) ParseArchSubError!Arch { - const info = @typeInfo(Arch); - inline for (info.Union.fields) |field| { - if (mem.startsWith(u8, text, field.name)) { - if (field.field_type == void) { - return @as(Arch, @field(Arch, field.name)); - } else { - const sub_info = @typeInfo(field.field_type); - inline for (sub_info.Enum.fields) |sub_field| { - const combined = field.name ++ sub_field.name; - if (mem.eql(u8, text, combined)) { - return @unionInit(Arch, field.name, @field(field.field_type, sub_field.name)); + var set = cpu_model.features; + while (index < cpu_text.len) { + const op = cpu_text[index]; + index += 1; + const start = index; + while (index < cpu_text.len and cpu_text[index] != '+' and cpu_text[index] != '-') { + index += 1; + } + const feature_name = cpu_text[start..index]; + for (all_features) |feature, feat_index_usize| { + const feat_index = @intCast(Cpu.Feature.Set.Index, feat_index_usize); + if (mem.eql(u8, feature_name, feature.name)) { + switch (op) { + '+' => set.addFeature(feat_index), + '-' => set.removeFeature(feat_index), + else => unreachable, } + break; } - return error.UnknownSubArchitecture; + } else { + return error.UnknownCpuFeature; } } - } - return error.UnknownArchitecture; - } + set.populateDependencies(all_features); + break :blk .{ + .arch = arch, + .model = cpu_model, + .features = set, + }; + } else Cpu.baseline(arch); - pub fn parseOs(text: []const u8) !Os { - const info = @typeInfo(Os); - inline for (info.Enum.fields) |field| { - if (mem.eql(u8, text, field.name)) { - return @field(Os, field.name); - } - } - return error.UnknownOperatingSystem; - } - - pub fn parseAbi(text: []const u8) !Abi { - const info = @typeInfo(Abi); - inline for (info.Enum.fields) |field| { - if (mem.eql(u8, text, field.name)) { - return @field(Abi, field.name); - } - } - return error.UnknownApplicationBinaryInterface; - } - - fn archSubArchName(arch: Arch) []const u8 { - return switch (arch) { - .arm => |sub| @tagName(sub), - .armeb => |sub| @tagName(sub), - .thumb => |sub| @tagName(sub), - .thumbeb => |sub| @tagName(sub), - .aarch64 => |sub| @tagName(sub), - .aarch64_be => |sub| @tagName(sub), - .kalimba => |sub| @tagName(sub), - else => "", + var cross = Cross{ + .cpu = cpu, + .os = os, + .abi = abi, }; - } - - pub fn subArchName(self: Target) []const u8 { - switch (self) { - .Native => return archSubArchName(builtin.arch), - .Cross => |cross| return archSubArchName(cross.arch), - } + return Target{ .Cross = cross }; } pub fn oFileExt(self: Target) []const u8 { @@ -967,11 +853,15 @@ pub const Target = union(enum) { }; } - pub fn getArch(self: Target) Arch { - switch (self) { - .Native => return builtin.arch, - .Cross => |t| return t.arch, - } + pub fn getCpu(self: Target) Cpu { + return switch (self) { + .Native => builtin.cpu, + .Cross => |cross| cross.cpu, + }; + } + + pub fn getArch(self: Target) Cpu.Arch { + return self.getCpu().arch; } pub fn getAbi(self: Target) Abi { @@ -1372,14 +1262,32 @@ pub const Target = union(enum) { } }; -test "parseCpuFeatureSet" { - const arch: Target.Arch = .x86_64; - const baseline = arch.getBaselineCpuFeatures(); - const set = try arch.parseCpuFeatureSet(baseline.cpu, "-sse,-avx,-cx8"); - std.testing.expect(!Target.x86.featureSetHas(set, .sse)); - std.testing.expect(!Target.x86.featureSetHas(set, .avx)); - std.testing.expect(!Target.x86.featureSetHas(set, .cx8)); - // These are expected because they are part of the baseline - std.testing.expect(Target.x86.featureSetHas(set, .cmov)); - std.testing.expect(Target.x86.featureSetHas(set, .fxsr)); +test "Target.parse" { + { + const target = (try Target.parse(.{ + .arch_os_abi = "x86_64-linux-gnu", + .cpu = "x86_64-sse-avx-cx8", + })).Cross; + + std.testing.expect(target.os == .linux); + std.testing.expect(target.abi == .gnu); + std.testing.expect(target.cpu.arch == .x86_64); + std.testing.expect(!Target.x86.featureSetHas(target.cpu.features, .sse)); + std.testing.expect(!Target.x86.featureSetHas(target.cpu.features, .avx)); + std.testing.expect(!Target.x86.featureSetHas(target.cpu.features, .cx8)); + std.testing.expect(Target.x86.featureSetHas(target.cpu.features, .cmov)); + std.testing.expect(Target.x86.featureSetHas(target.cpu.features, .fxsr)); + } + { + const target = (try Target.parse(.{ + .arch_os_abi = "arm-linux-musleabihf", + .cpu = "generic+v8a", + })).Cross; + + std.testing.expect(target.os == .linux); + std.testing.expect(target.abi == .musleabihf); + std.testing.expect(target.cpu.arch == .arm); + std.testing.expect(target.cpu.model == &Target.arm.cpu.generic); + std.testing.expect(Target.arm.featureSetHas(target.cpu.features, .v8a)); + } } diff --git a/lib/std/target/aarch64.zig b/lib/std/target/aarch64.zig index d2878e2423..40d3ea96ba 100644 --- a/lib/std/target/aarch64.zig +++ b/lib/std/target/aarch64.zig @@ -1,14 +1,8 @@ const std = @import("../std.zig"); -const Cpu = std.Target.Cpu; +const CpuFeature = std.Target.Cpu.Feature; +const CpuModel = std.Target.Cpu.Model; pub const Feature = enum { - a35, - a53, - a55, - a57, - a72, - a73, - a75, a76, aes, aggressive_fma, @@ -40,11 +34,7 @@ pub const Feature = enum { dit, dotprod, exynos_cheap_as_move, - exynosm1, - exynosm2, - exynosm3, exynosm4, - falkor, fmi, force_32bit_jump_tables, fp_armv8, @@ -58,7 +48,6 @@ pub const Feature = enum { fuse_csel, fuse_literals, jsconv, - kryo, lor, lse, lsl_fast, @@ -103,7 +92,6 @@ pub const Feature = enum { reserve_x6, reserve_x7, reserve_x9, - saphira, sb, sel2, sha2, @@ -122,17 +110,11 @@ pub const Feature = enum { sve2_bitperm, sve2_sha3, sve2_sm4, - thunderx, - thunderx2t99, - thunderxt81, - thunderxt83, - thunderxt88, tlb_rmi, tpidr_el1, tpidr_el2, tpidr_el3, tracev8_4, - tsv110, uaops, use_aa, use_postra_scheduler, @@ -151,120 +133,20 @@ pub const Feature = enum { zcz_gp, }; -pub usingnamespace Cpu.Feature.feature_set_fns(Feature); +pub usingnamespace CpuFeature.feature_set_fns(Feature); pub const all_features = blk: { @setEvalBranchQuota(2000); const len = @typeInfo(Feature).Enum.fields.len; - std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count); - var result: [len]Cpu.Feature = undefined; - result[@enumToInt(Feature.a35)] = .{ - .llvm_name = "a35", - .description = "Cortex-A35 ARM processors", - .dependencies = featureSet(&[_]Feature{ - .crc, - .crypto, - .fp_armv8, - .neon, - .perfmon, - }), - }; - result[@enumToInt(Feature.a53)] = .{ - .llvm_name = "a53", - .description = "Cortex-A53 ARM processors", - .dependencies = featureSet(&[_]Feature{ - .balance_fp_ops, - .crc, - .crypto, - .custom_cheap_as_move, - .fp_armv8, - .fuse_aes, - .neon, - .perfmon, - .use_aa, - .use_postra_scheduler, - }), - }; - result[@enumToInt(Feature.a55)] = .{ - .llvm_name = "a55", - .description = "Cortex-A55 ARM processors", - .dependencies = featureSet(&[_]Feature{ - .crypto, - .dotprod, - .fp_armv8, - .fullfp16, - .fuse_aes, - .neon, - .perfmon, - .rcpc, - .v8_2a, - }), - }; - result[@enumToInt(Feature.a57)] = .{ - .llvm_name = "a57", - .description = "Cortex-A57 ARM processors", - .dependencies = featureSet(&[_]Feature{ - .balance_fp_ops, - .crc, - .crypto, - .custom_cheap_as_move, - .fp_armv8, - .fuse_aes, - .fuse_literals, - .neon, - .perfmon, - .predictable_select_expensive, - .use_postra_scheduler, - }), - }; - result[@enumToInt(Feature.a72)] = .{ - .llvm_name = "a72", - .description = "Cortex-A72 ARM processors", - .dependencies = featureSet(&[_]Feature{ - .crc, - .crypto, - .fp_armv8, - .fuse_aes, - .neon, - .perfmon, - }), - }; - result[@enumToInt(Feature.a73)] = .{ - .llvm_name = "a73", - .description = "Cortex-A73 ARM processors", - .dependencies = featureSet(&[_]Feature{ - .crc, - .crypto, - .fp_armv8, - .fuse_aes, - .neon, - .perfmon, - }), - }; - result[@enumToInt(Feature.a75)] = .{ - .llvm_name = "a75", - .description = "Cortex-A75 ARM processors", - .dependencies = featureSet(&[_]Feature{ - .crypto, - .dotprod, - .fp_armv8, - .fullfp16, - .fuse_aes, - .neon, - .perfmon, - .rcpc, - .v8_2a, - }), - }; + std.debug.assert(len <= CpuFeature.Set.needed_bit_count); + var result: [len]CpuFeature = undefined; result[@enumToInt(Feature.a76)] = .{ .llvm_name = "a76", .description = "Cortex-A76 ARM processors", .dependencies = featureSet(&[_]Feature{ .crypto, .dotprod, - .fp_armv8, .fullfp16, - .neon, .rcpc, .ssbs, .v8_2a, @@ -412,11 +294,10 @@ pub const all_features = blk: { .arith_cbz_fusion, .crypto, .disable_latency_sched_heuristic, - .fp_armv8, .fuse_aes, .fuse_crypto_eor, - .neon, .perfmon, + .v8a, .zcm, .zcz, .zcz_fp_workaround, @@ -444,58 +325,6 @@ pub const all_features = blk: { .custom_cheap_as_move, }), }; - result[@enumToInt(Feature.exynosm1)] = .{ - .llvm_name = "exynosm1", - .description = "Samsung Exynos-M1 processors", - .dependencies = featureSet(&[_]Feature{ - .crc, - .crypto, - .exynos_cheap_as_move, - .force_32bit_jump_tables, - .fuse_aes, - .perfmon, - .slow_misaligned_128store, - .slow_paired_128, - .use_postra_scheduler, - .use_reciprocal_square_root, - .zcz_fp, - }), - }; - result[@enumToInt(Feature.exynosm2)] = .{ - .llvm_name = "exynosm2", - .description = "Samsung Exynos-M2 processors", - .dependencies = featureSet(&[_]Feature{ - .crc, - .crypto, - .exynos_cheap_as_move, - .force_32bit_jump_tables, - .fuse_aes, - .perfmon, - .slow_misaligned_128store, - .slow_paired_128, - .use_postra_scheduler, - .zcz_fp, - }), - }; - result[@enumToInt(Feature.exynosm3)] = .{ - .llvm_name = "exynosm3", - .description = "Samsung Exynos-M3 processors", - .dependencies = featureSet(&[_]Feature{ - .crc, - .crypto, - .exynos_cheap_as_move, - .force_32bit_jump_tables, - .fuse_address, - .fuse_aes, - .fuse_csel, - .fuse_literals, - .lsl_fast, - .perfmon, - .predictable_select_expensive, - .use_postra_scheduler, - .zcz_fp, - }), - }; result[@enumToInt(Feature.exynosm4)] = .{ .llvm_name = "exynosm4", .description = "Samsung Exynos-M4 processors", @@ -519,24 +348,6 @@ pub const all_features = blk: { .zcz, }), }; - result[@enumToInt(Feature.falkor)] = .{ - .llvm_name = "falkor", - .description = "Qualcomm Falkor processors", - .dependencies = featureSet(&[_]Feature{ - .crc, - .crypto, - .custom_cheap_as_move, - .fp_armv8, - .lsl_fast, - .neon, - .perfmon, - .predictable_select_expensive, - .rdm, - .slow_strqro_store, - .use_postra_scheduler, - .zcz, - }), - }; result[@enumToInt(Feature.fmi)] = .{ .llvm_name = "fmi", .description = "Enable v8.4-A Flag Manipulation Instructions", @@ -608,22 +419,6 @@ pub const all_features = blk: { .fp_armv8, }), }; - result[@enumToInt(Feature.kryo)] = .{ - .llvm_name = "kryo", - .description = "Qualcomm Kryo processors", - .dependencies = featureSet(&[_]Feature{ - .crc, - .crypto, - .custom_cheap_as_move, - .fp_armv8, - .lsl_fast, - .neon, - .perfmon, - .predictable_select_expensive, - .use_postra_scheduler, - .zcz, - }), - }; result[@enumToInt(Feature.lor)] = .{ .llvm_name = "lor", .description = "Enables ARM v8.1 Limited Ordering Regions extension", @@ -852,23 +647,6 @@ pub const all_features = blk: { .description = "Reserve X9, making it unavailable as a GPR", .dependencies = featureSet(&[_]Feature{}), }; - result[@enumToInt(Feature.saphira)] = .{ - .llvm_name = "saphira", - .description = "Qualcomm Saphira processors", - .dependencies = featureSet(&[_]Feature{ - .crypto, - .custom_cheap_as_move, - .fp_armv8, - .lsl_fast, - .neon, - .perfmon, - .predictable_select_expensive, - .spe, - .use_postra_scheduler, - .v8_4a, - .zcz, - }), - }; result[@enumToInt(Feature.sb)] = .{ .llvm_name = "sb", .description = "Enable v8.5 Speculation Barrier", @@ -979,74 +757,6 @@ pub const all_features = blk: { .sve2, }), }; - result[@enumToInt(Feature.thunderx)] = .{ - .llvm_name = "thunderx", - .description = "Cavium ThunderX processors", - .dependencies = featureSet(&[_]Feature{ - .crc, - .crypto, - .fp_armv8, - .neon, - .perfmon, - .predictable_select_expensive, - .use_postra_scheduler, - }), - }; - result[@enumToInt(Feature.thunderx2t99)] = .{ - .llvm_name = "thunderx2t99", - .description = "Cavium ThunderX2 processors", - .dependencies = featureSet(&[_]Feature{ - .aggressive_fma, - .arith_bcc_fusion, - .crc, - .crypto, - .fp_armv8, - .lse, - .neon, - .predictable_select_expensive, - .use_postra_scheduler, - .v8_1a, - }), - }; - result[@enumToInt(Feature.thunderxt81)] = .{ - .llvm_name = "thunderxt81", - .description = "Cavium ThunderX processors", - .dependencies = featureSet(&[_]Feature{ - .crc, - .crypto, - .fp_armv8, - .neon, - .perfmon, - .predictable_select_expensive, - .use_postra_scheduler, - }), - }; - result[@enumToInt(Feature.thunderxt83)] = .{ - .llvm_name = "thunderxt83", - .description = "Cavium ThunderX processors", - .dependencies = featureSet(&[_]Feature{ - .crc, - .crypto, - .fp_armv8, - .neon, - .perfmon, - .predictable_select_expensive, - .use_postra_scheduler, - }), - }; - result[@enumToInt(Feature.thunderxt88)] = .{ - .llvm_name = "thunderxt88", - .description = "Cavium ThunderX processors", - .dependencies = featureSet(&[_]Feature{ - .crc, - .crypto, - .fp_armv8, - .neon, - .perfmon, - .predictable_select_expensive, - .use_postra_scheduler, - }), - }; result[@enumToInt(Feature.tlb_rmi)] = .{ .llvm_name = "tlb-rmi", .description = "Enable v8.4-A TLB Range and Maintenance Instructions", @@ -1072,24 +782,6 @@ pub const all_features = blk: { .description = "Enable v8.4-A Trace extension", .dependencies = featureSet(&[_]Feature{}), }; - result[@enumToInt(Feature.tsv110)] = .{ - .llvm_name = "tsv110", - .description = "HiSilicon TS-V110 processors", - .dependencies = featureSet(&[_]Feature{ - .crypto, - .custom_cheap_as_move, - .dotprod, - .fp_armv8, - .fp16fml, - .fullfp16, - .fuse_aes, - .neon, - .perfmon, - .spe, - .use_postra_scheduler, - .v8_2a, - }), - }; result[@enumToInt(Feature.uaops)] = .{ .llvm_name = "uaops", .description = "Enable v8.2 UAO PState", @@ -1229,190 +921,325 @@ pub const all_features = blk: { }; pub const cpu = struct { - pub const apple_latest = Cpu{ + pub const apple_latest = CpuModel{ .name = "apple_latest", .llvm_name = "apple-latest", .features = featureSet(&[_]Feature{ .cyclone, }), }; - pub const cortex_a35 = Cpu{ + pub const cortex_a35 = CpuModel{ .name = "cortex_a35", .llvm_name = "cortex-a35", .features = featureSet(&[_]Feature{ - .a35, + .crc, + .crypto, + .perfmon, + .v8a, }), }; - pub const cortex_a53 = Cpu{ + pub const cortex_a53 = CpuModel{ .name = "cortex_a53", .llvm_name = "cortex-a53", .features = featureSet(&[_]Feature{ - .a53, + .balance_fp_ops, + .crc, + .crypto, + .custom_cheap_as_move, + .fuse_aes, + .perfmon, + .use_aa, + .use_postra_scheduler, + .v8a, }), }; - pub const cortex_a55 = Cpu{ + pub const cortex_a55 = CpuModel{ .name = "cortex_a55", .llvm_name = "cortex-a55", .features = featureSet(&[_]Feature{ - .a55, + .crypto, + .dotprod, + .fullfp16, + .fuse_aes, + .perfmon, + .rcpc, + .v8_2a, }), }; - pub const cortex_a57 = Cpu{ + pub const cortex_a57 = CpuModel{ .name = "cortex_a57", .llvm_name = "cortex-a57", .features = featureSet(&[_]Feature{ - .a57, + .balance_fp_ops, + .crc, + .crypto, + .custom_cheap_as_move, + .fuse_aes, + .fuse_literals, + .perfmon, + .predictable_select_expensive, + .use_postra_scheduler, + .v8a, }), }; - pub const cortex_a72 = Cpu{ + pub const cortex_a72 = CpuModel{ .name = "cortex_a72", .llvm_name = "cortex-a72", .features = featureSet(&[_]Feature{ - .a72, + .crc, + .crypto, + .fuse_aes, + .perfmon, + .v8a, }), }; - pub const cortex_a73 = Cpu{ + pub const cortex_a73 = CpuModel{ .name = "cortex_a73", .llvm_name = "cortex-a73", .features = featureSet(&[_]Feature{ - .a73, + .crc, + .crypto, + .fuse_aes, + .perfmon, + .v8a, }), }; - pub const cortex_a75 = Cpu{ + pub const cortex_a75 = CpuModel{ .name = "cortex_a75", .llvm_name = "cortex-a75", .features = featureSet(&[_]Feature{ - .a75, + .crypto, + .dotprod, + .fullfp16, + .fuse_aes, + .perfmon, + .rcpc, + .v8_2a, }), }; - pub const cortex_a76 = Cpu{ + pub const cortex_a76 = CpuModel{ .name = "cortex_a76", .llvm_name = "cortex-a76", .features = featureSet(&[_]Feature{ .a76, }), }; - pub const cortex_a76ae = Cpu{ + pub const cortex_a76ae = CpuModel{ .name = "cortex_a76ae", .llvm_name = "cortex-a76ae", .features = featureSet(&[_]Feature{ .a76, }), }; - pub const cyclone = Cpu{ + pub const cyclone = CpuModel{ .name = "cyclone", .llvm_name = "cyclone", .features = featureSet(&[_]Feature{ .cyclone, }), }; - pub const exynos_m1 = Cpu{ + pub const exynos_m1 = CpuModel{ .name = "exynos_m1", .llvm_name = "exynos-m1", .features = featureSet(&[_]Feature{ - .exynosm1, + .crc, + .crypto, + .exynos_cheap_as_move, + .force_32bit_jump_tables, + .fuse_aes, + .perfmon, + .slow_misaligned_128store, + .slow_paired_128, + .use_postra_scheduler, + .use_reciprocal_square_root, + .v8a, + .zcz_fp, }), }; - pub const exynos_m2 = Cpu{ + pub const exynos_m2 = CpuModel{ .name = "exynos_m2", .llvm_name = "exynos-m2", .features = featureSet(&[_]Feature{ - .exynosm2, + .crc, + .crypto, + .exynos_cheap_as_move, + .force_32bit_jump_tables, + .fuse_aes, + .perfmon, + .slow_misaligned_128store, + .slow_paired_128, + .use_postra_scheduler, + .v8a, + .zcz_fp, }), }; - pub const exynos_m3 = Cpu{ + pub const exynos_m3 = CpuModel{ .name = "exynos_m3", .llvm_name = "exynos-m3", .features = featureSet(&[_]Feature{ - .exynosm3, + .crc, + .crypto, + .exynos_cheap_as_move, + .force_32bit_jump_tables, + .fuse_address, + .fuse_aes, + .fuse_csel, + .fuse_literals, + .lsl_fast, + .perfmon, + .predictable_select_expensive, + .use_postra_scheduler, + .v8a, + .zcz_fp, }), }; - pub const exynos_m4 = Cpu{ + pub const exynos_m4 = CpuModel{ .name = "exynos_m4", .llvm_name = "exynos-m4", .features = featureSet(&[_]Feature{ .exynosm4, }), }; - pub const exynos_m5 = Cpu{ + pub const exynos_m5 = CpuModel{ .name = "exynos_m5", .llvm_name = "exynos-m5", .features = featureSet(&[_]Feature{ .exynosm4, }), }; - pub const falkor = Cpu{ + pub const falkor = CpuModel{ .name = "falkor", .llvm_name = "falkor", .features = featureSet(&[_]Feature{ - .falkor, + .crc, + .crypto, + .custom_cheap_as_move, + .lsl_fast, + .perfmon, + .predictable_select_expensive, + .rdm, + .slow_strqro_store, + .use_postra_scheduler, + .v8a, + .zcz, }), }; - pub const generic = Cpu{ + pub const generic = CpuModel{ .name = "generic", .llvm_name = "generic", .features = featureSet(&[_]Feature{ - .fp_armv8, .fuse_aes, - .neon, .perfmon, .use_postra_scheduler, + .v8a, }), }; - pub const kryo = Cpu{ + pub const kryo = CpuModel{ .name = "kryo", .llvm_name = "kryo", .features = featureSet(&[_]Feature{ - .kryo, + .crc, + .crypto, + .custom_cheap_as_move, + .lsl_fast, + .perfmon, + .predictable_select_expensive, + .use_postra_scheduler, + .zcz, + .v8a, }), }; - pub const saphira = Cpu{ + pub const saphira = CpuModel{ .name = "saphira", .llvm_name = "saphira", .features = featureSet(&[_]Feature{ - .saphira, + .crypto, + .custom_cheap_as_move, + .lsl_fast, + .perfmon, + .predictable_select_expensive, + .spe, + .use_postra_scheduler, + .v8_4a, + .zcz, }), }; - pub const thunderx = Cpu{ + pub const thunderx = CpuModel{ .name = "thunderx", .llvm_name = "thunderx", .features = featureSet(&[_]Feature{ - .thunderx, + .crc, + .crypto, + .perfmon, + .predictable_select_expensive, + .use_postra_scheduler, + .v8a, }), }; - pub const thunderx2t99 = Cpu{ + pub const thunderx2t99 = CpuModel{ .name = "thunderx2t99", .llvm_name = "thunderx2t99", .features = featureSet(&[_]Feature{ - .thunderx2t99, + .aggressive_fma, + .arith_bcc_fusion, + .crc, + .crypto, + .lse, + .predictable_select_expensive, + .use_postra_scheduler, + .v8_1a, }), }; - pub const thunderxt81 = Cpu{ + pub const thunderxt81 = CpuModel{ .name = "thunderxt81", .llvm_name = "thunderxt81", .features = featureSet(&[_]Feature{ - .thunderxt81, + .crc, + .crypto, + .perfmon, + .predictable_select_expensive, + .use_postra_scheduler, + .v8a, }), }; - pub const thunderxt83 = Cpu{ + pub const thunderxt83 = CpuModel{ .name = "thunderxt83", .llvm_name = "thunderxt83", .features = featureSet(&[_]Feature{ - .thunderxt83, + .crc, + .crypto, + .perfmon, + .predictable_select_expensive, + .use_postra_scheduler, + .v8a, }), }; - pub const thunderxt88 = Cpu{ + pub const thunderxt88 = CpuModel{ .name = "thunderxt88", .llvm_name = "thunderxt88", .features = featureSet(&[_]Feature{ - .thunderxt88, + .crc, + .crypto, + .perfmon, + .predictable_select_expensive, + .use_postra_scheduler, + .v8a, }), }; - pub const tsv110 = Cpu{ + pub const tsv110 = CpuModel{ .name = "tsv110", .llvm_name = "tsv110", .features = featureSet(&[_]Feature{ - .tsv110, + .crypto, + .custom_cheap_as_move, + .dotprod, + .fp16fml, + .fullfp16, + .fuse_aes, + .perfmon, + .spe, + .use_postra_scheduler, + .v8_2a, }), }; }; @@ -1420,7 +1247,7 @@ pub const cpu = struct { /// All aarch64 CPUs, sorted alphabetically by name. /// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1 /// compiler has inefficient memory and CPU usage, affecting build times. -pub const all_cpus = &[_]*const Cpu{ +pub const all_cpus = &[_]*const CpuModel{ &cpu.apple_latest, &cpu.cortex_a35, &cpu.cortex_a53, diff --git a/lib/std/target/amdgpu.zig b/lib/std/target/amdgpu.zig index 182b9fa453..e524dc12a2 100644 --- a/lib/std/target/amdgpu.zig +++ b/lib/std/target/amdgpu.zig @@ -1,5 +1,6 @@ const std = @import("../std.zig"); -const Cpu = std.Target.Cpu; +const CpuFeature = std.Target.Cpu.Feature; +const CpuModel = std.Target.Cpu.Model; pub const Feature = enum { @"16_bit_insts", @@ -111,12 +112,12 @@ pub const Feature = enum { xnack, }; -pub usingnamespace Cpu.Feature.feature_set_fns(Feature); +pub usingnamespace CpuFeature.feature_set_fns(Feature); pub const all_features = blk: { const len = @typeInfo(Feature).Enum.fields.len; - std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count); - var result: [len]Cpu.Feature = undefined; + std.debug.assert(len <= CpuFeature.Set.needed_bit_count); + var result: [len]CpuFeature = undefined; result[@enumToInt(Feature.@"16_bit_insts")] = .{ .llvm_name = "16-bit-insts", .description = "Has i16/f16 instructions", @@ -778,7 +779,7 @@ pub const all_features = blk: { }; pub const cpu = struct { - pub const bonaire = Cpu{ + pub const bonaire = CpuModel{ .name = "bonaire", .llvm_name = "bonaire", .features = featureSet(&[_]Feature{ @@ -788,7 +789,7 @@ pub const cpu = struct { .sea_islands, }), }; - pub const carrizo = Cpu{ + pub const carrizo = CpuModel{ .name = "carrizo", .llvm_name = "carrizo", .features = featureSet(&[_]Feature{ @@ -801,7 +802,7 @@ pub const cpu = struct { .xnack, }), }; - pub const fiji = Cpu{ + pub const fiji = CpuModel{ .name = "fiji", .llvm_name = "fiji", .features = featureSet(&[_]Feature{ @@ -812,14 +813,14 @@ pub const cpu = struct { .volcanic_islands, }), }; - pub const generic = Cpu{ + pub const generic = CpuModel{ .name = "generic", .llvm_name = "generic", .features = featureSet(&[_]Feature{ .wavefrontsize64, }), }; - pub const generic_hsa = Cpu{ + pub const generic_hsa = CpuModel{ .name = "generic_hsa", .llvm_name = "generic-hsa", .features = featureSet(&[_]Feature{ @@ -827,7 +828,7 @@ pub const cpu = struct { .wavefrontsize64, }), }; - pub const gfx1010 = Cpu{ + pub const gfx1010 = CpuModel{ .name = "gfx1010", .llvm_name = "gfx1010", .features = featureSet(&[_]Feature{ @@ -853,7 +854,7 @@ pub const cpu = struct { .wavefrontsize32, }), }; - pub const gfx1011 = Cpu{ + pub const gfx1011 = CpuModel{ .name = "gfx1011", .llvm_name = "gfx1011", .features = featureSet(&[_]Feature{ @@ -882,7 +883,7 @@ pub const cpu = struct { .wavefrontsize32, }), }; - pub const gfx1012 = Cpu{ + pub const gfx1012 = CpuModel{ .name = "gfx1012", .llvm_name = "gfx1012", .features = featureSet(&[_]Feature{ @@ -912,7 +913,7 @@ pub const cpu = struct { .wavefrontsize32, }), }; - pub const gfx600 = Cpu{ + pub const gfx600 = CpuModel{ .name = "gfx600", .llvm_name = "gfx600", .features = featureSet(&[_]Feature{ @@ -924,7 +925,7 @@ pub const cpu = struct { .southern_islands, }), }; - pub const gfx601 = Cpu{ + pub const gfx601 = CpuModel{ .name = "gfx601", .llvm_name = "gfx601", .features = featureSet(&[_]Feature{ @@ -934,7 +935,7 @@ pub const cpu = struct { .southern_islands, }), }; - pub const gfx700 = Cpu{ + pub const gfx700 = CpuModel{ .name = "gfx700", .llvm_name = "gfx700", .features = featureSet(&[_]Feature{ @@ -944,7 +945,7 @@ pub const cpu = struct { .sea_islands, }), }; - pub const gfx701 = Cpu{ + pub const gfx701 = CpuModel{ .name = "gfx701", .llvm_name = "gfx701", .features = featureSet(&[_]Feature{ @@ -956,7 +957,7 @@ pub const cpu = struct { .sea_islands, }), }; - pub const gfx702 = Cpu{ + pub const gfx702 = CpuModel{ .name = "gfx702", .llvm_name = "gfx702", .features = featureSet(&[_]Feature{ @@ -967,7 +968,7 @@ pub const cpu = struct { .sea_islands, }), }; - pub const gfx703 = Cpu{ + pub const gfx703 = CpuModel{ .name = "gfx703", .llvm_name = "gfx703", .features = featureSet(&[_]Feature{ @@ -977,7 +978,7 @@ pub const cpu = struct { .sea_islands, }), }; - pub const gfx704 = Cpu{ + pub const gfx704 = CpuModel{ .name = "gfx704", .llvm_name = "gfx704", .features = featureSet(&[_]Feature{ @@ -987,7 +988,7 @@ pub const cpu = struct { .sea_islands, }), }; - pub const gfx801 = Cpu{ + pub const gfx801 = CpuModel{ .name = "gfx801", .llvm_name = "gfx801", .features = featureSet(&[_]Feature{ @@ -1000,7 +1001,7 @@ pub const cpu = struct { .xnack, }), }; - pub const gfx802 = Cpu{ + pub const gfx802 = CpuModel{ .name = "gfx802", .llvm_name = "gfx802", .features = featureSet(&[_]Feature{ @@ -1012,7 +1013,7 @@ pub const cpu = struct { .volcanic_islands, }), }; - pub const gfx803 = Cpu{ + pub const gfx803 = CpuModel{ .name = "gfx803", .llvm_name = "gfx803", .features = featureSet(&[_]Feature{ @@ -1023,7 +1024,7 @@ pub const cpu = struct { .volcanic_islands, }), }; - pub const gfx810 = Cpu{ + pub const gfx810 = CpuModel{ .name = "gfx810", .llvm_name = "gfx810", .features = featureSet(&[_]Feature{ @@ -1033,7 +1034,7 @@ pub const cpu = struct { .xnack, }), }; - pub const gfx900 = Cpu{ + pub const gfx900 = CpuModel{ .name = "gfx900", .llvm_name = "gfx900", .features = featureSet(&[_]Feature{ @@ -1045,7 +1046,7 @@ pub const cpu = struct { .no_xnack_support, }), }; - pub const gfx902 = Cpu{ + pub const gfx902 = CpuModel{ .name = "gfx902", .llvm_name = "gfx902", .features = featureSet(&[_]Feature{ @@ -1057,7 +1058,7 @@ pub const cpu = struct { .xnack, }), }; - pub const gfx904 = Cpu{ + pub const gfx904 = CpuModel{ .name = "gfx904", .llvm_name = "gfx904", .features = featureSet(&[_]Feature{ @@ -1069,7 +1070,7 @@ pub const cpu = struct { .no_xnack_support, }), }; - pub const gfx906 = Cpu{ + pub const gfx906 = CpuModel{ .name = "gfx906", .llvm_name = "gfx906", .features = featureSet(&[_]Feature{ @@ -1084,7 +1085,7 @@ pub const cpu = struct { .no_xnack_support, }), }; - pub const gfx908 = Cpu{ + pub const gfx908 = CpuModel{ .name = "gfx908", .llvm_name = "gfx908", .features = featureSet(&[_]Feature{ @@ -1106,7 +1107,7 @@ pub const cpu = struct { .sram_ecc, }), }; - pub const gfx909 = Cpu{ + pub const gfx909 = CpuModel{ .name = "gfx909", .llvm_name = "gfx909", .features = featureSet(&[_]Feature{ @@ -1117,7 +1118,7 @@ pub const cpu = struct { .xnack, }), }; - pub const hainan = Cpu{ + pub const hainan = CpuModel{ .name = "hainan", .llvm_name = "hainan", .features = featureSet(&[_]Feature{ @@ -1127,7 +1128,7 @@ pub const cpu = struct { .southern_islands, }), }; - pub const hawaii = Cpu{ + pub const hawaii = CpuModel{ .name = "hawaii", .llvm_name = "hawaii", .features = featureSet(&[_]Feature{ @@ -1139,7 +1140,7 @@ pub const cpu = struct { .sea_islands, }), }; - pub const iceland = Cpu{ + pub const iceland = CpuModel{ .name = "iceland", .llvm_name = "iceland", .features = featureSet(&[_]Feature{ @@ -1151,7 +1152,7 @@ pub const cpu = struct { .volcanic_islands, }), }; - pub const kabini = Cpu{ + pub const kabini = CpuModel{ .name = "kabini", .llvm_name = "kabini", .features = featureSet(&[_]Feature{ @@ -1161,7 +1162,7 @@ pub const cpu = struct { .sea_islands, }), }; - pub const kaveri = Cpu{ + pub const kaveri = CpuModel{ .name = "kaveri", .llvm_name = "kaveri", .features = featureSet(&[_]Feature{ @@ -1171,7 +1172,7 @@ pub const cpu = struct { .sea_islands, }), }; - pub const mullins = Cpu{ + pub const mullins = CpuModel{ .name = "mullins", .llvm_name = "mullins", .features = featureSet(&[_]Feature{ @@ -1181,7 +1182,7 @@ pub const cpu = struct { .sea_islands, }), }; - pub const oland = Cpu{ + pub const oland = CpuModel{ .name = "oland", .llvm_name = "oland", .features = featureSet(&[_]Feature{ @@ -1191,7 +1192,7 @@ pub const cpu = struct { .southern_islands, }), }; - pub const pitcairn = Cpu{ + pub const pitcairn = CpuModel{ .name = "pitcairn", .llvm_name = "pitcairn", .features = featureSet(&[_]Feature{ @@ -1201,7 +1202,7 @@ pub const cpu = struct { .southern_islands, }), }; - pub const polaris10 = Cpu{ + pub const polaris10 = CpuModel{ .name = "polaris10", .llvm_name = "polaris10", .features = featureSet(&[_]Feature{ @@ -1212,7 +1213,7 @@ pub const cpu = struct { .volcanic_islands, }), }; - pub const polaris11 = Cpu{ + pub const polaris11 = CpuModel{ .name = "polaris11", .llvm_name = "polaris11", .features = featureSet(&[_]Feature{ @@ -1223,7 +1224,7 @@ pub const cpu = struct { .volcanic_islands, }), }; - pub const stoney = Cpu{ + pub const stoney = CpuModel{ .name = "stoney", .llvm_name = "stoney", .features = featureSet(&[_]Feature{ @@ -1233,7 +1234,7 @@ pub const cpu = struct { .xnack, }), }; - pub const tahiti = Cpu{ + pub const tahiti = CpuModel{ .name = "tahiti", .llvm_name = "tahiti", .features = featureSet(&[_]Feature{ @@ -1245,7 +1246,7 @@ pub const cpu = struct { .southern_islands, }), }; - pub const tonga = Cpu{ + pub const tonga = CpuModel{ .name = "tonga", .llvm_name = "tonga", .features = featureSet(&[_]Feature{ @@ -1257,7 +1258,7 @@ pub const cpu = struct { .volcanic_islands, }), }; - pub const verde = Cpu{ + pub const verde = CpuModel{ .name = "verde", .llvm_name = "verde", .features = featureSet(&[_]Feature{ @@ -1272,7 +1273,7 @@ pub const cpu = struct { /// All amdgpu CPUs, sorted alphabetically by name. /// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1 /// compiler has inefficient memory and CPU usage, affecting build times. -pub const all_cpus = &[_]*const Cpu{ +pub const all_cpus = &[_]*const CpuModel{ &cpu.bonaire, &cpu.carrizo, &cpu.fiji, diff --git a/lib/std/target/arm.zig b/lib/std/target/arm.zig index 48e9576004..e9b95ee4d3 100644 --- a/lib/std/target/arm.zig +++ b/lib/std/target/arm.zig @@ -390,14 +390,14 @@ pub const all_features = blk: { .llvm_name = "iwmmxt", .description = "ARMv5te architecture", .dependencies = featureSet(&[_]Feature{ - .armv5te, + .v5te, }), }; result[@enumToInt(Feature.iwmmxt2)] = .{ .llvm_name = "iwmmxt2", .description = "ARMv5te architecture", .dependencies = featureSet(&[_]Feature{ - .armv5te, + .v5te, }), }; result[@enumToInt(Feature.lob)] = .{ @@ -1089,7 +1089,7 @@ pub const all_features = blk: { .llvm_name = "xscale", .description = "ARMv5te architecture", .dependencies = featureSet(&[_]Feature{ - .armv5te, + .v5te, }), }; result[@enumToInt(Feature.zcz)] = .{ @@ -1110,49 +1110,49 @@ pub const cpu = struct { .name = "arm1020e", .llvm_name = "arm1020e", .features = featureSet(&[_]Feature{ - .armv5te, + .v5te, }), }; pub const arm1020t = CpuModel{ .name = "arm1020t", .llvm_name = "arm1020t", .features = featureSet(&[_]Feature{ - .armv5t, + .v5t, }), }; pub const arm1022e = CpuModel{ .name = "arm1022e", .llvm_name = "arm1022e", .features = featureSet(&[_]Feature{ - .armv5te, + .v5te, }), }; pub const arm10e = CpuModel{ .name = "arm10e", .llvm_name = "arm10e", .features = featureSet(&[_]Feature{ - .armv5te, + .v5te, }), }; pub const arm10tdmi = CpuModel{ .name = "arm10tdmi", .llvm_name = "arm10tdmi", .features = featureSet(&[_]Feature{ - .armv5t, + .v5t, }), }; pub const arm1136j_s = CpuModel{ .name = "arm1136j_s", .llvm_name = "arm1136j-s", .features = featureSet(&[_]Feature{ - .armv6, + .v6, }), }; pub const arm1136jf_s = CpuModel{ .name = "arm1136jf_s", .llvm_name = "arm1136jf-s", .features = featureSet(&[_]Feature{ - .armv6, + .v6, .slowfpvmlx, .vfp2, }), @@ -1161,14 +1161,14 @@ pub const cpu = struct { .name = "arm1156t2_s", .llvm_name = "arm1156t2-s", .features = featureSet(&[_]Feature{ - .armv6t2, + .v6t2, }), }; pub const arm1156t2f_s = CpuModel{ .name = "arm1156t2f_s", .llvm_name = "arm1156t2f-s", .features = featureSet(&[_]Feature{ - .armv6t2, + .v6t2, .slowfpvmlx, .vfp2, }), @@ -1177,21 +1177,21 @@ pub const cpu = struct { .name = "arm1176j_s", .llvm_name = "arm1176j-s", .features = featureSet(&[_]Feature{ - .armv6kz, + .v6kz, }), }; pub const arm1176jz_s = CpuModel{ .name = "arm1176jz_s", .llvm_name = "arm1176jz-s", .features = featureSet(&[_]Feature{ - .armv6kz, + .v6kz, }), }; pub const arm1176jzf_s = CpuModel{ .name = "arm1176jzf_s", .llvm_name = "arm1176jzf-s", .features = featureSet(&[_]Feature{ - .armv6kz, + .v6kz, .slowfpvmlx, .vfp2, }), @@ -1200,134 +1200,133 @@ pub const cpu = struct { .name = "arm710t", .llvm_name = "arm710t", .features = featureSet(&[_]Feature{ - .armv4t, + .v4t, }), }; pub const arm720t = CpuModel{ .name = "arm720t", .llvm_name = "arm720t", .features = featureSet(&[_]Feature{ - .armv4t, + .v4t, }), }; pub const arm7tdmi = CpuModel{ .name = "arm7tdmi", .llvm_name = "arm7tdmi", .features = featureSet(&[_]Feature{ - .armv4t, + .v4t, }), }; pub const arm7tdmi_s = CpuModel{ .name = "arm7tdmi_s", .llvm_name = "arm7tdmi-s", .features = featureSet(&[_]Feature{ - .armv4t, + .v4t, }), }; pub const arm8 = CpuModel{ .name = "arm8", .llvm_name = "arm8", .features = featureSet(&[_]Feature{ - .armv4, + .v4, }), }; pub const arm810 = CpuModel{ .name = "arm810", .llvm_name = "arm810", .features = featureSet(&[_]Feature{ - .armv4, + .v4, }), }; pub const arm9 = CpuModel{ .name = "arm9", .llvm_name = "arm9", .features = featureSet(&[_]Feature{ - .armv4t, + .v4t, }), }; pub const arm920 = CpuModel{ .name = "arm920", .llvm_name = "arm920", .features = featureSet(&[_]Feature{ - .armv4t, + .v4t, }), }; pub const arm920t = CpuModel{ .name = "arm920t", .llvm_name = "arm920t", .features = featureSet(&[_]Feature{ - .armv4t, + .v4t, }), }; pub const arm922t = CpuModel{ .name = "arm922t", .llvm_name = "arm922t", .features = featureSet(&[_]Feature{ - .armv4t, + .v4t, }), }; pub const arm926ej_s = CpuModel{ .name = "arm926ej_s", .llvm_name = "arm926ej-s", .features = featureSet(&[_]Feature{ - .armv5te, + .v5te, }), }; pub const arm940t = CpuModel{ .name = "arm940t", .llvm_name = "arm940t", .features = featureSet(&[_]Feature{ - .armv4t, + .v4t, }), }; pub const arm946e_s = CpuModel{ .name = "arm946e_s", .llvm_name = "arm946e-s", .features = featureSet(&[_]Feature{ - .armv5te, + .v5te, }), }; pub const arm966e_s = CpuModel{ .name = "arm966e_s", .llvm_name = "arm966e-s", .features = featureSet(&[_]Feature{ - .armv5te, + .v5te, }), }; pub const arm968e_s = CpuModel{ .name = "arm968e_s", .llvm_name = "arm968e-s", .features = featureSet(&[_]Feature{ - .armv5te, + .v5te, }), }; pub const arm9e = CpuModel{ .name = "arm9e", .llvm_name = "arm9e", .features = featureSet(&[_]Feature{ - .armv5te, + .v5te, }), }; pub const arm9tdmi = CpuModel{ .name = "arm9tdmi", .llvm_name = "arm9tdmi", .features = featureSet(&[_]Feature{ - .armv4t, + .v4t, }), }; pub const baseline = CpuModel{ .name = "baseline", .llvm_name = "generic", .features = featureSet(&[_]Feature{ - .armv6_m, + .v6m, }), }; pub const cortex_a12 = CpuModel{ .name = "cortex_a12", .llvm_name = "cortex-a12", .features = featureSet(&[_]Feature{ - .a12, - .armv7_a, + .v7a, .avoid_partial_cpsr, .mp, .ret_addr_stack, @@ -1341,7 +1340,7 @@ pub const cpu = struct { .name = "cortex_a15", .llvm_name = "cortex-a15", .features = featureSet(&[_]Feature{ - .armv7_a, + .v7a, .avoid_partial_cpsr, .dont_widen_vmovs, .mp, @@ -1358,7 +1357,7 @@ pub const cpu = struct { .name = "cortex_a17", .llvm_name = "cortex-a17", .features = featureSet(&[_]Feature{ - .armv7_a, + .v7a, .avoid_partial_cpsr, .mp, .ret_addr_stack, @@ -1372,7 +1371,7 @@ pub const cpu = struct { .name = "cortex_a32", .llvm_name = "cortex-a32", .features = featureSet(&[_]Feature{ - .armv8_a, + .v8a, .crc, .crypto, .hwdiv, @@ -1383,7 +1382,7 @@ pub const cpu = struct { .name = "cortex_a35", .llvm_name = "cortex-a35", .features = featureSet(&[_]Feature{ - .armv8_a, + .v8a, .crc, .crypto, .hwdiv, @@ -1394,7 +1393,7 @@ pub const cpu = struct { .name = "cortex_a5", .llvm_name = "cortex-a5", .features = featureSet(&[_]Feature{ - .armv7_a, + .v7a, .mp, .ret_addr_stack, .slow_fp_brcc, @@ -1408,7 +1407,7 @@ pub const cpu = struct { .name = "cortex_a53", .llvm_name = "cortex-a53", .features = featureSet(&[_]Feature{ - .armv8_a, + .v8a, .crc, .crypto, .fpao, @@ -1420,7 +1419,7 @@ pub const cpu = struct { .name = "cortex_a55", .llvm_name = "cortex-a55", .features = featureSet(&[_]Feature{ - .armv8_2_a, + .v8_2a, .dotprod, .hwdiv, .hwdiv_arm, @@ -1430,7 +1429,7 @@ pub const cpu = struct { .name = "cortex_a57", .llvm_name = "cortex-a57", .features = featureSet(&[_]Feature{ - .armv8_a, + .v8a, .avoid_partial_cpsr, .cheap_predicable_cpsr, .crc, @@ -1444,7 +1443,7 @@ pub const cpu = struct { .name = "cortex_a7", .llvm_name = "cortex-a7", .features = featureSet(&[_]Feature{ - .armv7_a, + .v7a, .mp, .ret_addr_stack, .slow_fp_brcc, @@ -1460,7 +1459,7 @@ pub const cpu = struct { .name = "cortex_a72", .llvm_name = "cortex-a72", .features = featureSet(&[_]Feature{ - .armv8_a, + .v8a, .crc, .crypto, .hwdiv, @@ -1471,7 +1470,7 @@ pub const cpu = struct { .name = "cortex_a73", .llvm_name = "cortex-a73", .features = featureSet(&[_]Feature{ - .armv8_a, + .v8a, .crc, .crypto, .hwdiv, @@ -1482,7 +1481,7 @@ pub const cpu = struct { .name = "cortex_a75", .llvm_name = "cortex-a75", .features = featureSet(&[_]Feature{ - .armv8_2_a, + .v8_2a, .dotprod, .hwdiv, .hwdiv_arm, @@ -1493,7 +1492,7 @@ pub const cpu = struct { .llvm_name = "cortex-a76", .features = featureSet(&[_]Feature{ .a76, - .armv8_2_a, + .v8_2a, .crc, .crypto, .dotprod, @@ -1507,7 +1506,7 @@ pub const cpu = struct { .llvm_name = "cortex-a76ae", .features = featureSet(&[_]Feature{ .a76, - .armv8_2_a, + .v8_2a, .crc, .crypto, .dotprod, @@ -1520,7 +1519,7 @@ pub const cpu = struct { .name = "cortex_a8", .llvm_name = "cortex-a8", .features = featureSet(&[_]Feature{ - .armv7_a, + .v7a, .nonpipelined_vfp, .ret_addr_stack, .slow_fp_brcc, @@ -1534,7 +1533,7 @@ pub const cpu = struct { .name = "cortex_a9", .llvm_name = "cortex-a9", .features = featureSet(&[_]Feature{ - .armv7_a, + .v7a, .avoid_partial_cpsr, .expand_fp_mlx, .fp16, @@ -1553,28 +1552,28 @@ pub const cpu = struct { .name = "cortex_m0", .llvm_name = "cortex-m0", .features = featureSet(&[_]Feature{ - .armv6_m, + .v6m, }), }; pub const cortex_m0plus = CpuModel{ .name = "cortex_m0plus", .llvm_name = "cortex-m0plus", .features = featureSet(&[_]Feature{ - .armv6_m, + .v6m, }), }; pub const cortex_m1 = CpuModel{ .name = "cortex_m1", .llvm_name = "cortex-m1", .features = featureSet(&[_]Feature{ - .armv6_m, + .v6m, }), }; pub const cortex_m23 = CpuModel{ .name = "cortex_m23", .llvm_name = "cortex-m23", .features = featureSet(&[_]Feature{ - .armv8_m_base, + .v8m, .no_movt, }), }; @@ -1582,7 +1581,7 @@ pub const cpu = struct { .name = "cortex_m3", .llvm_name = "cortex-m3", .features = featureSet(&[_]Feature{ - .armv7_m, + .v7m, .loop_align, .m3, .no_branch_predictor, @@ -1594,7 +1593,7 @@ pub const cpu = struct { .name = "cortex_m33", .llvm_name = "cortex-m33", .features = featureSet(&[_]Feature{ - .armv8_m_main, + .v8m_main, .dsp, .fp_armv8d16sp, .loop_align, @@ -1608,7 +1607,7 @@ pub const cpu = struct { .name = "cortex_m35p", .llvm_name = "cortex-m35p", .features = featureSet(&[_]Feature{ - .armv8_m_main, + .v8m_main, .dsp, .fp_armv8d16sp, .loop_align, @@ -1622,7 +1621,7 @@ pub const cpu = struct { .name = "cortex_m4", .llvm_name = "cortex-m4", .features = featureSet(&[_]Feature{ - .armv7e_m, + .v7em, .loop_align, .no_branch_predictor, .slowfpvmlx, @@ -1635,7 +1634,7 @@ pub const cpu = struct { .name = "cortex_m7", .llvm_name = "cortex-m7", .features = featureSet(&[_]Feature{ - .armv7e_m, + .v7em, .fp_armv8d16, }), }; @@ -1643,7 +1642,7 @@ pub const cpu = struct { .name = "cortex_r4", .llvm_name = "cortex-r4", .features = featureSet(&[_]Feature{ - .armv7_r, + .v7r, .avoid_partial_cpsr, .r4, .ret_addr_stack, @@ -1653,7 +1652,7 @@ pub const cpu = struct { .name = "cortex_r4f", .llvm_name = "cortex-r4f", .features = featureSet(&[_]Feature{ - .armv7_r, + .v7r, .avoid_partial_cpsr, .r4, .ret_addr_stack, @@ -1666,7 +1665,7 @@ pub const cpu = struct { .name = "cortex_r5", .llvm_name = "cortex-r5", .features = featureSet(&[_]Feature{ - .armv7_r, + .v7r, .avoid_partial_cpsr, .hwdiv_arm, .ret_addr_stack, @@ -1679,7 +1678,7 @@ pub const cpu = struct { .name = "cortex_r52", .llvm_name = "cortex-r52", .features = featureSet(&[_]Feature{ - .armv8_r, + .v8r, .fpao, .use_aa, .use_misched, @@ -1689,7 +1688,7 @@ pub const cpu = struct { .name = "cortex_r7", .llvm_name = "cortex-r7", .features = featureSet(&[_]Feature{ - .armv7_r, + .v7r, .avoid_partial_cpsr, .fp16, .hwdiv_arm, @@ -1704,7 +1703,7 @@ pub const cpu = struct { .name = "cortex_r8", .llvm_name = "cortex-r8", .features = featureSet(&[_]Feature{ - .armv7_r, + .v7r, .avoid_partial_cpsr, .fp16, .hwdiv_arm, @@ -1719,7 +1718,7 @@ pub const cpu = struct { .name = "cyclone", .llvm_name = "cyclone", .features = featureSet(&[_]Feature{ - .armv8_a, + .v8a, .avoid_movs_shop, .avoid_partial_cpsr, .crypto, @@ -1740,14 +1739,14 @@ pub const cpu = struct { .name = "ep9312", .llvm_name = "ep9312", .features = featureSet(&[_]Feature{ - .armv4t, + .v4t, }), }; pub const exynos_m1 = CpuModel{ .name = "exynos_m1", .llvm_name = "exynos-m1", .features = featureSet(&[_]Feature{ - .armv8_a, + .v8a, .exynos, }), }; @@ -1755,7 +1754,7 @@ pub const cpu = struct { .name = "exynos_m2", .llvm_name = "exynos-m2", .features = featureSet(&[_]Feature{ - .armv8_a, + .v8a, .exynos, }), }; @@ -1763,7 +1762,7 @@ pub const cpu = struct { .name = "exynos_m3", .llvm_name = "exynos-m3", .features = featureSet(&[_]Feature{ - .armv8_a, + .v8a, .exynos, }), }; @@ -1771,7 +1770,7 @@ pub const cpu = struct { .name = "exynos_m4", .llvm_name = "exynos-m4", .features = featureSet(&[_]Feature{ - .armv8_2_a, + .v8_2a, .dotprod, .exynos, .fullfp16, @@ -1781,10 +1780,10 @@ pub const cpu = struct { .name = "exynos_m5", .llvm_name = "exynos-m5", .features = featureSet(&[_]Feature{ - .armv8_2_a, .dotprod, .exynos, .fullfp16, + .v8_2a, }), }; pub const generic = CpuModel{ @@ -1796,20 +1795,20 @@ pub const cpu = struct { .name = "iwmmxt", .llvm_name = "iwmmxt", .features = featureSet(&[_]Feature{ - .armv5te, + .v5te, }), }; pub const krait = CpuModel{ .name = "krait", .llvm_name = "krait", .features = featureSet(&[_]Feature{ - .armv7_a, .avoid_partial_cpsr, .fp16, .hwdiv, .hwdiv_arm, .muxed_units, .ret_addr_stack, + .v7a, .vfp4, .vldn_align, .vmlx_forwarding, @@ -1819,19 +1818,18 @@ pub const cpu = struct { .name = "kryo", .llvm_name = "kryo", .features = featureSet(&[_]Feature{ - .armv8_a, .crc, .crypto, .hwdiv, .hwdiv_arm, - .kryo, + .v8a, }), }; pub const mpcore = CpuModel{ .name = "mpcore", .llvm_name = "mpcore", .features = featureSet(&[_]Feature{ - .armv6k, + .v6k, .slowfpvmlx, .vfp2, }), @@ -1840,21 +1838,21 @@ pub const cpu = struct { .name = "mpcorenovfp", .llvm_name = "mpcorenovfp", .features = featureSet(&[_]Feature{ - .armv6k, + .v6k, }), }; pub const sc000 = CpuModel{ .name = "sc000", .llvm_name = "sc000", .features = featureSet(&[_]Feature{ - .armv6_m, + .v6m, }), }; pub const sc300 = CpuModel{ .name = "sc300", .llvm_name = "sc300", .features = featureSet(&[_]Feature{ - .armv7_m, + .v7m, .m3, .no_branch_predictor, .use_aa, @@ -1865,35 +1863,35 @@ pub const cpu = struct { .name = "strongarm", .llvm_name = "strongarm", .features = featureSet(&[_]Feature{ - .armv4, + .v4, }), }; pub const strongarm110 = CpuModel{ .name = "strongarm110", .llvm_name = "strongarm110", .features = featureSet(&[_]Feature{ - .armv4, + .v4, }), }; pub const strongarm1100 = CpuModel{ .name = "strongarm1100", .llvm_name = "strongarm1100", .features = featureSet(&[_]Feature{ - .armv4, + .v4, }), }; pub const strongarm1110 = CpuModel{ .name = "strongarm1110", .llvm_name = "strongarm1110", .features = featureSet(&[_]Feature{ - .armv4, + .v4, }), }; pub const swift = CpuModel{ .name = "swift", .llvm_name = "swift", .features = featureSet(&[_]Feature{ - .armv7_a, + .v7a, .avoid_movs_shop, .avoid_partial_cpsr, .disable_postra_scheduler, @@ -1920,7 +1918,7 @@ pub const cpu = struct { .name = "xscale", .llvm_name = "xscale", .features = featureSet(&[_]Feature{ - .armv5te, + .v5te, }), }; }; diff --git a/lib/std/target/avr.zig b/lib/std/target/avr.zig index 3902a3860f..4d0da9b2c3 100644 --- a/lib/std/target/avr.zig +++ b/lib/std/target/avr.zig @@ -1,5 +1,6 @@ const std = @import("../std.zig"); -const Cpu = std.Target.Cpu; +const CpuFeature = std.Target.Cpu.Feature; +const CpuModel = std.Target.Cpu.Model; pub const Feature = enum { addsubiw, @@ -37,12 +38,12 @@ pub const Feature = enum { xmegau, }; -pub usingnamespace Cpu.Feature.feature_set_fns(Feature); +pub usingnamespace CpuFeature.feature_set_fns(Feature); pub const all_features = blk: { const len = @typeInfo(Feature).Enum.fields.len; - std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count); - var result: [len]Cpu.Feature = undefined; + std.debug.assert(len <= CpuFeature.Set.needed_bit_count); + var result: [len]CpuFeature = undefined; result[@enumToInt(Feature.addsubiw)] = .{ .llvm_name = "addsubiw", .description = "Enable 16-bit register-immediate addition and subtraction instructions", @@ -293,28 +294,28 @@ pub const all_features = blk: { }; pub const cpu = struct { - pub const at43usb320 = Cpu{ + pub const at43usb320 = CpuModel{ .name = "at43usb320", .llvm_name = "at43usb320", .features = featureSet(&[_]Feature{ .avr31, }), }; - pub const at43usb355 = Cpu{ + pub const at43usb355 = CpuModel{ .name = "at43usb355", .llvm_name = "at43usb355", .features = featureSet(&[_]Feature{ .avr3, }), }; - pub const at76c711 = Cpu{ + pub const at76c711 = CpuModel{ .name = "at76c711", .llvm_name = "at76c711", .features = featureSet(&[_]Feature{ .avr3, }), }; - pub const at86rf401 = Cpu{ + pub const at86rf401 = CpuModel{ .name = "at86rf401", .llvm_name = "at86rf401", .features = featureSet(&[_]Feature{ @@ -323,217 +324,217 @@ pub const cpu = struct { .movw, }), }; - pub const at90c8534 = Cpu{ + pub const at90c8534 = CpuModel{ .name = "at90c8534", .llvm_name = "at90c8534", .features = featureSet(&[_]Feature{ .avr2, }), }; - pub const at90can128 = Cpu{ + pub const at90can128 = CpuModel{ .name = "at90can128", .llvm_name = "at90can128", .features = featureSet(&[_]Feature{ .avr51, }), }; - pub const at90can32 = Cpu{ + pub const at90can32 = CpuModel{ .name = "at90can32", .llvm_name = "at90can32", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const at90can64 = Cpu{ + pub const at90can64 = CpuModel{ .name = "at90can64", .llvm_name = "at90can64", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const at90pwm1 = Cpu{ + pub const at90pwm1 = CpuModel{ .name = "at90pwm1", .llvm_name = "at90pwm1", .features = featureSet(&[_]Feature{ .avr4, }), }; - pub const at90pwm161 = Cpu{ + pub const at90pwm161 = CpuModel{ .name = "at90pwm161", .llvm_name = "at90pwm161", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const at90pwm2 = Cpu{ + pub const at90pwm2 = CpuModel{ .name = "at90pwm2", .llvm_name = "at90pwm2", .features = featureSet(&[_]Feature{ .avr4, }), }; - pub const at90pwm216 = Cpu{ + pub const at90pwm216 = CpuModel{ .name = "at90pwm216", .llvm_name = "at90pwm216", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const at90pwm2b = Cpu{ + pub const at90pwm2b = CpuModel{ .name = "at90pwm2b", .llvm_name = "at90pwm2b", .features = featureSet(&[_]Feature{ .avr4, }), }; - pub const at90pwm3 = Cpu{ + pub const at90pwm3 = CpuModel{ .name = "at90pwm3", .llvm_name = "at90pwm3", .features = featureSet(&[_]Feature{ .avr4, }), }; - pub const at90pwm316 = Cpu{ + pub const at90pwm316 = CpuModel{ .name = "at90pwm316", .llvm_name = "at90pwm316", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const at90pwm3b = Cpu{ + pub const at90pwm3b = CpuModel{ .name = "at90pwm3b", .llvm_name = "at90pwm3b", .features = featureSet(&[_]Feature{ .avr4, }), }; - pub const at90pwm81 = Cpu{ + pub const at90pwm81 = CpuModel{ .name = "at90pwm81", .llvm_name = "at90pwm81", .features = featureSet(&[_]Feature{ .avr4, }), }; - pub const at90s1200 = Cpu{ + pub const at90s1200 = CpuModel{ .name = "at90s1200", .llvm_name = "at90s1200", .features = featureSet(&[_]Feature{ .avr0, }), }; - pub const at90s2313 = Cpu{ + pub const at90s2313 = CpuModel{ .name = "at90s2313", .llvm_name = "at90s2313", .features = featureSet(&[_]Feature{ .avr2, }), }; - pub const at90s2323 = Cpu{ + pub const at90s2323 = CpuModel{ .name = "at90s2323", .llvm_name = "at90s2323", .features = featureSet(&[_]Feature{ .avr2, }), }; - pub const at90s2333 = Cpu{ + pub const at90s2333 = CpuModel{ .name = "at90s2333", .llvm_name = "at90s2333", .features = featureSet(&[_]Feature{ .avr2, }), }; - pub const at90s2343 = Cpu{ + pub const at90s2343 = CpuModel{ .name = "at90s2343", .llvm_name = "at90s2343", .features = featureSet(&[_]Feature{ .avr2, }), }; - pub const at90s4414 = Cpu{ + pub const at90s4414 = CpuModel{ .name = "at90s4414", .llvm_name = "at90s4414", .features = featureSet(&[_]Feature{ .avr2, }), }; - pub const at90s4433 = Cpu{ + pub const at90s4433 = CpuModel{ .name = "at90s4433", .llvm_name = "at90s4433", .features = featureSet(&[_]Feature{ .avr2, }), }; - pub const at90s4434 = Cpu{ + pub const at90s4434 = CpuModel{ .name = "at90s4434", .llvm_name = "at90s4434", .features = featureSet(&[_]Feature{ .avr2, }), }; - pub const at90s8515 = Cpu{ + pub const at90s8515 = CpuModel{ .name = "at90s8515", .llvm_name = "at90s8515", .features = featureSet(&[_]Feature{ .avr2, }), }; - pub const at90s8535 = Cpu{ + pub const at90s8535 = CpuModel{ .name = "at90s8535", .llvm_name = "at90s8535", .features = featureSet(&[_]Feature{ .avr2, }), }; - pub const at90scr100 = Cpu{ + pub const at90scr100 = CpuModel{ .name = "at90scr100", .llvm_name = "at90scr100", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const at90usb1286 = Cpu{ + pub const at90usb1286 = CpuModel{ .name = "at90usb1286", .llvm_name = "at90usb1286", .features = featureSet(&[_]Feature{ .avr51, }), }; - pub const at90usb1287 = Cpu{ + pub const at90usb1287 = CpuModel{ .name = "at90usb1287", .llvm_name = "at90usb1287", .features = featureSet(&[_]Feature{ .avr51, }), }; - pub const at90usb162 = Cpu{ + pub const at90usb162 = CpuModel{ .name = "at90usb162", .llvm_name = "at90usb162", .features = featureSet(&[_]Feature{ .avr35, }), }; - pub const at90usb646 = Cpu{ + pub const at90usb646 = CpuModel{ .name = "at90usb646", .llvm_name = "at90usb646", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const at90usb647 = Cpu{ + pub const at90usb647 = CpuModel{ .name = "at90usb647", .llvm_name = "at90usb647", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const at90usb82 = Cpu{ + pub const at90usb82 = CpuModel{ .name = "at90usb82", .llvm_name = "at90usb82", .features = featureSet(&[_]Feature{ .avr35, }), }; - pub const at94k = Cpu{ + pub const at94k = CpuModel{ .name = "at94k", .llvm_name = "at94k", .features = featureSet(&[_]Feature{ @@ -543,133 +544,133 @@ pub const cpu = struct { .mul, }), }; - pub const ata5272 = Cpu{ + pub const ata5272 = CpuModel{ .name = "ata5272", .llvm_name = "ata5272", .features = featureSet(&[_]Feature{ .avr25, }), }; - pub const ata5505 = Cpu{ + pub const ata5505 = CpuModel{ .name = "ata5505", .llvm_name = "ata5505", .features = featureSet(&[_]Feature{ .avr35, }), }; - pub const ata5790 = Cpu{ + pub const ata5790 = CpuModel{ .name = "ata5790", .llvm_name = "ata5790", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const ata5795 = Cpu{ + pub const ata5795 = CpuModel{ .name = "ata5795", .llvm_name = "ata5795", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const ata6285 = Cpu{ + pub const ata6285 = CpuModel{ .name = "ata6285", .llvm_name = "ata6285", .features = featureSet(&[_]Feature{ .avr4, }), }; - pub const ata6286 = Cpu{ + pub const ata6286 = CpuModel{ .name = "ata6286", .llvm_name = "ata6286", .features = featureSet(&[_]Feature{ .avr4, }), }; - pub const ata6289 = Cpu{ + pub const ata6289 = CpuModel{ .name = "ata6289", .llvm_name = "ata6289", .features = featureSet(&[_]Feature{ .avr4, }), }; - pub const atmega103 = Cpu{ + pub const atmega103 = CpuModel{ .name = "atmega103", .llvm_name = "atmega103", .features = featureSet(&[_]Feature{ .avr31, }), }; - pub const atmega128 = Cpu{ + pub const atmega128 = CpuModel{ .name = "atmega128", .llvm_name = "atmega128", .features = featureSet(&[_]Feature{ .avr51, }), }; - pub const atmega1280 = Cpu{ + pub const atmega1280 = CpuModel{ .name = "atmega1280", .llvm_name = "atmega1280", .features = featureSet(&[_]Feature{ .avr51, }), }; - pub const atmega1281 = Cpu{ + pub const atmega1281 = CpuModel{ .name = "atmega1281", .llvm_name = "atmega1281", .features = featureSet(&[_]Feature{ .avr51, }), }; - pub const atmega1284 = Cpu{ + pub const atmega1284 = CpuModel{ .name = "atmega1284", .llvm_name = "atmega1284", .features = featureSet(&[_]Feature{ .avr51, }), }; - pub const atmega1284p = Cpu{ + pub const atmega1284p = CpuModel{ .name = "atmega1284p", .llvm_name = "atmega1284p", .features = featureSet(&[_]Feature{ .avr51, }), }; - pub const atmega1284rfr2 = Cpu{ + pub const atmega1284rfr2 = CpuModel{ .name = "atmega1284rfr2", .llvm_name = "atmega1284rfr2", .features = featureSet(&[_]Feature{ .avr51, }), }; - pub const atmega128a = Cpu{ + pub const atmega128a = CpuModel{ .name = "atmega128a", .llvm_name = "atmega128a", .features = featureSet(&[_]Feature{ .avr51, }), }; - pub const atmega128rfa1 = Cpu{ + pub const atmega128rfa1 = CpuModel{ .name = "atmega128rfa1", .llvm_name = "atmega128rfa1", .features = featureSet(&[_]Feature{ .avr51, }), }; - pub const atmega128rfr2 = Cpu{ + pub const atmega128rfr2 = CpuModel{ .name = "atmega128rfr2", .llvm_name = "atmega128rfr2", .features = featureSet(&[_]Feature{ .avr51, }), }; - pub const atmega16 = Cpu{ + pub const atmega16 = CpuModel{ .name = "atmega16", .llvm_name = "atmega16", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega161 = Cpu{ + pub const atmega161 = CpuModel{ .name = "atmega161", .llvm_name = "atmega161", .features = featureSet(&[_]Feature{ @@ -680,14 +681,14 @@ pub const cpu = struct { .spm, }), }; - pub const atmega162 = Cpu{ + pub const atmega162 = CpuModel{ .name = "atmega162", .llvm_name = "atmega162", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega163 = Cpu{ + pub const atmega163 = CpuModel{ .name = "atmega163", .llvm_name = "atmega163", .features = featureSet(&[_]Feature{ @@ -698,623 +699,623 @@ pub const cpu = struct { .spm, }), }; - pub const atmega164a = Cpu{ + pub const atmega164a = CpuModel{ .name = "atmega164a", .llvm_name = "atmega164a", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega164p = Cpu{ + pub const atmega164p = CpuModel{ .name = "atmega164p", .llvm_name = "atmega164p", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega164pa = Cpu{ + pub const atmega164pa = CpuModel{ .name = "atmega164pa", .llvm_name = "atmega164pa", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega165 = Cpu{ + pub const atmega165 = CpuModel{ .name = "atmega165", .llvm_name = "atmega165", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega165a = Cpu{ + pub const atmega165a = CpuModel{ .name = "atmega165a", .llvm_name = "atmega165a", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega165p = Cpu{ + pub const atmega165p = CpuModel{ .name = "atmega165p", .llvm_name = "atmega165p", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega165pa = Cpu{ + pub const atmega165pa = CpuModel{ .name = "atmega165pa", .llvm_name = "atmega165pa", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega168 = Cpu{ + pub const atmega168 = CpuModel{ .name = "atmega168", .llvm_name = "atmega168", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega168a = Cpu{ + pub const atmega168a = CpuModel{ .name = "atmega168a", .llvm_name = "atmega168a", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega168p = Cpu{ + pub const atmega168p = CpuModel{ .name = "atmega168p", .llvm_name = "atmega168p", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega168pa = Cpu{ + pub const atmega168pa = CpuModel{ .name = "atmega168pa", .llvm_name = "atmega168pa", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega169 = Cpu{ + pub const atmega169 = CpuModel{ .name = "atmega169", .llvm_name = "atmega169", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega169a = Cpu{ + pub const atmega169a = CpuModel{ .name = "atmega169a", .llvm_name = "atmega169a", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega169p = Cpu{ + pub const atmega169p = CpuModel{ .name = "atmega169p", .llvm_name = "atmega169p", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega169pa = Cpu{ + pub const atmega169pa = CpuModel{ .name = "atmega169pa", .llvm_name = "atmega169pa", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega16a = Cpu{ + pub const atmega16a = CpuModel{ .name = "atmega16a", .llvm_name = "atmega16a", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega16hva = Cpu{ + pub const atmega16hva = CpuModel{ .name = "atmega16hva", .llvm_name = "atmega16hva", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega16hva2 = Cpu{ + pub const atmega16hva2 = CpuModel{ .name = "atmega16hva2", .llvm_name = "atmega16hva2", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega16hvb = Cpu{ + pub const atmega16hvb = CpuModel{ .name = "atmega16hvb", .llvm_name = "atmega16hvb", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega16hvbrevb = Cpu{ + pub const atmega16hvbrevb = CpuModel{ .name = "atmega16hvbrevb", .llvm_name = "atmega16hvbrevb", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega16m1 = Cpu{ + pub const atmega16m1 = CpuModel{ .name = "atmega16m1", .llvm_name = "atmega16m1", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega16u2 = Cpu{ + pub const atmega16u2 = CpuModel{ .name = "atmega16u2", .llvm_name = "atmega16u2", .features = featureSet(&[_]Feature{ .avr35, }), }; - pub const atmega16u4 = Cpu{ + pub const atmega16u4 = CpuModel{ .name = "atmega16u4", .llvm_name = "atmega16u4", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega2560 = Cpu{ + pub const atmega2560 = CpuModel{ .name = "atmega2560", .llvm_name = "atmega2560", .features = featureSet(&[_]Feature{ .avr6, }), }; - pub const atmega2561 = Cpu{ + pub const atmega2561 = CpuModel{ .name = "atmega2561", .llvm_name = "atmega2561", .features = featureSet(&[_]Feature{ .avr6, }), }; - pub const atmega2564rfr2 = Cpu{ + pub const atmega2564rfr2 = CpuModel{ .name = "atmega2564rfr2", .llvm_name = "atmega2564rfr2", .features = featureSet(&[_]Feature{ .avr6, }), }; - pub const atmega256rfr2 = Cpu{ + pub const atmega256rfr2 = CpuModel{ .name = "atmega256rfr2", .llvm_name = "atmega256rfr2", .features = featureSet(&[_]Feature{ .avr6, }), }; - pub const atmega32 = Cpu{ + pub const atmega32 = CpuModel{ .name = "atmega32", .llvm_name = "atmega32", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega323 = Cpu{ + pub const atmega323 = CpuModel{ .name = "atmega323", .llvm_name = "atmega323", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega324a = Cpu{ + pub const atmega324a = CpuModel{ .name = "atmega324a", .llvm_name = "atmega324a", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega324p = Cpu{ + pub const atmega324p = CpuModel{ .name = "atmega324p", .llvm_name = "atmega324p", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega324pa = Cpu{ + pub const atmega324pa = CpuModel{ .name = "atmega324pa", .llvm_name = "atmega324pa", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega325 = Cpu{ + pub const atmega325 = CpuModel{ .name = "atmega325", .llvm_name = "atmega325", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega3250 = Cpu{ + pub const atmega3250 = CpuModel{ .name = "atmega3250", .llvm_name = "atmega3250", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega3250a = Cpu{ + pub const atmega3250a = CpuModel{ .name = "atmega3250a", .llvm_name = "atmega3250a", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega3250p = Cpu{ + pub const atmega3250p = CpuModel{ .name = "atmega3250p", .llvm_name = "atmega3250p", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega3250pa = Cpu{ + pub const atmega3250pa = CpuModel{ .name = "atmega3250pa", .llvm_name = "atmega3250pa", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega325a = Cpu{ + pub const atmega325a = CpuModel{ .name = "atmega325a", .llvm_name = "atmega325a", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega325p = Cpu{ + pub const atmega325p = CpuModel{ .name = "atmega325p", .llvm_name = "atmega325p", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega325pa = Cpu{ + pub const atmega325pa = CpuModel{ .name = "atmega325pa", .llvm_name = "atmega325pa", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega328 = Cpu{ + pub const atmega328 = CpuModel{ .name = "atmega328", .llvm_name = "atmega328", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega328p = Cpu{ + pub const atmega328p = CpuModel{ .name = "atmega328p", .llvm_name = "atmega328p", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega329 = Cpu{ + pub const atmega329 = CpuModel{ .name = "atmega329", .llvm_name = "atmega329", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega3290 = Cpu{ + pub const atmega3290 = CpuModel{ .name = "atmega3290", .llvm_name = "atmega3290", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega3290a = Cpu{ + pub const atmega3290a = CpuModel{ .name = "atmega3290a", .llvm_name = "atmega3290a", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega3290p = Cpu{ + pub const atmega3290p = CpuModel{ .name = "atmega3290p", .llvm_name = "atmega3290p", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega3290pa = Cpu{ + pub const atmega3290pa = CpuModel{ .name = "atmega3290pa", .llvm_name = "atmega3290pa", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega329a = Cpu{ + pub const atmega329a = CpuModel{ .name = "atmega329a", .llvm_name = "atmega329a", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega329p = Cpu{ + pub const atmega329p = CpuModel{ .name = "atmega329p", .llvm_name = "atmega329p", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega329pa = Cpu{ + pub const atmega329pa = CpuModel{ .name = "atmega329pa", .llvm_name = "atmega329pa", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega32a = Cpu{ + pub const atmega32a = CpuModel{ .name = "atmega32a", .llvm_name = "atmega32a", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega32c1 = Cpu{ + pub const atmega32c1 = CpuModel{ .name = "atmega32c1", .llvm_name = "atmega32c1", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega32hvb = Cpu{ + pub const atmega32hvb = CpuModel{ .name = "atmega32hvb", .llvm_name = "atmega32hvb", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega32hvbrevb = Cpu{ + pub const atmega32hvbrevb = CpuModel{ .name = "atmega32hvbrevb", .llvm_name = "atmega32hvbrevb", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega32m1 = Cpu{ + pub const atmega32m1 = CpuModel{ .name = "atmega32m1", .llvm_name = "atmega32m1", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega32u2 = Cpu{ + pub const atmega32u2 = CpuModel{ .name = "atmega32u2", .llvm_name = "atmega32u2", .features = featureSet(&[_]Feature{ .avr35, }), }; - pub const atmega32u4 = Cpu{ + pub const atmega32u4 = CpuModel{ .name = "atmega32u4", .llvm_name = "atmega32u4", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega32u6 = Cpu{ + pub const atmega32u6 = CpuModel{ .name = "atmega32u6", .llvm_name = "atmega32u6", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega406 = Cpu{ + pub const atmega406 = CpuModel{ .name = "atmega406", .llvm_name = "atmega406", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega48 = Cpu{ + pub const atmega48 = CpuModel{ .name = "atmega48", .llvm_name = "atmega48", .features = featureSet(&[_]Feature{ .avr4, }), }; - pub const atmega48a = Cpu{ + pub const atmega48a = CpuModel{ .name = "atmega48a", .llvm_name = "atmega48a", .features = featureSet(&[_]Feature{ .avr4, }), }; - pub const atmega48p = Cpu{ + pub const atmega48p = CpuModel{ .name = "atmega48p", .llvm_name = "atmega48p", .features = featureSet(&[_]Feature{ .avr4, }), }; - pub const atmega48pa = Cpu{ + pub const atmega48pa = CpuModel{ .name = "atmega48pa", .llvm_name = "atmega48pa", .features = featureSet(&[_]Feature{ .avr4, }), }; - pub const atmega64 = Cpu{ + pub const atmega64 = CpuModel{ .name = "atmega64", .llvm_name = "atmega64", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega640 = Cpu{ + pub const atmega640 = CpuModel{ .name = "atmega640", .llvm_name = "atmega640", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega644 = Cpu{ + pub const atmega644 = CpuModel{ .name = "atmega644", .llvm_name = "atmega644", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega644a = Cpu{ + pub const atmega644a = CpuModel{ .name = "atmega644a", .llvm_name = "atmega644a", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega644p = Cpu{ + pub const atmega644p = CpuModel{ .name = "atmega644p", .llvm_name = "atmega644p", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega644pa = Cpu{ + pub const atmega644pa = CpuModel{ .name = "atmega644pa", .llvm_name = "atmega644pa", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega644rfr2 = Cpu{ + pub const atmega644rfr2 = CpuModel{ .name = "atmega644rfr2", .llvm_name = "atmega644rfr2", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega645 = Cpu{ + pub const atmega645 = CpuModel{ .name = "atmega645", .llvm_name = "atmega645", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega6450 = Cpu{ + pub const atmega6450 = CpuModel{ .name = "atmega6450", .llvm_name = "atmega6450", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega6450a = Cpu{ + pub const atmega6450a = CpuModel{ .name = "atmega6450a", .llvm_name = "atmega6450a", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega6450p = Cpu{ + pub const atmega6450p = CpuModel{ .name = "atmega6450p", .llvm_name = "atmega6450p", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega645a = Cpu{ + pub const atmega645a = CpuModel{ .name = "atmega645a", .llvm_name = "atmega645a", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega645p = Cpu{ + pub const atmega645p = CpuModel{ .name = "atmega645p", .llvm_name = "atmega645p", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega649 = Cpu{ + pub const atmega649 = CpuModel{ .name = "atmega649", .llvm_name = "atmega649", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega6490 = Cpu{ + pub const atmega6490 = CpuModel{ .name = "atmega6490", .llvm_name = "atmega6490", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega6490a = Cpu{ + pub const atmega6490a = CpuModel{ .name = "atmega6490a", .llvm_name = "atmega6490a", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega6490p = Cpu{ + pub const atmega6490p = CpuModel{ .name = "atmega6490p", .llvm_name = "atmega6490p", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega649a = Cpu{ + pub const atmega649a = CpuModel{ .name = "atmega649a", .llvm_name = "atmega649a", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega649p = Cpu{ + pub const atmega649p = CpuModel{ .name = "atmega649p", .llvm_name = "atmega649p", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega64a = Cpu{ + pub const atmega64a = CpuModel{ .name = "atmega64a", .llvm_name = "atmega64a", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega64c1 = Cpu{ + pub const atmega64c1 = CpuModel{ .name = "atmega64c1", .llvm_name = "atmega64c1", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega64hve = Cpu{ + pub const atmega64hve = CpuModel{ .name = "atmega64hve", .llvm_name = "atmega64hve", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega64m1 = Cpu{ + pub const atmega64m1 = CpuModel{ .name = "atmega64m1", .llvm_name = "atmega64m1", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega64rfr2 = Cpu{ + pub const atmega64rfr2 = CpuModel{ .name = "atmega64rfr2", .llvm_name = "atmega64rfr2", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const atmega8 = Cpu{ + pub const atmega8 = CpuModel{ .name = "atmega8", .llvm_name = "atmega8", .features = featureSet(&[_]Feature{ .avr4, }), }; - pub const atmega8515 = Cpu{ + pub const atmega8515 = CpuModel{ .name = "atmega8515", .llvm_name = "atmega8515", .features = featureSet(&[_]Feature{ @@ -1325,7 +1326,7 @@ pub const cpu = struct { .spm, }), }; - pub const atmega8535 = Cpu{ + pub const atmega8535 = CpuModel{ .name = "atmega8535", .llvm_name = "atmega8535", .features = featureSet(&[_]Feature{ @@ -1336,175 +1337,175 @@ pub const cpu = struct { .spm, }), }; - pub const atmega88 = Cpu{ + pub const atmega88 = CpuModel{ .name = "atmega88", .llvm_name = "atmega88", .features = featureSet(&[_]Feature{ .avr4, }), }; - pub const atmega88a = Cpu{ + pub const atmega88a = CpuModel{ .name = "atmega88a", .llvm_name = "atmega88a", .features = featureSet(&[_]Feature{ .avr4, }), }; - pub const atmega88p = Cpu{ + pub const atmega88p = CpuModel{ .name = "atmega88p", .llvm_name = "atmega88p", .features = featureSet(&[_]Feature{ .avr4, }), }; - pub const atmega88pa = Cpu{ + pub const atmega88pa = CpuModel{ .name = "atmega88pa", .llvm_name = "atmega88pa", .features = featureSet(&[_]Feature{ .avr4, }), }; - pub const atmega8a = Cpu{ + pub const atmega8a = CpuModel{ .name = "atmega8a", .llvm_name = "atmega8a", .features = featureSet(&[_]Feature{ .avr4, }), }; - pub const atmega8hva = Cpu{ + pub const atmega8hva = CpuModel{ .name = "atmega8hva", .llvm_name = "atmega8hva", .features = featureSet(&[_]Feature{ .avr4, }), }; - pub const atmega8u2 = Cpu{ + pub const atmega8u2 = CpuModel{ .name = "atmega8u2", .llvm_name = "atmega8u2", .features = featureSet(&[_]Feature{ .avr35, }), }; - pub const attiny10 = Cpu{ + pub const attiny10 = CpuModel{ .name = "attiny10", .llvm_name = "attiny10", .features = featureSet(&[_]Feature{ .avrtiny, }), }; - pub const attiny102 = Cpu{ + pub const attiny102 = CpuModel{ .name = "attiny102", .llvm_name = "attiny102", .features = featureSet(&[_]Feature{ .avrtiny, }), }; - pub const attiny104 = Cpu{ + pub const attiny104 = CpuModel{ .name = "attiny104", .llvm_name = "attiny104", .features = featureSet(&[_]Feature{ .avrtiny, }), }; - pub const attiny11 = Cpu{ + pub const attiny11 = CpuModel{ .name = "attiny11", .llvm_name = "attiny11", .features = featureSet(&[_]Feature{ .avr1, }), }; - pub const attiny12 = Cpu{ + pub const attiny12 = CpuModel{ .name = "attiny12", .llvm_name = "attiny12", .features = featureSet(&[_]Feature{ .avr1, }), }; - pub const attiny13 = Cpu{ + pub const attiny13 = CpuModel{ .name = "attiny13", .llvm_name = "attiny13", .features = featureSet(&[_]Feature{ .avr25, }), }; - pub const attiny13a = Cpu{ + pub const attiny13a = CpuModel{ .name = "attiny13a", .llvm_name = "attiny13a", .features = featureSet(&[_]Feature{ .avr25, }), }; - pub const attiny15 = Cpu{ + pub const attiny15 = CpuModel{ .name = "attiny15", .llvm_name = "attiny15", .features = featureSet(&[_]Feature{ .avr1, }), }; - pub const attiny1634 = Cpu{ + pub const attiny1634 = CpuModel{ .name = "attiny1634", .llvm_name = "attiny1634", .features = featureSet(&[_]Feature{ .avr35, }), }; - pub const attiny167 = Cpu{ + pub const attiny167 = CpuModel{ .name = "attiny167", .llvm_name = "attiny167", .features = featureSet(&[_]Feature{ .avr35, }), }; - pub const attiny20 = Cpu{ + pub const attiny20 = CpuModel{ .name = "attiny20", .llvm_name = "attiny20", .features = featureSet(&[_]Feature{ .avrtiny, }), }; - pub const attiny22 = Cpu{ + pub const attiny22 = CpuModel{ .name = "attiny22", .llvm_name = "attiny22", .features = featureSet(&[_]Feature{ .avr2, }), }; - pub const attiny2313 = Cpu{ + pub const attiny2313 = CpuModel{ .name = "attiny2313", .llvm_name = "attiny2313", .features = featureSet(&[_]Feature{ .avr25, }), }; - pub const attiny2313a = Cpu{ + pub const attiny2313a = CpuModel{ .name = "attiny2313a", .llvm_name = "attiny2313a", .features = featureSet(&[_]Feature{ .avr25, }), }; - pub const attiny24 = Cpu{ + pub const attiny24 = CpuModel{ .name = "attiny24", .llvm_name = "attiny24", .features = featureSet(&[_]Feature{ .avr25, }), }; - pub const attiny24a = Cpu{ + pub const attiny24a = CpuModel{ .name = "attiny24a", .llvm_name = "attiny24a", .features = featureSet(&[_]Feature{ .avr25, }), }; - pub const attiny25 = Cpu{ + pub const attiny25 = CpuModel{ .name = "attiny25", .llvm_name = "attiny25", .features = featureSet(&[_]Feature{ .avr25, }), }; - pub const attiny26 = Cpu{ + pub const attiny26 = CpuModel{ .name = "attiny26", .llvm_name = "attiny26", .features = featureSet(&[_]Feature{ @@ -1512,602 +1513,602 @@ pub const cpu = struct { .lpmx, }), }; - pub const attiny261 = Cpu{ + pub const attiny261 = CpuModel{ .name = "attiny261", .llvm_name = "attiny261", .features = featureSet(&[_]Feature{ .avr25, }), }; - pub const attiny261a = Cpu{ + pub const attiny261a = CpuModel{ .name = "attiny261a", .llvm_name = "attiny261a", .features = featureSet(&[_]Feature{ .avr25, }), }; - pub const attiny28 = Cpu{ + pub const attiny28 = CpuModel{ .name = "attiny28", .llvm_name = "attiny28", .features = featureSet(&[_]Feature{ .avr1, }), }; - pub const attiny4 = Cpu{ + pub const attiny4 = CpuModel{ .name = "attiny4", .llvm_name = "attiny4", .features = featureSet(&[_]Feature{ .avrtiny, }), }; - pub const attiny40 = Cpu{ + pub const attiny40 = CpuModel{ .name = "attiny40", .llvm_name = "attiny40", .features = featureSet(&[_]Feature{ .avrtiny, }), }; - pub const attiny4313 = Cpu{ + pub const attiny4313 = CpuModel{ .name = "attiny4313", .llvm_name = "attiny4313", .features = featureSet(&[_]Feature{ .avr25, }), }; - pub const attiny43u = Cpu{ + pub const attiny43u = CpuModel{ .name = "attiny43u", .llvm_name = "attiny43u", .features = featureSet(&[_]Feature{ .avr25, }), }; - pub const attiny44 = Cpu{ + pub const attiny44 = CpuModel{ .name = "attiny44", .llvm_name = "attiny44", .features = featureSet(&[_]Feature{ .avr25, }), }; - pub const attiny44a = Cpu{ + pub const attiny44a = CpuModel{ .name = "attiny44a", .llvm_name = "attiny44a", .features = featureSet(&[_]Feature{ .avr25, }), }; - pub const attiny45 = Cpu{ + pub const attiny45 = CpuModel{ .name = "attiny45", .llvm_name = "attiny45", .features = featureSet(&[_]Feature{ .avr25, }), }; - pub const attiny461 = Cpu{ + pub const attiny461 = CpuModel{ .name = "attiny461", .llvm_name = "attiny461", .features = featureSet(&[_]Feature{ .avr25, }), }; - pub const attiny461a = Cpu{ + pub const attiny461a = CpuModel{ .name = "attiny461a", .llvm_name = "attiny461a", .features = featureSet(&[_]Feature{ .avr25, }), }; - pub const attiny48 = Cpu{ + pub const attiny48 = CpuModel{ .name = "attiny48", .llvm_name = "attiny48", .features = featureSet(&[_]Feature{ .avr25, }), }; - pub const attiny5 = Cpu{ + pub const attiny5 = CpuModel{ .name = "attiny5", .llvm_name = "attiny5", .features = featureSet(&[_]Feature{ .avrtiny, }), }; - pub const attiny828 = Cpu{ + pub const attiny828 = CpuModel{ .name = "attiny828", .llvm_name = "attiny828", .features = featureSet(&[_]Feature{ .avr25, }), }; - pub const attiny84 = Cpu{ + pub const attiny84 = CpuModel{ .name = "attiny84", .llvm_name = "attiny84", .features = featureSet(&[_]Feature{ .avr25, }), }; - pub const attiny84a = Cpu{ + pub const attiny84a = CpuModel{ .name = "attiny84a", .llvm_name = "attiny84a", .features = featureSet(&[_]Feature{ .avr25, }), }; - pub const attiny85 = Cpu{ + pub const attiny85 = CpuModel{ .name = "attiny85", .llvm_name = "attiny85", .features = featureSet(&[_]Feature{ .avr25, }), }; - pub const attiny861 = Cpu{ + pub const attiny861 = CpuModel{ .name = "attiny861", .llvm_name = "attiny861", .features = featureSet(&[_]Feature{ .avr25, }), }; - pub const attiny861a = Cpu{ + pub const attiny861a = CpuModel{ .name = "attiny861a", .llvm_name = "attiny861a", .features = featureSet(&[_]Feature{ .avr25, }), }; - pub const attiny87 = Cpu{ + pub const attiny87 = CpuModel{ .name = "attiny87", .llvm_name = "attiny87", .features = featureSet(&[_]Feature{ .avr25, }), }; - pub const attiny88 = Cpu{ + pub const attiny88 = CpuModel{ .name = "attiny88", .llvm_name = "attiny88", .features = featureSet(&[_]Feature{ .avr25, }), }; - pub const attiny9 = Cpu{ + pub const attiny9 = CpuModel{ .name = "attiny9", .llvm_name = "attiny9", .features = featureSet(&[_]Feature{ .avrtiny, }), }; - pub const atxmega128a1 = Cpu{ + pub const atxmega128a1 = CpuModel{ .name = "atxmega128a1", .llvm_name = "atxmega128a1", .features = featureSet(&[_]Feature{ .xmega, }), }; - pub const atxmega128a1u = Cpu{ + pub const atxmega128a1u = CpuModel{ .name = "atxmega128a1u", .llvm_name = "atxmega128a1u", .features = featureSet(&[_]Feature{ .xmegau, }), }; - pub const atxmega128a3 = Cpu{ + pub const atxmega128a3 = CpuModel{ .name = "atxmega128a3", .llvm_name = "atxmega128a3", .features = featureSet(&[_]Feature{ .xmega, }), }; - pub const atxmega128a3u = Cpu{ + pub const atxmega128a3u = CpuModel{ .name = "atxmega128a3u", .llvm_name = "atxmega128a3u", .features = featureSet(&[_]Feature{ .xmegau, }), }; - pub const atxmega128a4u = Cpu{ + pub const atxmega128a4u = CpuModel{ .name = "atxmega128a4u", .llvm_name = "atxmega128a4u", .features = featureSet(&[_]Feature{ .xmegau, }), }; - pub const atxmega128b1 = Cpu{ + pub const atxmega128b1 = CpuModel{ .name = "atxmega128b1", .llvm_name = "atxmega128b1", .features = featureSet(&[_]Feature{ .xmegau, }), }; - pub const atxmega128b3 = Cpu{ + pub const atxmega128b3 = CpuModel{ .name = "atxmega128b3", .llvm_name = "atxmega128b3", .features = featureSet(&[_]Feature{ .xmegau, }), }; - pub const atxmega128c3 = Cpu{ + pub const atxmega128c3 = CpuModel{ .name = "atxmega128c3", .llvm_name = "atxmega128c3", .features = featureSet(&[_]Feature{ .xmegau, }), }; - pub const atxmega128d3 = Cpu{ + pub const atxmega128d3 = CpuModel{ .name = "atxmega128d3", .llvm_name = "atxmega128d3", .features = featureSet(&[_]Feature{ .xmega, }), }; - pub const atxmega128d4 = Cpu{ + pub const atxmega128d4 = CpuModel{ .name = "atxmega128d4", .llvm_name = "atxmega128d4", .features = featureSet(&[_]Feature{ .xmega, }), }; - pub const atxmega16a4 = Cpu{ + pub const atxmega16a4 = CpuModel{ .name = "atxmega16a4", .llvm_name = "atxmega16a4", .features = featureSet(&[_]Feature{ .xmega, }), }; - pub const atxmega16a4u = Cpu{ + pub const atxmega16a4u = CpuModel{ .name = "atxmega16a4u", .llvm_name = "atxmega16a4u", .features = featureSet(&[_]Feature{ .xmegau, }), }; - pub const atxmega16c4 = Cpu{ + pub const atxmega16c4 = CpuModel{ .name = "atxmega16c4", .llvm_name = "atxmega16c4", .features = featureSet(&[_]Feature{ .xmegau, }), }; - pub const atxmega16d4 = Cpu{ + pub const atxmega16d4 = CpuModel{ .name = "atxmega16d4", .llvm_name = "atxmega16d4", .features = featureSet(&[_]Feature{ .xmega, }), }; - pub const atxmega16e5 = Cpu{ + pub const atxmega16e5 = CpuModel{ .name = "atxmega16e5", .llvm_name = "atxmega16e5", .features = featureSet(&[_]Feature{ .xmega, }), }; - pub const atxmega192a3 = Cpu{ + pub const atxmega192a3 = CpuModel{ .name = "atxmega192a3", .llvm_name = "atxmega192a3", .features = featureSet(&[_]Feature{ .xmega, }), }; - pub const atxmega192a3u = Cpu{ + pub const atxmega192a3u = CpuModel{ .name = "atxmega192a3u", .llvm_name = "atxmega192a3u", .features = featureSet(&[_]Feature{ .xmegau, }), }; - pub const atxmega192c3 = Cpu{ + pub const atxmega192c3 = CpuModel{ .name = "atxmega192c3", .llvm_name = "atxmega192c3", .features = featureSet(&[_]Feature{ .xmegau, }), }; - pub const atxmega192d3 = Cpu{ + pub const atxmega192d3 = CpuModel{ .name = "atxmega192d3", .llvm_name = "atxmega192d3", .features = featureSet(&[_]Feature{ .xmega, }), }; - pub const atxmega256a3 = Cpu{ + pub const atxmega256a3 = CpuModel{ .name = "atxmega256a3", .llvm_name = "atxmega256a3", .features = featureSet(&[_]Feature{ .xmega, }), }; - pub const atxmega256a3b = Cpu{ + pub const atxmega256a3b = CpuModel{ .name = "atxmega256a3b", .llvm_name = "atxmega256a3b", .features = featureSet(&[_]Feature{ .xmega, }), }; - pub const atxmega256a3bu = Cpu{ + pub const atxmega256a3bu = CpuModel{ .name = "atxmega256a3bu", .llvm_name = "atxmega256a3bu", .features = featureSet(&[_]Feature{ .xmegau, }), }; - pub const atxmega256a3u = Cpu{ + pub const atxmega256a3u = CpuModel{ .name = "atxmega256a3u", .llvm_name = "atxmega256a3u", .features = featureSet(&[_]Feature{ .xmegau, }), }; - pub const atxmega256c3 = Cpu{ + pub const atxmega256c3 = CpuModel{ .name = "atxmega256c3", .llvm_name = "atxmega256c3", .features = featureSet(&[_]Feature{ .xmegau, }), }; - pub const atxmega256d3 = Cpu{ + pub const atxmega256d3 = CpuModel{ .name = "atxmega256d3", .llvm_name = "atxmega256d3", .features = featureSet(&[_]Feature{ .xmega, }), }; - pub const atxmega32a4 = Cpu{ + pub const atxmega32a4 = CpuModel{ .name = "atxmega32a4", .llvm_name = "atxmega32a4", .features = featureSet(&[_]Feature{ .xmega, }), }; - pub const atxmega32a4u = Cpu{ + pub const atxmega32a4u = CpuModel{ .name = "atxmega32a4u", .llvm_name = "atxmega32a4u", .features = featureSet(&[_]Feature{ .xmegau, }), }; - pub const atxmega32c4 = Cpu{ + pub const atxmega32c4 = CpuModel{ .name = "atxmega32c4", .llvm_name = "atxmega32c4", .features = featureSet(&[_]Feature{ .xmegau, }), }; - pub const atxmega32d4 = Cpu{ + pub const atxmega32d4 = CpuModel{ .name = "atxmega32d4", .llvm_name = "atxmega32d4", .features = featureSet(&[_]Feature{ .xmega, }), }; - pub const atxmega32e5 = Cpu{ + pub const atxmega32e5 = CpuModel{ .name = "atxmega32e5", .llvm_name = "atxmega32e5", .features = featureSet(&[_]Feature{ .xmega, }), }; - pub const atxmega32x1 = Cpu{ + pub const atxmega32x1 = CpuModel{ .name = "atxmega32x1", .llvm_name = "atxmega32x1", .features = featureSet(&[_]Feature{ .xmega, }), }; - pub const atxmega384c3 = Cpu{ + pub const atxmega384c3 = CpuModel{ .name = "atxmega384c3", .llvm_name = "atxmega384c3", .features = featureSet(&[_]Feature{ .xmegau, }), }; - pub const atxmega384d3 = Cpu{ + pub const atxmega384d3 = CpuModel{ .name = "atxmega384d3", .llvm_name = "atxmega384d3", .features = featureSet(&[_]Feature{ .xmega, }), }; - pub const atxmega64a1 = Cpu{ + pub const atxmega64a1 = CpuModel{ .name = "atxmega64a1", .llvm_name = "atxmega64a1", .features = featureSet(&[_]Feature{ .xmega, }), }; - pub const atxmega64a1u = Cpu{ + pub const atxmega64a1u = CpuModel{ .name = "atxmega64a1u", .llvm_name = "atxmega64a1u", .features = featureSet(&[_]Feature{ .xmegau, }), }; - pub const atxmega64a3 = Cpu{ + pub const atxmega64a3 = CpuModel{ .name = "atxmega64a3", .llvm_name = "atxmega64a3", .features = featureSet(&[_]Feature{ .xmega, }), }; - pub const atxmega64a3u = Cpu{ + pub const atxmega64a3u = CpuModel{ .name = "atxmega64a3u", .llvm_name = "atxmega64a3u", .features = featureSet(&[_]Feature{ .xmegau, }), }; - pub const atxmega64a4u = Cpu{ + pub const atxmega64a4u = CpuModel{ .name = "atxmega64a4u", .llvm_name = "atxmega64a4u", .features = featureSet(&[_]Feature{ .xmegau, }), }; - pub const atxmega64b1 = Cpu{ + pub const atxmega64b1 = CpuModel{ .name = "atxmega64b1", .llvm_name = "atxmega64b1", .features = featureSet(&[_]Feature{ .xmegau, }), }; - pub const atxmega64b3 = Cpu{ + pub const atxmega64b3 = CpuModel{ .name = "atxmega64b3", .llvm_name = "atxmega64b3", .features = featureSet(&[_]Feature{ .xmegau, }), }; - pub const atxmega64c3 = Cpu{ + pub const atxmega64c3 = CpuModel{ .name = "atxmega64c3", .llvm_name = "atxmega64c3", .features = featureSet(&[_]Feature{ .xmegau, }), }; - pub const atxmega64d3 = Cpu{ + pub const atxmega64d3 = CpuModel{ .name = "atxmega64d3", .llvm_name = "atxmega64d3", .features = featureSet(&[_]Feature{ .xmega, }), }; - pub const atxmega64d4 = Cpu{ + pub const atxmega64d4 = CpuModel{ .name = "atxmega64d4", .llvm_name = "atxmega64d4", .features = featureSet(&[_]Feature{ .xmega, }), }; - pub const atxmega8e5 = Cpu{ + pub const atxmega8e5 = CpuModel{ .name = "atxmega8e5", .llvm_name = "atxmega8e5", .features = featureSet(&[_]Feature{ .xmega, }), }; - pub const avr1 = Cpu{ + pub const avr1 = CpuModel{ .name = "avr1", .llvm_name = "avr1", .features = featureSet(&[_]Feature{ .avr1, }), }; - pub const avr2 = Cpu{ + pub const avr2 = CpuModel{ .name = "avr2", .llvm_name = "avr2", .features = featureSet(&[_]Feature{ .avr2, }), }; - pub const avr25 = Cpu{ + pub const avr25 = CpuModel{ .name = "avr25", .llvm_name = "avr25", .features = featureSet(&[_]Feature{ .avr25, }), }; - pub const avr3 = Cpu{ + pub const avr3 = CpuModel{ .name = "avr3", .llvm_name = "avr3", .features = featureSet(&[_]Feature{ .avr3, }), }; - pub const avr31 = Cpu{ + pub const avr31 = CpuModel{ .name = "avr31", .llvm_name = "avr31", .features = featureSet(&[_]Feature{ .avr31, }), }; - pub const avr35 = Cpu{ + pub const avr35 = CpuModel{ .name = "avr35", .llvm_name = "avr35", .features = featureSet(&[_]Feature{ .avr35, }), }; - pub const avr4 = Cpu{ + pub const avr4 = CpuModel{ .name = "avr4", .llvm_name = "avr4", .features = featureSet(&[_]Feature{ .avr4, }), }; - pub const avr5 = Cpu{ + pub const avr5 = CpuModel{ .name = "avr5", .llvm_name = "avr5", .features = featureSet(&[_]Feature{ .avr5, }), }; - pub const avr51 = Cpu{ + pub const avr51 = CpuModel{ .name = "avr51", .llvm_name = "avr51", .features = featureSet(&[_]Feature{ .avr51, }), }; - pub const avr6 = Cpu{ + pub const avr6 = CpuModel{ .name = "avr6", .llvm_name = "avr6", .features = featureSet(&[_]Feature{ .avr6, }), }; - pub const avrtiny = Cpu{ + pub const avrtiny = CpuModel{ .name = "avrtiny", .llvm_name = "avrtiny", .features = featureSet(&[_]Feature{ .avrtiny, }), }; - pub const avrxmega1 = Cpu{ + pub const avrxmega1 = CpuModel{ .name = "avrxmega1", .llvm_name = "avrxmega1", .features = featureSet(&[_]Feature{ .xmega, }), }; - pub const avrxmega2 = Cpu{ + pub const avrxmega2 = CpuModel{ .name = "avrxmega2", .llvm_name = "avrxmega2", .features = featureSet(&[_]Feature{ .xmega, }), }; - pub const avrxmega3 = Cpu{ + pub const avrxmega3 = CpuModel{ .name = "avrxmega3", .llvm_name = "avrxmega3", .features = featureSet(&[_]Feature{ .xmega, }), }; - pub const avrxmega4 = Cpu{ + pub const avrxmega4 = CpuModel{ .name = "avrxmega4", .llvm_name = "avrxmega4", .features = featureSet(&[_]Feature{ .xmega, }), }; - pub const avrxmega5 = Cpu{ + pub const avrxmega5 = CpuModel{ .name = "avrxmega5", .llvm_name = "avrxmega5", .features = featureSet(&[_]Feature{ .xmega, }), }; - pub const avrxmega6 = Cpu{ + pub const avrxmega6 = CpuModel{ .name = "avrxmega6", .llvm_name = "avrxmega6", .features = featureSet(&[_]Feature{ .xmega, }), }; - pub const avrxmega7 = Cpu{ + pub const avrxmega7 = CpuModel{ .name = "avrxmega7", .llvm_name = "avrxmega7", .features = featureSet(&[_]Feature{ .xmega, }), }; - pub const m3000 = Cpu{ + pub const m3000 = CpuModel{ .name = "m3000", .llvm_name = "m3000", .features = featureSet(&[_]Feature{ @@ -2119,7 +2120,7 @@ pub const cpu = struct { /// All avr CPUs, sorted alphabetically by name. /// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1 /// compiler has inefficient memory and CPU usage, affecting build times. -pub const all_cpus = &[_]*const Cpu{ +pub const all_cpus = &[_]*const CpuModel{ &cpu.at43usb320, &cpu.at43usb355, &cpu.at76c711, diff --git a/lib/std/target/bpf.zig b/lib/std/target/bpf.zig index b6179075cc..6b548ac031 100644 --- a/lib/std/target/bpf.zig +++ b/lib/std/target/bpf.zig @@ -1,5 +1,6 @@ const std = @import("../std.zig"); -const Cpu = std.Target.Cpu; +const CpuFeature = std.Target.Cpu.Feature; +const CpuModel = std.Target.Cpu.Model; pub const Feature = enum { alu32, @@ -7,12 +8,12 @@ pub const Feature = enum { dwarfris, }; -pub usingnamespace Cpu.Feature.feature_set_fns(Feature); +pub usingnamespace CpuFeature.feature_set_fns(Feature); pub const all_features = blk: { const len = @typeInfo(Feature).Enum.fields.len; - std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count); - var result: [len]Cpu.Feature = undefined; + std.debug.assert(len <= CpuFeature.Set.needed_bit_count); + var result: [len]CpuFeature = undefined; result[@enumToInt(Feature.alu32)] = .{ .llvm_name = "alu32", .description = "Enable ALU32 instructions", @@ -37,27 +38,27 @@ pub const all_features = blk: { }; pub const cpu = struct { - pub const generic = Cpu{ + pub const generic = CpuModel{ .name = "generic", .llvm_name = "generic", .features = featureSet(&[_]Feature{}), }; - pub const probe = Cpu{ + pub const probe = CpuModel{ .name = "probe", .llvm_name = "probe", .features = featureSet(&[_]Feature{}), }; - pub const v1 = Cpu{ + pub const v1 = CpuModel{ .name = "v1", .llvm_name = "v1", .features = featureSet(&[_]Feature{}), }; - pub const v2 = Cpu{ + pub const v2 = CpuModel{ .name = "v2", .llvm_name = "v2", .features = featureSet(&[_]Feature{}), }; - pub const v3 = Cpu{ + pub const v3 = CpuModel{ .name = "v3", .llvm_name = "v3", .features = featureSet(&[_]Feature{}), @@ -67,7 +68,7 @@ pub const cpu = struct { /// All bpf CPUs, sorted alphabetically by name. /// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1 /// compiler has inefficient memory and CPU usage, affecting build times. -pub const all_cpus = &[_]*const Cpu{ +pub const all_cpus = &[_]*const CpuModel{ &cpu.generic, &cpu.probe, &cpu.v1, diff --git a/lib/std/target/hexagon.zig b/lib/std/target/hexagon.zig index f873237493..b0558908e3 100644 --- a/lib/std/target/hexagon.zig +++ b/lib/std/target/hexagon.zig @@ -1,5 +1,6 @@ const std = @import("../std.zig"); -const Cpu = std.Target.Cpu; +const CpuFeature = std.Target.Cpu.Feature; +const CpuModel = std.Target.Cpu.Model; pub const Feature = enum { duplex, @@ -28,12 +29,12 @@ pub const Feature = enum { zreg, }; -pub usingnamespace Cpu.Feature.feature_set_fns(Feature); +pub usingnamespace CpuFeature.feature_set_fns(Feature); pub const all_features = blk: { const len = @typeInfo(Feature).Enum.fields.len; - std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count); - var result: [len]Cpu.Feature = undefined; + std.debug.assert(len <= CpuFeature.Set.needed_bit_count); + var result: [len]CpuFeature = undefined; result[@enumToInt(Feature.duplex)] = .{ .llvm_name = "duplex", .description = "Enable generation of duplex instruction", @@ -186,7 +187,7 @@ pub const all_features = blk: { }; pub const cpu = struct { - pub const generic = Cpu{ + pub const generic = CpuModel{ .name = "generic", .llvm_name = "generic", .features = featureSet(&[_]Feature{ @@ -201,7 +202,7 @@ pub const cpu = struct { .v60, }), }; - pub const hexagonv5 = Cpu{ + pub const hexagonv5 = CpuModel{ .name = "hexagonv5", .llvm_name = "hexagonv5", .features = featureSet(&[_]Feature{ @@ -214,7 +215,7 @@ pub const cpu = struct { .v5, }), }; - pub const hexagonv55 = Cpu{ + pub const hexagonv55 = CpuModel{ .name = "hexagonv55", .llvm_name = "hexagonv55", .features = featureSet(&[_]Feature{ @@ -228,7 +229,7 @@ pub const cpu = struct { .v55, }), }; - pub const hexagonv60 = Cpu{ + pub const hexagonv60 = CpuModel{ .name = "hexagonv60", .llvm_name = "hexagonv60", .features = featureSet(&[_]Feature{ @@ -243,7 +244,7 @@ pub const cpu = struct { .v60, }), }; - pub const hexagonv62 = Cpu{ + pub const hexagonv62 = CpuModel{ .name = "hexagonv62", .llvm_name = "hexagonv62", .features = featureSet(&[_]Feature{ @@ -259,7 +260,7 @@ pub const cpu = struct { .v62, }), }; - pub const hexagonv65 = Cpu{ + pub const hexagonv65 = CpuModel{ .name = "hexagonv65", .llvm_name = "hexagonv65", .features = featureSet(&[_]Feature{ @@ -277,7 +278,7 @@ pub const cpu = struct { .v65, }), }; - pub const hexagonv66 = Cpu{ + pub const hexagonv66 = CpuModel{ .name = "hexagonv66", .llvm_name = "hexagonv66", .features = featureSet(&[_]Feature{ @@ -301,7 +302,7 @@ pub const cpu = struct { /// All hexagon CPUs, sorted alphabetically by name. /// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1 /// compiler has inefficient memory and CPU usage, affecting build times. -pub const all_cpus = &[_]*const Cpu{ +pub const all_cpus = &[_]*const CpuModel{ &cpu.generic, &cpu.hexagonv5, &cpu.hexagonv55, diff --git a/lib/std/target/mips.zig b/lib/std/target/mips.zig index fce7c9ce36..6ea7f665f0 100644 --- a/lib/std/target/mips.zig +++ b/lib/std/target/mips.zig @@ -1,5 +1,6 @@ const std = @import("../std.zig"); -const Cpu = std.Target.Cpu; +const CpuFeature = std.Target.Cpu.Feature; +const CpuModel = std.Target.Cpu.Model; pub const Feature = enum { abs2008, @@ -53,12 +54,12 @@ pub const Feature = enum { virt, }; -pub usingnamespace Cpu.Feature.feature_set_fns(Feature); +pub usingnamespace CpuFeature.feature_set_fns(Feature); pub const all_features = blk: { const len = @typeInfo(Feature).Enum.fields.len; - std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count); - var result: [len]Cpu.Feature = undefined; + std.debug.assert(len <= CpuFeature.Set.needed_bit_count); + var result: [len]CpuFeature = undefined; result[@enumToInt(Feature.abs2008)] = .{ .llvm_name = "abs2008", .description = "Disable IEEE 754-2008 abs.fmt mode", @@ -372,112 +373,112 @@ pub const all_features = blk: { }; pub const cpu = struct { - pub const mips1 = Cpu{ + pub const mips1 = CpuModel{ .name = "mips1", .llvm_name = "mips1", .features = featureSet(&[_]Feature{ .mips1, }), }; - pub const mips2 = Cpu{ + pub const mips2 = CpuModel{ .name = "mips2", .llvm_name = "mips2", .features = featureSet(&[_]Feature{ .mips2, }), }; - pub const mips3 = Cpu{ + pub const mips3 = CpuModel{ .name = "mips3", .llvm_name = "mips3", .features = featureSet(&[_]Feature{ .mips3, }), }; - pub const mips32 = Cpu{ + pub const mips32 = CpuModel{ .name = "mips32", .llvm_name = "mips32", .features = featureSet(&[_]Feature{ .mips32, }), }; - pub const mips32r2 = Cpu{ + pub const mips32r2 = CpuModel{ .name = "mips32r2", .llvm_name = "mips32r2", .features = featureSet(&[_]Feature{ .mips32r2, }), }; - pub const mips32r3 = Cpu{ + pub const mips32r3 = CpuModel{ .name = "mips32r3", .llvm_name = "mips32r3", .features = featureSet(&[_]Feature{ .mips32r3, }), }; - pub const mips32r5 = Cpu{ + pub const mips32r5 = CpuModel{ .name = "mips32r5", .llvm_name = "mips32r5", .features = featureSet(&[_]Feature{ .mips32r5, }), }; - pub const mips32r6 = Cpu{ + pub const mips32r6 = CpuModel{ .name = "mips32r6", .llvm_name = "mips32r6", .features = featureSet(&[_]Feature{ .mips32r6, }), }; - pub const mips4 = Cpu{ + pub const mips4 = CpuModel{ .name = "mips4", .llvm_name = "mips4", .features = featureSet(&[_]Feature{ .mips4, }), }; - pub const mips5 = Cpu{ + pub const mips5 = CpuModel{ .name = "mips5", .llvm_name = "mips5", .features = featureSet(&[_]Feature{ .mips5, }), }; - pub const mips64 = Cpu{ + pub const mips64 = CpuModel{ .name = "mips64", .llvm_name = "mips64", .features = featureSet(&[_]Feature{ .mips64, }), }; - pub const mips64r2 = Cpu{ + pub const mips64r2 = CpuModel{ .name = "mips64r2", .llvm_name = "mips64r2", .features = featureSet(&[_]Feature{ .mips64r2, }), }; - pub const mips64r3 = Cpu{ + pub const mips64r3 = CpuModel{ .name = "mips64r3", .llvm_name = "mips64r3", .features = featureSet(&[_]Feature{ .mips64r3, }), }; - pub const mips64r5 = Cpu{ + pub const mips64r5 = CpuModel{ .name = "mips64r5", .llvm_name = "mips64r5", .features = featureSet(&[_]Feature{ .mips64r5, }), }; - pub const mips64r6 = Cpu{ + pub const mips64r6 = CpuModel{ .name = "mips64r6", .llvm_name = "mips64r6", .features = featureSet(&[_]Feature{ .mips64r6, }), }; - pub const octeon = Cpu{ + pub const octeon = CpuModel{ .name = "octeon", .llvm_name = "octeon", .features = featureSet(&[_]Feature{ @@ -485,7 +486,7 @@ pub const cpu = struct { .mips64r2, }), }; - pub const p5600 = Cpu{ + pub const p5600 = CpuModel{ .name = "p5600", .llvm_name = "p5600", .features = featureSet(&[_]Feature{ @@ -497,7 +498,7 @@ pub const cpu = struct { /// All mips CPUs, sorted alphabetically by name. /// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1 /// compiler has inefficient memory and CPU usage, affecting build times. -pub const all_cpus = &[_]*const Cpu{ +pub const all_cpus = &[_]*const CpuModel{ &cpu.mips1, &cpu.mips2, &cpu.mips3, diff --git a/lib/std/target/msp430.zig b/lib/std/target/msp430.zig index bc932f2295..e1b858341f 100644 --- a/lib/std/target/msp430.zig +++ b/lib/std/target/msp430.zig @@ -1,5 +1,6 @@ const std = @import("../std.zig"); -const Cpu = std.Target.Cpu; +const CpuFeature = std.Target.Cpu.Feature; +const CpuModel = std.Target.Cpu.Model; pub const Feature = enum { ext, @@ -8,12 +9,12 @@ pub const Feature = enum { hwmultf5, }; -pub usingnamespace Cpu.Feature.feature_set_fns(Feature); +pub usingnamespace CpuFeature.feature_set_fns(Feature); pub const all_features = blk: { const len = @typeInfo(Feature).Enum.fields.len; - std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count); - var result: [len]Cpu.Feature = undefined; + std.debug.assert(len <= CpuFeature.Set.needed_bit_count); + var result: [len]CpuFeature = undefined; result[@enumToInt(Feature.ext)] = .{ .llvm_name = "ext", .description = "Enable MSP430-X extensions", @@ -43,17 +44,17 @@ pub const all_features = blk: { }; pub const cpu = struct { - pub const generic = Cpu{ + pub const generic = CpuModel{ .name = "generic", .llvm_name = "generic", .features = featureSet(&[_]Feature{}), }; - pub const msp430 = Cpu{ + pub const msp430 = CpuModel{ .name = "msp430", .llvm_name = "msp430", .features = featureSet(&[_]Feature{}), }; - pub const msp430x = Cpu{ + pub const msp430x = CpuModel{ .name = "msp430x", .llvm_name = "msp430x", .features = featureSet(&[_]Feature{ @@ -65,7 +66,7 @@ pub const cpu = struct { /// All msp430 CPUs, sorted alphabetically by name. /// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1 /// compiler has inefficient memory and CPU usage, affecting build times. -pub const all_cpus = &[_]*const Cpu{ +pub const all_cpus = &[_]*const CpuModel{ &cpu.generic, &cpu.msp430, &cpu.msp430x, diff --git a/lib/std/target/nvptx.zig b/lib/std/target/nvptx.zig index 1800e320b4..6a79aea1da 100644 --- a/lib/std/target/nvptx.zig +++ b/lib/std/target/nvptx.zig @@ -1,5 +1,6 @@ const std = @import("../std.zig"); -const Cpu = std.Target.Cpu; +const CpuFeature = std.Target.Cpu.Feature; +const CpuModel = std.Target.Cpu.Model; pub const Feature = enum { ptx32, @@ -29,12 +30,12 @@ pub const Feature = enum { sm_75, }; -pub usingnamespace Cpu.Feature.feature_set_fns(Feature); +pub usingnamespace CpuFeature.feature_set_fns(Feature); pub const all_features = blk: { const len = @typeInfo(Feature).Enum.fields.len; - std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count); - var result: [len]Cpu.Feature = undefined; + std.debug.assert(len <= CpuFeature.Set.needed_bit_count); + var result: [len]CpuFeature = undefined; result[@enumToInt(Feature.ptx32)] = .{ .llvm_name = "ptx32", .description = "Use PTX version 3.2", @@ -169,28 +170,28 @@ pub const all_features = blk: { }; pub const cpu = struct { - pub const sm_20 = Cpu{ + pub const sm_20 = CpuModel{ .name = "sm_20", .llvm_name = "sm_20", .features = featureSet(&[_]Feature{ .sm_20, }), }; - pub const sm_21 = Cpu{ + pub const sm_21 = CpuModel{ .name = "sm_21", .llvm_name = "sm_21", .features = featureSet(&[_]Feature{ .sm_21, }), }; - pub const sm_30 = Cpu{ + pub const sm_30 = CpuModel{ .name = "sm_30", .llvm_name = "sm_30", .features = featureSet(&[_]Feature{ .sm_30, }), }; - pub const sm_32 = Cpu{ + pub const sm_32 = CpuModel{ .name = "sm_32", .llvm_name = "sm_32", .features = featureSet(&[_]Feature{ @@ -198,14 +199,14 @@ pub const cpu = struct { .sm_32, }), }; - pub const sm_35 = Cpu{ + pub const sm_35 = CpuModel{ .name = "sm_35", .llvm_name = "sm_35", .features = featureSet(&[_]Feature{ .sm_35, }), }; - pub const sm_37 = Cpu{ + pub const sm_37 = CpuModel{ .name = "sm_37", .llvm_name = "sm_37", .features = featureSet(&[_]Feature{ @@ -213,7 +214,7 @@ pub const cpu = struct { .sm_37, }), }; - pub const sm_50 = Cpu{ + pub const sm_50 = CpuModel{ .name = "sm_50", .llvm_name = "sm_50", .features = featureSet(&[_]Feature{ @@ -221,7 +222,7 @@ pub const cpu = struct { .sm_50, }), }; - pub const sm_52 = Cpu{ + pub const sm_52 = CpuModel{ .name = "sm_52", .llvm_name = "sm_52", .features = featureSet(&[_]Feature{ @@ -229,7 +230,7 @@ pub const cpu = struct { .sm_52, }), }; - pub const sm_53 = Cpu{ + pub const sm_53 = CpuModel{ .name = "sm_53", .llvm_name = "sm_53", .features = featureSet(&[_]Feature{ @@ -237,7 +238,7 @@ pub const cpu = struct { .sm_53, }), }; - pub const sm_60 = Cpu{ + pub const sm_60 = CpuModel{ .name = "sm_60", .llvm_name = "sm_60", .features = featureSet(&[_]Feature{ @@ -245,7 +246,7 @@ pub const cpu = struct { .sm_60, }), }; - pub const sm_61 = Cpu{ + pub const sm_61 = CpuModel{ .name = "sm_61", .llvm_name = "sm_61", .features = featureSet(&[_]Feature{ @@ -253,7 +254,7 @@ pub const cpu = struct { .sm_61, }), }; - pub const sm_62 = Cpu{ + pub const sm_62 = CpuModel{ .name = "sm_62", .llvm_name = "sm_62", .features = featureSet(&[_]Feature{ @@ -261,7 +262,7 @@ pub const cpu = struct { .sm_62, }), }; - pub const sm_70 = Cpu{ + pub const sm_70 = CpuModel{ .name = "sm_70", .llvm_name = "sm_70", .features = featureSet(&[_]Feature{ @@ -269,7 +270,7 @@ pub const cpu = struct { .sm_70, }), }; - pub const sm_72 = Cpu{ + pub const sm_72 = CpuModel{ .name = "sm_72", .llvm_name = "sm_72", .features = featureSet(&[_]Feature{ @@ -277,7 +278,7 @@ pub const cpu = struct { .sm_72, }), }; - pub const sm_75 = Cpu{ + pub const sm_75 = CpuModel{ .name = "sm_75", .llvm_name = "sm_75", .features = featureSet(&[_]Feature{ @@ -290,7 +291,7 @@ pub const cpu = struct { /// All nvptx CPUs, sorted alphabetically by name. /// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1 /// compiler has inefficient memory and CPU usage, affecting build times. -pub const all_cpus = &[_]*const Cpu{ +pub const all_cpus = &[_]*const CpuModel{ &cpu.sm_20, &cpu.sm_21, &cpu.sm_30, diff --git a/lib/std/target/powerpc.zig b/lib/std/target/powerpc.zig index 41321f7b04..ae3371e066 100644 --- a/lib/std/target/powerpc.zig +++ b/lib/std/target/powerpc.zig @@ -1,5 +1,6 @@ const std = @import("../std.zig"); -const Cpu = std.Target.Cpu; +const CpuFeature = std.Target.Cpu.Feature; +const CpuModel = std.Target.Cpu.Model; pub const Feature = enum { @"64bit", @@ -55,12 +56,12 @@ pub const Feature = enum { vsx, }; -pub usingnamespace Cpu.Feature.feature_set_fns(Feature); +pub usingnamespace CpuFeature.feature_set_fns(Feature); pub const all_features = blk: { const len = @typeInfo(Feature).Enum.fields.len; - std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count); - var result: [len]Cpu.Feature = undefined; + std.debug.assert(len <= CpuFeature.Set.needed_bit_count); + var result: [len]CpuFeature = undefined; result[@enumToInt(Feature.@"64bit")] = .{ .llvm_name = "64bit", .description = "Enable 64-bit instructions", @@ -377,7 +378,7 @@ pub const all_features = blk: { }; pub const cpu = struct { - pub const @"440" = Cpu{ + pub const @"440" = CpuModel{ .name = "440", .llvm_name = "440", .features = featureSet(&[_]Feature{ @@ -389,7 +390,7 @@ pub const cpu = struct { .msync, }), }; - pub const @"450" = Cpu{ + pub const @"450" = CpuModel{ .name = "450", .llvm_name = "450", .features = featureSet(&[_]Feature{ @@ -401,21 +402,21 @@ pub const cpu = struct { .msync, }), }; - pub const @"601" = Cpu{ + pub const @"601" = CpuModel{ .name = "601", .llvm_name = "601", .features = featureSet(&[_]Feature{ .fpu, }), }; - pub const @"602" = Cpu{ + pub const @"602" = CpuModel{ .name = "602", .llvm_name = "602", .features = featureSet(&[_]Feature{ .fpu, }), }; - pub const @"603" = Cpu{ + pub const @"603" = CpuModel{ .name = "603", .llvm_name = "603", .features = featureSet(&[_]Feature{ @@ -423,7 +424,7 @@ pub const cpu = struct { .frsqrte, }), }; - pub const @"603e" = Cpu{ + pub const @"603e" = CpuModel{ .name = "603e", .llvm_name = "603e", .features = featureSet(&[_]Feature{ @@ -431,7 +432,7 @@ pub const cpu = struct { .frsqrte, }), }; - pub const @"603ev" = Cpu{ + pub const @"603ev" = CpuModel{ .name = "603ev", .llvm_name = "603ev", .features = featureSet(&[_]Feature{ @@ -439,7 +440,7 @@ pub const cpu = struct { .frsqrte, }), }; - pub const @"604" = Cpu{ + pub const @"604" = CpuModel{ .name = "604", .llvm_name = "604", .features = featureSet(&[_]Feature{ @@ -447,7 +448,7 @@ pub const cpu = struct { .frsqrte, }), }; - pub const @"604e" = Cpu{ + pub const @"604e" = CpuModel{ .name = "604e", .llvm_name = "604e", .features = featureSet(&[_]Feature{ @@ -455,7 +456,7 @@ pub const cpu = struct { .frsqrte, }), }; - pub const @"620" = Cpu{ + pub const @"620" = CpuModel{ .name = "620", .llvm_name = "620", .features = featureSet(&[_]Feature{ @@ -463,7 +464,7 @@ pub const cpu = struct { .frsqrte, }), }; - pub const @"7400" = Cpu{ + pub const @"7400" = CpuModel{ .name = "7400", .llvm_name = "7400", .features = featureSet(&[_]Feature{ @@ -472,7 +473,7 @@ pub const cpu = struct { .frsqrte, }), }; - pub const @"7450" = Cpu{ + pub const @"7450" = CpuModel{ .name = "7450", .llvm_name = "7450", .features = featureSet(&[_]Feature{ @@ -481,7 +482,7 @@ pub const cpu = struct { .frsqrte, }), }; - pub const @"750" = Cpu{ + pub const @"750" = CpuModel{ .name = "750", .llvm_name = "750", .features = featureSet(&[_]Feature{ @@ -489,7 +490,7 @@ pub const cpu = struct { .frsqrte, }), }; - pub const @"970" = Cpu{ + pub const @"970" = CpuModel{ .name = "970", .llvm_name = "970", .features = featureSet(&[_]Feature{ @@ -502,7 +503,7 @@ pub const cpu = struct { .stfiwx, }), }; - pub const a2 = Cpu{ + pub const a2 = CpuModel{ .name = "a2", .llvm_name = "a2", .features = featureSet(&[_]Feature{ @@ -527,7 +528,7 @@ pub const cpu = struct { .stfiwx, }), }; - pub const a2q = Cpu{ + pub const a2q = CpuModel{ .name = "a2q", .llvm_name = "a2q", .features = featureSet(&[_]Feature{ @@ -553,7 +554,7 @@ pub const cpu = struct { .stfiwx, }), }; - pub const e500 = Cpu{ + pub const e500 = CpuModel{ .name = "e500", .llvm_name = "e500", .features = featureSet(&[_]Feature{ @@ -562,7 +563,7 @@ pub const cpu = struct { .isel, }), }; - pub const e500mc = Cpu{ + pub const e500mc = CpuModel{ .name = "e500mc", .llvm_name = "e500mc", .features = featureSet(&[_]Feature{ @@ -572,7 +573,7 @@ pub const cpu = struct { .stfiwx, }), }; - pub const e5500 = Cpu{ + pub const e5500 = CpuModel{ .name = "e5500", .llvm_name = "e5500", .features = featureSet(&[_]Feature{ @@ -584,7 +585,7 @@ pub const cpu = struct { .stfiwx, }), }; - pub const g3 = Cpu{ + pub const g3 = CpuModel{ .name = "g3", .llvm_name = "g3", .features = featureSet(&[_]Feature{ @@ -592,7 +593,7 @@ pub const cpu = struct { .frsqrte, }), }; - pub const g4 = Cpu{ + pub const g4 = CpuModel{ .name = "g4", .llvm_name = "g4", .features = featureSet(&[_]Feature{ @@ -601,7 +602,7 @@ pub const cpu = struct { .frsqrte, }), }; - pub const @"g4+" = Cpu{ + pub const @"g4+" = CpuModel{ .name = "g4+", .llvm_name = "g4+", .features = featureSet(&[_]Feature{ @@ -610,7 +611,7 @@ pub const cpu = struct { .frsqrte, }), }; - pub const g5 = Cpu{ + pub const g5 = CpuModel{ .name = "g5", .llvm_name = "g5", .features = featureSet(&[_]Feature{ @@ -623,28 +624,28 @@ pub const cpu = struct { .stfiwx, }), }; - pub const generic = Cpu{ + pub const generic = CpuModel{ .name = "generic", .llvm_name = "generic", .features = featureSet(&[_]Feature{ .hard_float, }), }; - pub const ppc = Cpu{ + pub const ppc = CpuModel{ .name = "ppc", .llvm_name = "ppc", .features = featureSet(&[_]Feature{ .hard_float, }), }; - pub const ppc32 = Cpu{ + pub const ppc32 = CpuModel{ .name = "ppc32", .llvm_name = "ppc32", .features = featureSet(&[_]Feature{ .hard_float, }), }; - pub const ppc64 = Cpu{ + pub const ppc64 = CpuModel{ .name = "ppc64", .llvm_name = "ppc64", .features = featureSet(&[_]Feature{ @@ -657,7 +658,7 @@ pub const cpu = struct { .stfiwx, }), }; - pub const ppc64le = Cpu{ + pub const ppc64le = CpuModel{ .name = "ppc64le", .llvm_name = "ppc64le", .features = featureSet(&[_]Feature{ @@ -692,7 +693,7 @@ pub const cpu = struct { .vsx, }), }; - pub const pwr3 = Cpu{ + pub const pwr3 = CpuModel{ .name = "pwr3", .llvm_name = "pwr3", .features = featureSet(&[_]Feature{ @@ -704,7 +705,7 @@ pub const cpu = struct { .stfiwx, }), }; - pub const pwr4 = Cpu{ + pub const pwr4 = CpuModel{ .name = "pwr4", .llvm_name = "pwr4", .features = featureSet(&[_]Feature{ @@ -717,7 +718,7 @@ pub const cpu = struct { .stfiwx, }), }; - pub const pwr5 = Cpu{ + pub const pwr5 = CpuModel{ .name = "pwr5", .llvm_name = "pwr5", .features = featureSet(&[_]Feature{ @@ -732,7 +733,7 @@ pub const cpu = struct { .stfiwx, }), }; - pub const pwr5x = Cpu{ + pub const pwr5x = CpuModel{ .name = "pwr5x", .llvm_name = "pwr5x", .features = featureSet(&[_]Feature{ @@ -748,7 +749,7 @@ pub const cpu = struct { .stfiwx, }), }; - pub const pwr6 = Cpu{ + pub const pwr6 = CpuModel{ .name = "pwr6", .llvm_name = "pwr6", .features = featureSet(&[_]Feature{ @@ -768,7 +769,7 @@ pub const cpu = struct { .stfiwx, }), }; - pub const pwr6x = Cpu{ + pub const pwr6x = CpuModel{ .name = "pwr6x", .llvm_name = "pwr6x", .features = featureSet(&[_]Feature{ @@ -788,7 +789,7 @@ pub const cpu = struct { .stfiwx, }), }; - pub const pwr7 = Cpu{ + pub const pwr7 = CpuModel{ .name = "pwr7", .llvm_name = "pwr7", .features = featureSet(&[_]Feature{ @@ -816,7 +817,7 @@ pub const cpu = struct { .vsx, }), }; - pub const pwr8 = Cpu{ + pub const pwr8 = CpuModel{ .name = "pwr8", .llvm_name = "pwr8", .features = featureSet(&[_]Feature{ @@ -851,7 +852,7 @@ pub const cpu = struct { .vsx, }), }; - pub const pwr9 = Cpu{ + pub const pwr9 = CpuModel{ .name = "pwr9", .llvm_name = "pwr9", .features = featureSet(&[_]Feature{ @@ -897,7 +898,7 @@ pub const cpu = struct { /// All powerpc CPUs, sorted alphabetically by name. /// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1 /// compiler has inefficient memory and CPU usage, affecting build times. -pub const all_cpus = &[_]*const Cpu{ +pub const all_cpus = &[_]*const CpuModel{ &cpu.@"440", &cpu.@"450", &cpu.@"601", diff --git a/lib/std/target/riscv.zig b/lib/std/target/riscv.zig index ddf1049a20..a799c29df6 100644 --- a/lib/std/target/riscv.zig +++ b/lib/std/target/riscv.zig @@ -1,5 +1,6 @@ const std = @import("../std.zig"); -const Cpu = std.Target.Cpu; +const CpuFeature = std.Target.Cpu.Feature; +const CpuModel = std.Target.Cpu.Model; pub const Feature = enum { @"64bit", @@ -12,12 +13,12 @@ pub const Feature = enum { relax, }; -pub usingnamespace Cpu.Feature.feature_set_fns(Feature); +pub usingnamespace CpuFeature.feature_set_fns(Feature); pub const all_features = blk: { const len = @typeInfo(Feature).Enum.fields.len; - std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count); - var result: [len]Cpu.Feature = undefined; + std.debug.assert(len <= CpuFeature.Set.needed_bit_count); + var result: [len]CpuFeature = undefined; result[@enumToInt(Feature.@"64bit")] = .{ .llvm_name = "64bit", .description = "Implements RV64", @@ -69,7 +70,7 @@ pub const all_features = blk: { }; pub const cpu = struct { - pub const baseline_rv32 = Cpu{ + pub const baseline_rv32 = CpuModel{ .name = "baseline_rv32", .llvm_name = "generic-rv32", .features = featureSet(&[_]Feature{ @@ -81,7 +82,7 @@ pub const cpu = struct { }), }; - pub const baseline_rv64 = Cpu{ + pub const baseline_rv64 = CpuModel{ .name = "baseline_rv64", .llvm_name = "generic-rv64", .features = featureSet(&[_]Feature{ @@ -94,13 +95,13 @@ pub const cpu = struct { }), }; - pub const generic_rv32 = Cpu{ + pub const generic_rv32 = CpuModel{ .name = "generic_rv32", .llvm_name = "generic-rv32", .features = featureSet(&[_]Feature{}), }; - pub const generic_rv64 = Cpu{ + pub const generic_rv64 = CpuModel{ .name = "generic_rv64", .llvm_name = "generic-rv64", .features = featureSet(&[_]Feature{ @@ -112,7 +113,7 @@ pub const cpu = struct { /// All riscv CPUs, sorted alphabetically by name. /// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1 /// compiler has inefficient memory and CPU usage, affecting build times. -pub const all_cpus = &[_]*const Cpu{ +pub const all_cpus = &[_]*const CpuModel{ &cpu.baseline_rv32, &cpu.baseline_rv64, &cpu.generic_rv32, diff --git a/lib/std/target/sparc.zig b/lib/std/target/sparc.zig index 923cc0732c..3ec6cc7c20 100644 --- a/lib/std/target/sparc.zig +++ b/lib/std/target/sparc.zig @@ -1,5 +1,6 @@ const std = @import("../std.zig"); -const Cpu = std.Target.Cpu; +const CpuFeature = std.Target.Cpu.Feature; +const CpuModel = std.Target.Cpu.Model; pub const Feature = enum { deprecated_v8, @@ -23,12 +24,12 @@ pub const Feature = enum { vis3, }; -pub usingnamespace Cpu.Feature.feature_set_fns(Feature); +pub usingnamespace CpuFeature.feature_set_fns(Feature); pub const all_features = blk: { const len = @typeInfo(Feature).Enum.fields.len; - std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count); - var result: [len]Cpu.Feature = undefined; + std.debug.assert(len <= CpuFeature.Set.needed_bit_count); + var result: [len]CpuFeature = undefined; result[@enumToInt(Feature.deprecated_v8)] = .{ .llvm_name = "deprecated-v8", .description = "Enable deprecated V8 instructions in V9 mode", @@ -133,7 +134,7 @@ pub const all_features = blk: { }; pub const cpu = struct { - pub const at697e = Cpu{ + pub const at697e = CpuModel{ .name = "at697e", .llvm_name = "at697e", .features = featureSet(&[_]Feature{ @@ -141,7 +142,7 @@ pub const cpu = struct { .leon, }), }; - pub const at697f = Cpu{ + pub const at697f = CpuModel{ .name = "at697f", .llvm_name = "at697f", .features = featureSet(&[_]Feature{ @@ -149,17 +150,17 @@ pub const cpu = struct { .leon, }), }; - pub const f934 = Cpu{ + pub const f934 = CpuModel{ .name = "f934", .llvm_name = "f934", .features = featureSet(&[_]Feature{}), }; - pub const generic = Cpu{ + pub const generic = CpuModel{ .name = "generic", .llvm_name = "generic", .features = featureSet(&[_]Feature{}), }; - pub const gr712rc = Cpu{ + pub const gr712rc = CpuModel{ .name = "gr712rc", .llvm_name = "gr712rc", .features = featureSet(&[_]Feature{ @@ -167,7 +168,7 @@ pub const cpu = struct { .leon, }), }; - pub const gr740 = Cpu{ + pub const gr740 = CpuModel{ .name = "gr740", .llvm_name = "gr740", .features = featureSet(&[_]Feature{ @@ -178,19 +179,19 @@ pub const cpu = struct { .leonpwrpsr, }), }; - pub const hypersparc = Cpu{ + pub const hypersparc = CpuModel{ .name = "hypersparc", .llvm_name = "hypersparc", .features = featureSet(&[_]Feature{}), }; - pub const leon2 = Cpu{ + pub const leon2 = CpuModel{ .name = "leon2", .llvm_name = "leon2", .features = featureSet(&[_]Feature{ .leon, }), }; - pub const leon3 = Cpu{ + pub const leon3 = CpuModel{ .name = "leon3", .llvm_name = "leon3", .features = featureSet(&[_]Feature{ @@ -198,7 +199,7 @@ pub const cpu = struct { .leon, }), }; - pub const leon4 = Cpu{ + pub const leon4 = CpuModel{ .name = "leon4", .llvm_name = "leon4", .features = featureSet(&[_]Feature{ @@ -207,7 +208,7 @@ pub const cpu = struct { .leon, }), }; - pub const ma2080 = Cpu{ + pub const ma2080 = CpuModel{ .name = "ma2080", .llvm_name = "ma2080", .features = featureSet(&[_]Feature{ @@ -215,7 +216,7 @@ pub const cpu = struct { .leon, }), }; - pub const ma2085 = Cpu{ + pub const ma2085 = CpuModel{ .name = "ma2085", .llvm_name = "ma2085", .features = featureSet(&[_]Feature{ @@ -223,7 +224,7 @@ pub const cpu = struct { .leon, }), }; - pub const ma2100 = Cpu{ + pub const ma2100 = CpuModel{ .name = "ma2100", .llvm_name = "ma2100", .features = featureSet(&[_]Feature{ @@ -231,7 +232,7 @@ pub const cpu = struct { .leon, }), }; - pub const ma2150 = Cpu{ + pub const ma2150 = CpuModel{ .name = "ma2150", .llvm_name = "ma2150", .features = featureSet(&[_]Feature{ @@ -239,7 +240,7 @@ pub const cpu = struct { .leon, }), }; - pub const ma2155 = Cpu{ + pub const ma2155 = CpuModel{ .name = "ma2155", .llvm_name = "ma2155", .features = featureSet(&[_]Feature{ @@ -247,7 +248,7 @@ pub const cpu = struct { .leon, }), }; - pub const ma2450 = Cpu{ + pub const ma2450 = CpuModel{ .name = "ma2450", .llvm_name = "ma2450", .features = featureSet(&[_]Feature{ @@ -255,7 +256,7 @@ pub const cpu = struct { .leon, }), }; - pub const ma2455 = Cpu{ + pub const ma2455 = CpuModel{ .name = "ma2455", .llvm_name = "ma2455", .features = featureSet(&[_]Feature{ @@ -263,7 +264,7 @@ pub const cpu = struct { .leon, }), }; - pub const ma2480 = Cpu{ + pub const ma2480 = CpuModel{ .name = "ma2480", .llvm_name = "ma2480", .features = featureSet(&[_]Feature{ @@ -271,7 +272,7 @@ pub const cpu = struct { .leon, }), }; - pub const ma2485 = Cpu{ + pub const ma2485 = CpuModel{ .name = "ma2485", .llvm_name = "ma2485", .features = featureSet(&[_]Feature{ @@ -279,7 +280,7 @@ pub const cpu = struct { .leon, }), }; - pub const ma2x5x = Cpu{ + pub const ma2x5x = CpuModel{ .name = "ma2x5x", .llvm_name = "ma2x5x", .features = featureSet(&[_]Feature{ @@ -287,7 +288,7 @@ pub const cpu = struct { .leon, }), }; - pub const ma2x8x = Cpu{ + pub const ma2x8x = CpuModel{ .name = "ma2x8x", .llvm_name = "ma2x8x", .features = featureSet(&[_]Feature{ @@ -295,7 +296,7 @@ pub const cpu = struct { .leon, }), }; - pub const myriad2 = Cpu{ + pub const myriad2 = CpuModel{ .name = "myriad2", .llvm_name = "myriad2", .features = featureSet(&[_]Feature{ @@ -303,7 +304,7 @@ pub const cpu = struct { .leon, }), }; - pub const myriad2_1 = Cpu{ + pub const myriad2_1 = CpuModel{ .name = "myriad2_1", .llvm_name = "myriad2.1", .features = featureSet(&[_]Feature{ @@ -311,7 +312,7 @@ pub const cpu = struct { .leon, }), }; - pub const myriad2_2 = Cpu{ + pub const myriad2_2 = CpuModel{ .name = "myriad2_2", .llvm_name = "myriad2.2", .features = featureSet(&[_]Feature{ @@ -319,7 +320,7 @@ pub const cpu = struct { .leon, }), }; - pub const myriad2_3 = Cpu{ + pub const myriad2_3 = CpuModel{ .name = "myriad2_3", .llvm_name = "myriad2.3", .features = featureSet(&[_]Feature{ @@ -327,7 +328,7 @@ pub const cpu = struct { .leon, }), }; - pub const niagara = Cpu{ + pub const niagara = CpuModel{ .name = "niagara", .llvm_name = "niagara", .features = featureSet(&[_]Feature{ @@ -337,7 +338,7 @@ pub const cpu = struct { .vis2, }), }; - pub const niagara2 = Cpu{ + pub const niagara2 = CpuModel{ .name = "niagara2", .llvm_name = "niagara2", .features = featureSet(&[_]Feature{ @@ -348,7 +349,7 @@ pub const cpu = struct { .vis2, }), }; - pub const niagara3 = Cpu{ + pub const niagara3 = CpuModel{ .name = "niagara3", .llvm_name = "niagara3", .features = featureSet(&[_]Feature{ @@ -359,7 +360,7 @@ pub const cpu = struct { .vis2, }), }; - pub const niagara4 = Cpu{ + pub const niagara4 = CpuModel{ .name = "niagara4", .llvm_name = "niagara4", .features = featureSet(&[_]Feature{ @@ -371,32 +372,32 @@ pub const cpu = struct { .vis3, }), }; - pub const sparclet = Cpu{ + pub const sparclet = CpuModel{ .name = "sparclet", .llvm_name = "sparclet", .features = featureSet(&[_]Feature{}), }; - pub const sparclite = Cpu{ + pub const sparclite = CpuModel{ .name = "sparclite", .llvm_name = "sparclite", .features = featureSet(&[_]Feature{}), }; - pub const sparclite86x = Cpu{ + pub const sparclite86x = CpuModel{ .name = "sparclite86x", .llvm_name = "sparclite86x", .features = featureSet(&[_]Feature{}), }; - pub const supersparc = Cpu{ + pub const supersparc = CpuModel{ .name = "supersparc", .llvm_name = "supersparc", .features = featureSet(&[_]Feature{}), }; - pub const tsc701 = Cpu{ + pub const tsc701 = CpuModel{ .name = "tsc701", .llvm_name = "tsc701", .features = featureSet(&[_]Feature{}), }; - pub const ultrasparc = Cpu{ + pub const ultrasparc = CpuModel{ .name = "ultrasparc", .llvm_name = "ultrasparc", .features = featureSet(&[_]Feature{ @@ -405,7 +406,7 @@ pub const cpu = struct { .vis, }), }; - pub const ultrasparc3 = Cpu{ + pub const ultrasparc3 = CpuModel{ .name = "ultrasparc3", .llvm_name = "ultrasparc3", .features = featureSet(&[_]Feature{ @@ -415,7 +416,7 @@ pub const cpu = struct { .vis2, }), }; - pub const ut699 = Cpu{ + pub const ut699 = CpuModel{ .name = "ut699", .llvm_name = "ut699", .features = featureSet(&[_]Feature{ @@ -426,7 +427,7 @@ pub const cpu = struct { .no_fsmuld, }), }; - pub const v7 = Cpu{ + pub const v7 = CpuModel{ .name = "v7", .llvm_name = "v7", .features = featureSet(&[_]Feature{ @@ -434,12 +435,12 @@ pub const cpu = struct { .soft_mul_div, }), }; - pub const v8 = Cpu{ + pub const v8 = CpuModel{ .name = "v8", .llvm_name = "v8", .features = featureSet(&[_]Feature{}), }; - pub const v9 = Cpu{ + pub const v9 = CpuModel{ .name = "v9", .llvm_name = "v9", .features = featureSet(&[_]Feature{ @@ -451,7 +452,7 @@ pub const cpu = struct { /// All sparc CPUs, sorted alphabetically by name. /// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1 /// compiler has inefficient memory and CPU usage, affecting build times. -pub const all_cpus = &[_]*const Cpu{ +pub const all_cpus = &[_]*const CpuModel{ &cpu.at697e, &cpu.at697f, &cpu.f934, diff --git a/lib/std/target/systemz.zig b/lib/std/target/systemz.zig index c924af6e70..798ecf5630 100644 --- a/lib/std/target/systemz.zig +++ b/lib/std/target/systemz.zig @@ -1,5 +1,6 @@ const std = @import("../std.zig"); -const Cpu = std.Target.Cpu; +const CpuFeature = std.Target.Cpu.Feature; +const CpuModel = std.Target.Cpu.Model; pub const Feature = enum { deflate_conversion, @@ -39,12 +40,12 @@ pub const Feature = enum { vector_packed_decimal_enhancement, }; -pub usingnamespace Cpu.Feature.feature_set_fns(Feature); +pub usingnamespace CpuFeature.feature_set_fns(Feature); pub const all_features = blk: { const len = @typeInfo(Feature).Enum.fields.len; - std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count); - var result: [len]Cpu.Feature = undefined; + std.debug.assert(len <= CpuFeature.Set.needed_bit_count); + var result: [len]CpuFeature = undefined; result[@enumToInt(Feature.deflate_conversion)] = .{ .llvm_name = "deflate-conversion", .description = "Assume that the deflate-conversion facility is installed", @@ -229,7 +230,7 @@ pub const all_features = blk: { }; pub const cpu = struct { - pub const arch10 = Cpu{ + pub const arch10 = CpuModel{ .name = "arch10", .llvm_name = "arch10", .features = featureSet(&[_]Feature{ @@ -252,7 +253,7 @@ pub const cpu = struct { .transactional_execution, }), }; - pub const arch11 = Cpu{ + pub const arch11 = CpuModel{ .name = "arch11", .llvm_name = "arch11", .features = featureSet(&[_]Feature{ @@ -280,7 +281,7 @@ pub const cpu = struct { .vector, }), }; - pub const arch12 = Cpu{ + pub const arch12 = CpuModel{ .name = "arch12", .llvm_name = "arch12", .features = featureSet(&[_]Feature{ @@ -315,7 +316,7 @@ pub const cpu = struct { .vector_packed_decimal, }), }; - pub const arch13 = Cpu{ + pub const arch13 = CpuModel{ .name = "arch13", .llvm_name = "arch13", .features = featureSet(&[_]Feature{ @@ -356,12 +357,12 @@ pub const cpu = struct { .vector_packed_decimal_enhancement, }), }; - pub const arch8 = Cpu{ + pub const arch8 = CpuModel{ .name = "arch8", .llvm_name = "arch8", .features = featureSet(&[_]Feature{}), }; - pub const arch9 = Cpu{ + pub const arch9 = CpuModel{ .name = "arch9", .llvm_name = "arch9", .features = featureSet(&[_]Feature{ @@ -377,17 +378,17 @@ pub const cpu = struct { .reset_reference_bits_multiple, }), }; - pub const generic = Cpu{ + pub const generic = CpuModel{ .name = "generic", .llvm_name = "generic", .features = featureSet(&[_]Feature{}), }; - pub const z10 = Cpu{ + pub const z10 = CpuModel{ .name = "z10", .llvm_name = "z10", .features = featureSet(&[_]Feature{}), }; - pub const z13 = Cpu{ + pub const z13 = CpuModel{ .name = "z13", .llvm_name = "z13", .features = featureSet(&[_]Feature{ @@ -415,7 +416,7 @@ pub const cpu = struct { .vector, }), }; - pub const z14 = Cpu{ + pub const z14 = CpuModel{ .name = "z14", .llvm_name = "z14", .features = featureSet(&[_]Feature{ @@ -450,7 +451,7 @@ pub const cpu = struct { .vector_packed_decimal, }), }; - pub const z196 = Cpu{ + pub const z196 = CpuModel{ .name = "z196", .llvm_name = "z196", .features = featureSet(&[_]Feature{ @@ -466,7 +467,7 @@ pub const cpu = struct { .reset_reference_bits_multiple, }), }; - pub const zEC12 = Cpu{ + pub const zEC12 = CpuModel{ .name = "zEC12", .llvm_name = "zEC12", .features = featureSet(&[_]Feature{ @@ -494,7 +495,7 @@ pub const cpu = struct { /// All systemz CPUs, sorted alphabetically by name. /// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1 /// compiler has inefficient memory and CPU usage, affecting build times. -pub const all_cpus = &[_]*const Cpu{ +pub const all_cpus = &[_]*const CpuModel{ &cpu.arch10, &cpu.arch11, &cpu.arch12, diff --git a/lib/std/target/wasm.zig b/lib/std/target/wasm.zig index 6d79bbb282..066282f3c6 100644 --- a/lib/std/target/wasm.zig +++ b/lib/std/target/wasm.zig @@ -1,5 +1,6 @@ const std = @import("../std.zig"); -const Cpu = std.Target.Cpu; +const CpuFeature = std.Target.Cpu.Feature; +const CpuModel = std.Target.Cpu.Model; pub const Feature = enum { atomics, @@ -14,12 +15,12 @@ pub const Feature = enum { unimplemented_simd128, }; -pub usingnamespace Cpu.Feature.feature_set_fns(Feature); +pub usingnamespace CpuFeature.feature_set_fns(Feature); pub const all_features = blk: { const len = @typeInfo(Feature).Enum.fields.len; - std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count); - var result: [len]Cpu.Feature = undefined; + std.debug.assert(len <= CpuFeature.Set.needed_bit_count); + var result: [len]CpuFeature = undefined; result[@enumToInt(Feature.atomics)] = .{ .llvm_name = "atomics", .description = "Enable Atomics", @@ -81,7 +82,7 @@ pub const all_features = blk: { }; pub const cpu = struct { - pub const bleeding_edge = Cpu{ + pub const bleeding_edge = CpuModel{ .name = "bleeding_edge", .llvm_name = "bleeding-edge", .features = featureSet(&[_]Feature{ @@ -92,12 +93,12 @@ pub const cpu = struct { .simd128, }), }; - pub const generic = Cpu{ + pub const generic = CpuModel{ .name = "generic", .llvm_name = "generic", .features = featureSet(&[_]Feature{}), }; - pub const mvp = Cpu{ + pub const mvp = CpuModel{ .name = "mvp", .llvm_name = "mvp", .features = featureSet(&[_]Feature{}), @@ -107,7 +108,7 @@ pub const cpu = struct { /// All wasm CPUs, sorted alphabetically by name. /// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1 /// compiler has inefficient memory and CPU usage, affecting build times. -pub const all_cpus = &[_]*const Cpu{ +pub const all_cpus = &[_]*const CpuModel{ &cpu.bleeding_edge, &cpu.generic, &cpu.mvp, diff --git a/lib/std/target/x86.zig b/lib/std/target/x86.zig index 3c2e306e79..1e2ac409bd 100644 --- a/lib/std/target/x86.zig +++ b/lib/std/target/x86.zig @@ -1,5 +1,6 @@ const std = @import("../std.zig"); -const Cpu = std.Target.Cpu; +const CpuFeature = std.Target.Cpu.Feature; +const CpuModel = std.Target.Cpu.Model; pub const Feature = enum { @"3dnow", @@ -125,12 +126,12 @@ pub const Feature = enum { xsaves, }; -pub usingnamespace Cpu.Feature.feature_set_fns(Feature); +pub usingnamespace CpuFeature.feature_set_fns(Feature); pub const all_features = blk: { const len = @typeInfo(Feature).Enum.fields.len; - std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count); - var result: [len]Cpu.Feature = undefined; + std.debug.assert(len <= CpuFeature.Set.needed_bit_count); + var result: [len]CpuFeature = undefined; result[@enumToInt(Feature.@"3dnow")] = .{ .llvm_name = "3dnow", .description = "Enable 3DNow! instructions", @@ -829,7 +830,7 @@ pub const all_features = blk: { }; pub const cpu = struct { - pub const amdfam10 = Cpu{ + pub const amdfam10 = CpuModel{ .name = "amdfam10", .llvm_name = "amdfam10", .features = featureSet(&[_]Feature{ @@ -849,7 +850,7 @@ pub const cpu = struct { .x87, }), }; - pub const athlon = Cpu{ + pub const athlon = CpuModel{ .name = "athlon", .llvm_name = "athlon", .features = featureSet(&[_]Feature{ @@ -862,7 +863,7 @@ pub const cpu = struct { .x87, }), }; - pub const athlon_4 = Cpu{ + pub const athlon_4 = CpuModel{ .name = "athlon_4", .llvm_name = "athlon-4", .features = featureSet(&[_]Feature{ @@ -877,7 +878,7 @@ pub const cpu = struct { .x87, }), }; - pub const athlon_fx = Cpu{ + pub const athlon_fx = CpuModel{ .name = "athlon_fx", .llvm_name = "athlon-fx", .features = featureSet(&[_]Feature{ @@ -894,7 +895,7 @@ pub const cpu = struct { .x87, }), }; - pub const athlon_mp = Cpu{ + pub const athlon_mp = CpuModel{ .name = "athlon_mp", .llvm_name = "athlon-mp", .features = featureSet(&[_]Feature{ @@ -909,7 +910,7 @@ pub const cpu = struct { .x87, }), }; - pub const athlon_tbird = Cpu{ + pub const athlon_tbird = CpuModel{ .name = "athlon_tbird", .llvm_name = "athlon-tbird", .features = featureSet(&[_]Feature{ @@ -922,7 +923,7 @@ pub const cpu = struct { .x87, }), }; - pub const athlon_xp = Cpu{ + pub const athlon_xp = CpuModel{ .name = "athlon_xp", .llvm_name = "athlon-xp", .features = featureSet(&[_]Feature{ @@ -937,7 +938,7 @@ pub const cpu = struct { .x87, }), }; - pub const athlon64 = Cpu{ + pub const athlon64 = CpuModel{ .name = "athlon64", .llvm_name = "athlon64", .features = featureSet(&[_]Feature{ @@ -954,7 +955,7 @@ pub const cpu = struct { .x87, }), }; - pub const athlon64_sse3 = Cpu{ + pub const athlon64_sse3 = CpuModel{ .name = "athlon64_sse3", .llvm_name = "athlon64-sse3", .features = featureSet(&[_]Feature{ @@ -972,7 +973,7 @@ pub const cpu = struct { .x87, }), }; - pub const atom = Cpu{ + pub const atom = CpuModel{ .name = "atom", .llvm_name = "atom", .features = featureSet(&[_]Feature{ @@ -996,7 +997,7 @@ pub const cpu = struct { .x87, }), }; - pub const barcelona = Cpu{ + pub const barcelona = CpuModel{ .name = "barcelona", .llvm_name = "barcelona", .features = featureSet(&[_]Feature{ @@ -1016,7 +1017,7 @@ pub const cpu = struct { .x87, }), }; - pub const bdver1 = Cpu{ + pub const bdver1 = CpuModel{ .name = "bdver1", .llvm_name = "bdver1", .features = featureSet(&[_]Feature{ @@ -1043,7 +1044,7 @@ pub const cpu = struct { .xsave, }), }; - pub const bdver2 = Cpu{ + pub const bdver2 = CpuModel{ .name = "bdver2", .llvm_name = "bdver2", .features = featureSet(&[_]Feature{ @@ -1075,7 +1076,7 @@ pub const cpu = struct { .xsave, }), }; - pub const bdver3 = Cpu{ + pub const bdver3 = CpuModel{ .name = "bdver3", .llvm_name = "bdver3", .features = featureSet(&[_]Feature{ @@ -1109,7 +1110,7 @@ pub const cpu = struct { .xsaveopt, }), }; - pub const bdver4 = Cpu{ + pub const bdver4 = CpuModel{ .name = "bdver4", .llvm_name = "bdver4", .features = featureSet(&[_]Feature{ @@ -1146,7 +1147,7 @@ pub const cpu = struct { .xsaveopt, }), }; - pub const bonnell = Cpu{ + pub const bonnell = CpuModel{ .name = "bonnell", .llvm_name = "bonnell", .features = featureSet(&[_]Feature{ @@ -1170,7 +1171,7 @@ pub const cpu = struct { .x87, }), }; - pub const broadwell = Cpu{ + pub const broadwell = CpuModel{ .name = "broadwell", .llvm_name = "broadwell", .features = featureSet(&[_]Feature{ @@ -1214,7 +1215,7 @@ pub const cpu = struct { .xsaveopt, }), }; - pub const btver1 = Cpu{ + pub const btver1 = CpuModel{ .name = "btver1", .llvm_name = "btver1", .features = featureSet(&[_]Feature{ @@ -1238,7 +1239,7 @@ pub const cpu = struct { .x87, }), }; - pub const btver2 = Cpu{ + pub const btver2 = CpuModel{ .name = "btver2", .llvm_name = "btver2", .features = featureSet(&[_]Feature{ @@ -1274,7 +1275,7 @@ pub const cpu = struct { .xsaveopt, }), }; - pub const c3 = Cpu{ + pub const c3 = CpuModel{ .name = "c3", .llvm_name = "c3", .features = featureSet(&[_]Feature{ @@ -1283,7 +1284,7 @@ pub const cpu = struct { .x87, }), }; - pub const c3_2 = Cpu{ + pub const c3_2 = CpuModel{ .name = "c3_2", .llvm_name = "c3-2", .features = featureSet(&[_]Feature{ @@ -1296,7 +1297,7 @@ pub const cpu = struct { .x87, }), }; - pub const cannonlake = Cpu{ + pub const cannonlake = CpuModel{ .name = "cannonlake", .llvm_name = "cannonlake", .features = featureSet(&[_]Feature{ @@ -1355,7 +1356,7 @@ pub const cpu = struct { .xsaves, }), }; - pub const cascadelake = Cpu{ + pub const cascadelake = CpuModel{ .name = "cascadelake", .llvm_name = "cascadelake", .features = featureSet(&[_]Feature{ @@ -1413,7 +1414,7 @@ pub const cpu = struct { .xsaves, }), }; - pub const cooperlake = Cpu{ + pub const cooperlake = CpuModel{ .name = "cooperlake", .llvm_name = "cooperlake", .features = featureSet(&[_]Feature{ @@ -1472,7 +1473,7 @@ pub const cpu = struct { .xsaves, }), }; - pub const core_avx_i = Cpu{ + pub const core_avx_i = CpuModel{ .name = "core_avx_i", .llvm_name = "core-avx-i", .features = featureSet(&[_]Feature{ @@ -1504,7 +1505,7 @@ pub const cpu = struct { .xsaveopt, }), }; - pub const core_avx2 = Cpu{ + pub const core_avx2 = CpuModel{ .name = "core_avx2", .llvm_name = "core-avx2", .features = featureSet(&[_]Feature{ @@ -1545,7 +1546,7 @@ pub const cpu = struct { .xsaveopt, }), }; - pub const core2 = Cpu{ + pub const core2 = CpuModel{ .name = "core2", .llvm_name = "core2", .features = featureSet(&[_]Feature{ @@ -1563,7 +1564,7 @@ pub const cpu = struct { .x87, }), }; - pub const corei7 = Cpu{ + pub const corei7 = CpuModel{ .name = "corei7", .llvm_name = "corei7", .features = featureSet(&[_]Feature{ @@ -1581,7 +1582,7 @@ pub const cpu = struct { .x87, }), }; - pub const corei7_avx = Cpu{ + pub const corei7_avx = CpuModel{ .name = "corei7_avx", .llvm_name = "corei7-avx", .features = featureSet(&[_]Feature{ @@ -1610,7 +1611,7 @@ pub const cpu = struct { .xsaveopt, }), }; - pub const generic = Cpu{ + pub const generic = CpuModel{ .name = "generic", .llvm_name = "generic", .features = featureSet(&[_]Feature{ @@ -1619,7 +1620,7 @@ pub const cpu = struct { .x87, }), }; - pub const geode = Cpu{ + pub const geode = CpuModel{ .name = "geode", .llvm_name = "geode", .features = featureSet(&[_]Feature{ @@ -1629,7 +1630,7 @@ pub const cpu = struct { .x87, }), }; - pub const goldmont = Cpu{ + pub const goldmont = CpuModel{ .name = "goldmont", .llvm_name = "goldmont", .features = featureSet(&[_]Feature{ @@ -1665,7 +1666,7 @@ pub const cpu = struct { .xsaves, }), }; - pub const goldmont_plus = Cpu{ + pub const goldmont_plus = CpuModel{ .name = "goldmont_plus", .llvm_name = "goldmont-plus", .features = featureSet(&[_]Feature{ @@ -1703,7 +1704,7 @@ pub const cpu = struct { .xsaves, }), }; - pub const haswell = Cpu{ + pub const haswell = CpuModel{ .name = "haswell", .llvm_name = "haswell", .features = featureSet(&[_]Feature{ @@ -1744,7 +1745,7 @@ pub const cpu = struct { .xsaveopt, }), }; - pub const _i386 = Cpu{ + pub const _i386 = CpuModel{ .name = "_i386", .llvm_name = "i386", .features = featureSet(&[_]Feature{ @@ -1752,7 +1753,7 @@ pub const cpu = struct { .x87, }), }; - pub const _i486 = Cpu{ + pub const _i486 = CpuModel{ .name = "_i486", .llvm_name = "i486", .features = featureSet(&[_]Feature{ @@ -1760,7 +1761,7 @@ pub const cpu = struct { .x87, }), }; - pub const _i586 = Cpu{ + pub const _i586 = CpuModel{ .name = "_i586", .llvm_name = "i586", .features = featureSet(&[_]Feature{ @@ -1769,7 +1770,7 @@ pub const cpu = struct { .x87, }), }; - pub const _i686 = Cpu{ + pub const _i686 = CpuModel{ .name = "_i686", .llvm_name = "i686", .features = featureSet(&[_]Feature{ @@ -1779,7 +1780,7 @@ pub const cpu = struct { .x87, }), }; - pub const icelake_client = Cpu{ + pub const icelake_client = CpuModel{ .name = "icelake_client", .llvm_name = "icelake-client", .features = featureSet(&[_]Feature{ @@ -1847,7 +1848,7 @@ pub const cpu = struct { .xsaves, }), }; - pub const icelake_server = Cpu{ + pub const icelake_server = CpuModel{ .name = "icelake_server", .llvm_name = "icelake-server", .features = featureSet(&[_]Feature{ @@ -1917,7 +1918,7 @@ pub const cpu = struct { .xsaves, }), }; - pub const ivybridge = Cpu{ + pub const ivybridge = CpuModel{ .name = "ivybridge", .llvm_name = "ivybridge", .features = featureSet(&[_]Feature{ @@ -1949,7 +1950,7 @@ pub const cpu = struct { .xsaveopt, }), }; - pub const k6 = Cpu{ + pub const k6 = CpuModel{ .name = "k6", .llvm_name = "k6", .features = featureSet(&[_]Feature{ @@ -1959,7 +1960,7 @@ pub const cpu = struct { .x87, }), }; - pub const k6_2 = Cpu{ + pub const k6_2 = CpuModel{ .name = "k6_2", .llvm_name = "k6-2", .features = featureSet(&[_]Feature{ @@ -1969,7 +1970,7 @@ pub const cpu = struct { .x87, }), }; - pub const k6_3 = Cpu{ + pub const k6_3 = CpuModel{ .name = "k6_3", .llvm_name = "k6-3", .features = featureSet(&[_]Feature{ @@ -1979,7 +1980,7 @@ pub const cpu = struct { .x87, }), }; - pub const k8 = Cpu{ + pub const k8 = CpuModel{ .name = "k8", .llvm_name = "k8", .features = featureSet(&[_]Feature{ @@ -1996,7 +1997,7 @@ pub const cpu = struct { .x87, }), }; - pub const k8_sse3 = Cpu{ + pub const k8_sse3 = CpuModel{ .name = "k8_sse3", .llvm_name = "k8-sse3", .features = featureSet(&[_]Feature{ @@ -2014,7 +2015,7 @@ pub const cpu = struct { .x87, }), }; - pub const knl = Cpu{ + pub const knl = CpuModel{ .name = "knl", .llvm_name = "knl", .features = featureSet(&[_]Feature{ @@ -2057,7 +2058,7 @@ pub const cpu = struct { .xsaveopt, }), }; - pub const knm = Cpu{ + pub const knm = CpuModel{ .name = "knm", .llvm_name = "knm", .features = featureSet(&[_]Feature{ @@ -2101,12 +2102,12 @@ pub const cpu = struct { .xsaveopt, }), }; - pub const lakemont = Cpu{ + pub const lakemont = CpuModel{ .name = "lakemont", .llvm_name = "lakemont", .features = featureSet(&[_]Feature{}), }; - pub const nehalem = Cpu{ + pub const nehalem = CpuModel{ .name = "nehalem", .llvm_name = "nehalem", .features = featureSet(&[_]Feature{ @@ -2124,7 +2125,7 @@ pub const cpu = struct { .x87, }), }; - pub const nocona = Cpu{ + pub const nocona = CpuModel{ .name = "nocona", .llvm_name = "nocona", .features = featureSet(&[_]Feature{ @@ -2140,7 +2141,7 @@ pub const cpu = struct { .x87, }), }; - pub const opteron = Cpu{ + pub const opteron = CpuModel{ .name = "opteron", .llvm_name = "opteron", .features = featureSet(&[_]Feature{ @@ -2157,7 +2158,7 @@ pub const cpu = struct { .x87, }), }; - pub const opteron_sse3 = Cpu{ + pub const opteron_sse3 = CpuModel{ .name = "opteron_sse3", .llvm_name = "opteron-sse3", .features = featureSet(&[_]Feature{ @@ -2175,7 +2176,7 @@ pub const cpu = struct { .x87, }), }; - pub const penryn = Cpu{ + pub const penryn = CpuModel{ .name = "penryn", .llvm_name = "penryn", .features = featureSet(&[_]Feature{ @@ -2193,7 +2194,7 @@ pub const cpu = struct { .x87, }), }; - pub const pentium = Cpu{ + pub const pentium = CpuModel{ .name = "pentium", .llvm_name = "pentium", .features = featureSet(&[_]Feature{ @@ -2202,7 +2203,7 @@ pub const cpu = struct { .x87, }), }; - pub const pentium_m = Cpu{ + pub const pentium_m = CpuModel{ .name = "pentium_m", .llvm_name = "pentium-m", .features = featureSet(&[_]Feature{ @@ -2216,7 +2217,7 @@ pub const cpu = struct { .x87, }), }; - pub const pentium_mmx = Cpu{ + pub const pentium_mmx = CpuModel{ .name = "pentium_mmx", .llvm_name = "pentium-mmx", .features = featureSet(&[_]Feature{ @@ -2226,7 +2227,7 @@ pub const cpu = struct { .x87, }), }; - pub const pentium2 = Cpu{ + pub const pentium2 = CpuModel{ .name = "pentium2", .llvm_name = "pentium2", .features = featureSet(&[_]Feature{ @@ -2239,7 +2240,7 @@ pub const cpu = struct { .x87, }), }; - pub const pentium3 = Cpu{ + pub const pentium3 = CpuModel{ .name = "pentium3", .llvm_name = "pentium3", .features = featureSet(&[_]Feature{ @@ -2253,7 +2254,7 @@ pub const cpu = struct { .x87, }), }; - pub const pentium3m = Cpu{ + pub const pentium3m = CpuModel{ .name = "pentium3m", .llvm_name = "pentium3m", .features = featureSet(&[_]Feature{ @@ -2267,7 +2268,7 @@ pub const cpu = struct { .x87, }), }; - pub const pentium4 = Cpu{ + pub const pentium4 = CpuModel{ .name = "pentium4", .llvm_name = "pentium4", .features = featureSet(&[_]Feature{ @@ -2281,7 +2282,7 @@ pub const cpu = struct { .x87, }), }; - pub const pentium4m = Cpu{ + pub const pentium4m = CpuModel{ .name = "pentium4m", .llvm_name = "pentium4m", .features = featureSet(&[_]Feature{ @@ -2295,7 +2296,7 @@ pub const cpu = struct { .x87, }), }; - pub const pentiumpro = Cpu{ + pub const pentiumpro = CpuModel{ .name = "pentiumpro", .llvm_name = "pentiumpro", .features = featureSet(&[_]Feature{ @@ -2306,7 +2307,7 @@ pub const cpu = struct { .x87, }), }; - pub const prescott = Cpu{ + pub const prescott = CpuModel{ .name = "prescott", .llvm_name = "prescott", .features = featureSet(&[_]Feature{ @@ -2320,7 +2321,7 @@ pub const cpu = struct { .x87, }), }; - pub const sandybridge = Cpu{ + pub const sandybridge = CpuModel{ .name = "sandybridge", .llvm_name = "sandybridge", .features = featureSet(&[_]Feature{ @@ -2349,7 +2350,7 @@ pub const cpu = struct { .xsaveopt, }), }; - pub const silvermont = Cpu{ + pub const silvermont = CpuModel{ .name = "silvermont", .llvm_name = "silvermont", .features = featureSet(&[_]Feature{ @@ -2377,7 +2378,7 @@ pub const cpu = struct { .x87, }), }; - pub const skx = Cpu{ + pub const skx = CpuModel{ .name = "skx", .llvm_name = "skx", .features = featureSet(&[_]Feature{ @@ -2434,7 +2435,7 @@ pub const cpu = struct { .xsaves, }), }; - pub const skylake = Cpu{ + pub const skylake = CpuModel{ .name = "skylake", .llvm_name = "skylake", .features = featureSet(&[_]Feature{ @@ -2485,7 +2486,7 @@ pub const cpu = struct { .xsaves, }), }; - pub const skylake_avx512 = Cpu{ + pub const skylake_avx512 = CpuModel{ .name = "skylake_avx512", .llvm_name = "skylake-avx512", .features = featureSet(&[_]Feature{ @@ -2542,7 +2543,7 @@ pub const cpu = struct { .xsaves, }), }; - pub const slm = Cpu{ + pub const slm = CpuModel{ .name = "slm", .llvm_name = "slm", .features = featureSet(&[_]Feature{ @@ -2570,7 +2571,7 @@ pub const cpu = struct { .x87, }), }; - pub const tremont = Cpu{ + pub const tremont = CpuModel{ .name = "tremont", .llvm_name = "tremont", .features = featureSet(&[_]Feature{ @@ -2613,7 +2614,7 @@ pub const cpu = struct { .xsaves, }), }; - pub const westmere = Cpu{ + pub const westmere = CpuModel{ .name = "westmere", .llvm_name = "westmere", .features = featureSet(&[_]Feature{ @@ -2632,7 +2633,7 @@ pub const cpu = struct { .x87, }), }; - pub const winchip_c6 = Cpu{ + pub const winchip_c6 = CpuModel{ .name = "winchip_c6", .llvm_name = "winchip-c6", .features = featureSet(&[_]Feature{ @@ -2641,7 +2642,7 @@ pub const cpu = struct { .x87, }), }; - pub const winchip2 = Cpu{ + pub const winchip2 = CpuModel{ .name = "winchip2", .llvm_name = "winchip2", .features = featureSet(&[_]Feature{ @@ -2650,7 +2651,7 @@ pub const cpu = struct { .x87, }), }; - pub const x86_64 = Cpu{ + pub const x86_64 = CpuModel{ .name = "x86_64", .llvm_name = "x86-64", .features = featureSet(&[_]Feature{ @@ -2667,7 +2668,7 @@ pub const cpu = struct { .x87, }), }; - pub const yonah = Cpu{ + pub const yonah = CpuModel{ .name = "yonah", .llvm_name = "yonah", .features = featureSet(&[_]Feature{ @@ -2681,7 +2682,7 @@ pub const cpu = struct { .x87, }), }; - pub const znver1 = Cpu{ + pub const znver1 = CpuModel{ .name = "znver1", .llvm_name = "znver1", .features = featureSet(&[_]Feature{ @@ -2725,7 +2726,7 @@ pub const cpu = struct { .xsaves, }), }; - pub const znver2 = Cpu{ + pub const znver2 = CpuModel{ .name = "znver2", .llvm_name = "znver2", .features = featureSet(&[_]Feature{ @@ -2777,7 +2778,7 @@ pub const cpu = struct { /// All x86 CPUs, sorted alphabetically by name. /// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1 /// compiler has inefficient memory and CPU usage, affecting build times. -pub const all_cpus = &[_]*const Cpu{ +pub const all_cpus = &[_]*const CpuModel{ &cpu.amdfam10, &cpu.athlon, &cpu.athlon_4, diff --git a/src-self-hosted/libc_installation.zig b/src-self-hosted/libc_installation.zig index fd920ad291..8d7bd1fd4d 100644 --- a/src-self-hosted/libc_installation.zig +++ b/src-self-hosted/libc_installation.zig @@ -577,10 +577,9 @@ pub fn detectNativeDynamicLinker(allocator: *Allocator) error{ // skip adding it to `ld_info_list`. const target: Target = .{ .Cross = .{ - .arch = Target.current.getArch(), + .cpu = Target.Cpu.baseline(Target.current.getArch()), .os = Target.current.getOs(), .abi = abi, - .cpu_features = Target.current.getArch().getBaselineCpuFeatures(), }, }; const standard_ld_path = target.getStandardDynamicLinkerPath(allocator) catch |err| switch (err) { diff --git a/src-self-hosted/print_targets.zig b/src-self-hosted/print_targets.zig index 79041da431..16f1891164 100644 --- a/src-self-hosted/print_targets.zig +++ b/src-self-hosted/print_targets.zig @@ -113,37 +113,14 @@ pub fn cmdTargets( try jws.beginObject(); try jws.objectField("arch"); - try jws.beginObject(); + try jws.beginArray(); { - inline for (@typeInfo(Target.Arch).Union.fields) |field| { - try jws.objectField(field.name); - if (field.field_type == void) { - try jws.emitNull(); - } else { - try jws.emitString(@typeName(field.field_type)); - } - } - } - try jws.endObject(); - - try jws.objectField("subArch"); - try jws.beginObject(); - const sub_arch_list = [_]type{ - Target.Arch.Arm32, - Target.Arch.Arm64, - Target.Arch.Kalimba, - Target.Arch.Mips, - }; - inline for (sub_arch_list) |SubArch| { - try jws.objectField(@typeName(SubArch)); - try jws.beginArray(); - inline for (@typeInfo(SubArch).Enum.fields) |field| { + inline for (@typeInfo(Target.Cpu.Arch).Enum.fields) |field| { try jws.arrayElem(); try jws.emitString(field.name); } - try jws.endArray(); } - try jws.endObject(); + try jws.endArray(); try jws.objectField("os"); try jws.beginArray(); @@ -179,15 +156,15 @@ pub fn cmdTargets( try jws.objectField("cpus"); try jws.beginObject(); - inline for (@typeInfo(Target.Arch).Union.fields) |field| { + inline for (@typeInfo(Target.Cpu.Arch).Enum.fields) |field| { try jws.objectField(field.name); try jws.beginObject(); - const arch = @unionInit(Target.Arch, field.name, undefined); - for (arch.allCpus()) |cpu| { - try jws.objectField(cpu.name); + const arch = @field(Target.Cpu.Arch, field.name); + for (arch.allCpuModels()) |model| { + try jws.objectField(model.name); try jws.beginArray(); for (arch.allFeaturesList()) |feature, i| { - if (cpu.features.isEnabled(@intCast(u8, i))) { + if (model.features.isEnabled(@intCast(u8, i))) { try jws.arrayElem(); try jws.emitString(feature.name); } @@ -200,10 +177,10 @@ pub fn cmdTargets( try jws.objectField("cpuFeatures"); try jws.beginObject(); - inline for (@typeInfo(Target.Arch).Union.fields) |field| { + inline for (@typeInfo(Target.Cpu.Arch).Enum.fields) |field| { try jws.objectField(field.name); try jws.beginArray(); - const arch = @unionInit(Target.Arch, field.name, undefined); + const arch = @field(Target.Cpu.Arch, field.name); for (arch.allFeaturesList()) |feature| { try jws.arrayElem(); try jws.emitString(feature.name); @@ -220,27 +197,34 @@ pub fn cmdTargets( try jws.objectField("triple"); try jws.emitString(triple); } - try jws.objectField("arch"); - try jws.emitString(@tagName(native_target.getArch())); + { + try jws.objectField("cpu"); + try jws.beginObject(); + try jws.objectField("arch"); + try jws.emitString(@tagName(native_target.getArch())); + + try jws.objectField("name"); + const cpu = native_target.getCpu(); + try jws.emitString(cpu.model.name); + + { + try jws.objectField("features"); + try jws.beginArray(); + for (native_target.getArch().allFeaturesList()) |feature, i_usize| { + const index = @intCast(Target.Cpu.Feature.Set.Index, i_usize); + if (cpu.features.isEnabled(index)) { + try jws.arrayElem(); + try jws.emitString(feature.name); + } + } + try jws.endArray(); + } + try jws.endObject(); + } try jws.objectField("os"); try jws.emitString(@tagName(native_target.getOs())); try jws.objectField("abi"); try jws.emitString(@tagName(native_target.getAbi())); - try jws.objectField("cpuName"); - const cpu_features = native_target.getCpuFeatures(); - try jws.emitString(cpu_features.cpu.name); - { - try jws.objectField("cpuFeatures"); - try jws.beginArray(); - for (native_target.getArch().allFeaturesList()) |feature, i_usize| { - const index = @intCast(Target.Cpu.Feature.Set.Index, i_usize); - if (cpu_features.features.isEnabled(index)) { - try jws.arrayElem(); - try jws.emitString(feature.name); - } - } - try jws.endArray(); - } // TODO implement native glibc version detection in self-hosted try jws.endObject(); diff --git a/src-self-hosted/stage2.zig b/src-self-hosted/stage2.zig index b278bb9f75..048686190d 100644 --- a/src-self-hosted/stage2.zig +++ b/src-self-hosted/stage2.zig @@ -88,7 +88,6 @@ const Error = extern enum { IsAsync, ImportOutsidePkgPath, UnknownCpu, - UnknownSubArchitecture, UnknownCpuFeature, InvalidCpuFeatures, InvalidLlvmCpuFeaturesFormat, @@ -560,25 +559,26 @@ export fn stage2_progress_update_node(node: *std.Progress.Node, done_count: usiz node.context.maybeRefresh(); } -fn cpuFeaturesFromLLVM( - arch: Target.Arch, +fn detectNativeCpuWithLLVM( + arch: Target.Cpu.Arch, llvm_cpu_name_z: ?[*:0]const u8, llvm_cpu_features_opt: ?[*:0]const u8, -) !Target.CpuFeatures { - var result = arch.getBaselineCpuFeatures(); +) !Target.Cpu { + var result = Target.Cpu.baseline(arch); if (llvm_cpu_name_z) |cpu_name_z| { const llvm_cpu_name = mem.toSliceConst(u8, cpu_name_z); - for (arch.allCpus()) |cpu| { - const this_llvm_name = cpu.llvm_name orelse continue; + for (arch.allCpuModels()) |model| { + const this_llvm_name = model.llvm_name orelse continue; if (mem.eql(u8, this_llvm_name, llvm_cpu_name)) { // Here we use the non-dependencies-populated set, // so that subtracting features later in this function // affect the prepopulated set. - result = Target.CpuFeatures{ - .cpu = cpu, - .features = cpu.features, + result = Target.Cpu{ + .arch = arch, + .model = model, + .features = model.features, }; break; } @@ -632,12 +632,12 @@ export fn stage2_cmd_targets(zig_triple: [*:0]const u8) c_int { } fn cmdTargets(zig_triple: [*:0]const u8) !void { - var target = try Target.parse(mem.toSliceConst(u8, zig_triple)); - target.Cross.cpu_features = blk: { + var target = try Target.parse(.{ .arch_os_abi = mem.toSliceConst(u8, zig_triple) }); + target.Cross.cpu = blk: { const llvm = @import("llvm.zig"); const llvm_cpu_name = llvm.GetHostCPUName(); const llvm_cpu_features = llvm.GetNativeFeatures(); - break :blk try cpuFeaturesFromLLVM(target.Cross.arch, llvm_cpu_name, llvm_cpu_features); + break :blk try detectNativeCpuWithLLVM(target.getArch(), llvm_cpu_name, llvm_cpu_features); }; return @import("print_targets.zig").cmdTargets( std.heap.c_allocator, @@ -647,208 +647,101 @@ fn cmdTargets(zig_triple: [*:0]const u8) !void { ); } -const Stage2CpuFeatures = struct { - allocator: *mem.Allocator, - cpu_features: Target.CpuFeatures, - - llvm_features_str: ?[*:0]const u8, - - builtin_str: [:0]const u8, - cache_hash: [:0]const u8, - - const Self = @This(); - - fn createFromNative(allocator: *mem.Allocator) !*Self { - const arch = Target.current.getArch(); - const llvm = @import("llvm.zig"); - const llvm_cpu_name = llvm.GetHostCPUName(); - const llvm_cpu_features = llvm.GetNativeFeatures(); - const cpu_features = try cpuFeaturesFromLLVM(arch, llvm_cpu_name, llvm_cpu_features); - return createFromCpuFeatures(allocator, arch, cpu_features); - } - - fn createFromCpuFeatures( - allocator: *mem.Allocator, - arch: Target.Arch, - cpu_features: Target.CpuFeatures, - ) !*Self { - const self = try allocator.create(Self); - errdefer allocator.destroy(self); - - const cache_hash = try std.fmt.allocPrint0(allocator, "{}\n{}", .{ - cpu_features.cpu.name, - cpu_features.features.asBytes(), - }); - errdefer allocator.free(cache_hash); - - const generic_arch_name = arch.genericName(); - var builtin_str_buffer = try std.Buffer.allocPrint(allocator, - \\CpuFeatures{{ - \\ .cpu = &Target.{}.cpu.{}, - \\ .features = Target.{}.featureSet(&[_]Target.{}.Feature{{ - \\ - , .{ - generic_arch_name, - cpu_features.cpu.name, - generic_arch_name, - generic_arch_name, - }); - defer builtin_str_buffer.deinit(); - - var llvm_features_buffer = try std.Buffer.initSize(allocator, 0); - defer llvm_features_buffer.deinit(); - - for (arch.allFeaturesList()) |feature, index_usize| { - const index = @intCast(Target.Cpu.Feature.Set.Index, index_usize); - const is_enabled = cpu_features.features.isEnabled(index); - - if (feature.llvm_name) |llvm_name| { - const plus_or_minus = "-+"[@boolToInt(is_enabled)]; - try llvm_features_buffer.appendByte(plus_or_minus); - try llvm_features_buffer.append(llvm_name); - try llvm_features_buffer.append(","); - } - - if (is_enabled) { - // TODO some kind of "zig identifier escape" function rather than - // unconditionally using @"" syntax - try builtin_str_buffer.append(" .@\""); - try builtin_str_buffer.append(feature.name); - try builtin_str_buffer.append("\",\n"); - } - } - - try builtin_str_buffer.append( - \\ }), - \\}; - \\ - ); - - assert(mem.endsWith(u8, llvm_features_buffer.toSliceConst(), ",")); - llvm_features_buffer.shrink(llvm_features_buffer.len() - 1); - - self.* = Self{ - .allocator = allocator, - .cpu_features = cpu_features, - .llvm_features_str = llvm_features_buffer.toOwnedSlice().ptr, - .builtin_str = builtin_str_buffer.toOwnedSlice(), - .cache_hash = cache_hash, - }; - return self; - } - - fn destroy(self: *Self) void { - self.allocator.free(self.cache_hash); - self.allocator.free(self.builtin_str); - // TODO if (self.llvm_features_str) |llvm_features_str| self.allocator.free(llvm_features_str); - self.allocator.destroy(self); - } -}; - // ABI warning -export fn stage2_cpu_features_parse( - result: **Stage2CpuFeatures, +export fn stage2_target_parse( + target: *Stage2Target, zig_triple: ?[*:0]const u8, - cpu_name: ?[*:0]const u8, - cpu_features: ?[*:0]const u8, + mcpu: ?[*:0]const u8, ) Error { - result.* = stage2ParseCpuFeatures(zig_triple, cpu_name, cpu_features) catch |err| switch (err) { + stage2TargetParse(target, zig_triple, mcpu) catch |err| switch (err) { error.OutOfMemory => return .OutOfMemory, error.UnknownArchitecture => return .UnknownArchitecture, - error.UnknownSubArchitecture => return .UnknownSubArchitecture, error.UnknownOperatingSystem => return .UnknownOperatingSystem, error.UnknownApplicationBinaryInterface => return .UnknownApplicationBinaryInterface, error.MissingOperatingSystem => return .MissingOperatingSystem, error.MissingArchitecture => return .MissingArchitecture, error.InvalidLlvmCpuFeaturesFormat => return .InvalidLlvmCpuFeaturesFormat, - error.InvalidCpuFeatures => return .InvalidCpuFeatures, + error.UnknownCpu => return .UnknownCpu, + error.UnexpectedExtraField => return .SemanticAnalyzeFail, + error.UnknownCpuFeature => return .UnknownCpuFeature, }; return .None; } -fn stage2ParseCpuFeatures( +fn stage2TargetParse( + stage1_target: *Stage2Target, zig_triple_oz: ?[*:0]const u8, - cpu_name_oz: ?[*:0]const u8, - cpu_features_oz: ?[*:0]const u8, -) !*Stage2CpuFeatures { - const zig_triple_z = zig_triple_oz orelse return Stage2CpuFeatures.createFromNative(std.heap.c_allocator); - const target = try Target.parse(mem.toSliceConst(u8, zig_triple_z)); - const arch = target.Cross.arch; + mcpu_oz: ?[*:0]const u8, +) !void { + const target: Target = if (zig_triple_oz) |zig_triple_z| blk: { + const zig_triple = mem.toSliceConst(u8, zig_triple_z); + const mcpu = if (mcpu_oz) |mcpu_z| mem.toSliceConst(u8, mcpu_z) else null; + break :blk try Target.parse(.{ .arch_os_abi = zig_triple, .cpu = mcpu }); + } else Target.Native; - const cpu = if (cpu_name_oz) |cpu_name_z| blk: { - const cpu_name = mem.toSliceConst(u8, cpu_name_z); - break :blk arch.parseCpu(cpu_name) catch |err| switch (err) { - error.UnknownCpu => { - std.debug.warn("Unknown CPU: '{}'\nAvailable CPUs for architecture '{}':\n", .{ - cpu_name, - @tagName(arch), - }); - for (arch.allCpus()) |cpu| { - std.debug.warn(" {}\n", .{cpu.name}); - } - process.exit(1); - }, - else => |e| return e, - }; - } else target.Cross.cpu_features.cpu; + try stage1_target.fromTarget(target); +} - var set = if (cpu_features_oz) |cpu_features_z| blk: { - const cpu_features = mem.toSliceConst(u8, cpu_features_z); - break :blk arch.parseCpuFeatureSet(cpu, cpu_features) catch |err| switch (err) { - error.UnknownCpuFeature => { - std.debug.warn( - \\Unknown CPU features specified. - \\Available CPU features for architecture '{}': - \\ - , .{@tagName(arch)}); - for (arch.allFeaturesList()) |feature| { - std.debug.warn(" {}\n", .{feature.name}); - } - process.exit(1); - }, - else => |e| return e, - }; - } else cpu.features; - - if (arch.subArchFeature()) |index| { - set.addFeature(index); - } - set.populateDependencies(arch.allFeaturesList()); - - return Stage2CpuFeatures.createFromCpuFeatures(std.heap.c_allocator, arch, .{ - .cpu = cpu, - .features = set, +fn initStage1TargetCpuFeatures(stage1_target: *Stage2Target, cpu: Target.Cpu) !void { + const allocator = std.heap.c_allocator; + const cache_hash = try std.fmt.allocPrint0(allocator, "{}\n{}", .{ + cpu.model.name, + cpu.features.asBytes(), }); -} + errdefer allocator.free(cache_hash); -// ABI warning -export fn stage2_cpu_features_get_cache_hash( - cpu_features: *const Stage2CpuFeatures, - ptr: *[*:0]const u8, - len: *usize, -) void { - ptr.* = cpu_features.cache_hash.ptr; - len.* = cpu_features.cache_hash.len; -} + const generic_arch_name = cpu.arch.genericName(); + var builtin_str_buffer = try std.Buffer.allocPrint(allocator, + \\Cpu{{ + \\ .arch = .{}, + \\ .model = &Target.{}.cpu.{}, + \\ .features = Target.{}.featureSet(&[_]Target.{}.Feature{{ + \\ + , .{ + @tagName(cpu.arch), + generic_arch_name, + cpu.model.name, + generic_arch_name, + generic_arch_name, + }); + defer builtin_str_buffer.deinit(); -// ABI warning -export fn stage2_cpu_features_get_builtin_str( - cpu_features: *const Stage2CpuFeatures, - ptr: *[*:0]const u8, - len: *usize, -) void { - ptr.* = cpu_features.builtin_str.ptr; - len.* = cpu_features.builtin_str.len; -} + var llvm_features_buffer = try std.Buffer.initSize(allocator, 0); + defer llvm_features_buffer.deinit(); -// ABI warning -export fn stage2_cpu_features_get_llvm_cpu(cpu_features: *const Stage2CpuFeatures) ?[*:0]const u8 { - return if (cpu_features.cpu_features.cpu.llvm_name) |s| s.ptr else null; -} + for (cpu.arch.allFeaturesList()) |feature, index_usize| { + const index = @intCast(Target.Cpu.Feature.Set.Index, index_usize); + const is_enabled = cpu.features.isEnabled(index); -// ABI warning -export fn stage2_cpu_features_get_llvm_features(cpu_features: *const Stage2CpuFeatures) ?[*:0]const u8 { - return cpu_features.llvm_features_str; + if (feature.llvm_name) |llvm_name| { + const plus_or_minus = "-+"[@boolToInt(is_enabled)]; + try llvm_features_buffer.appendByte(plus_or_minus); + try llvm_features_buffer.append(llvm_name); + try llvm_features_buffer.append(","); + } + + if (is_enabled) { + // TODO some kind of "zig identifier escape" function rather than + // unconditionally using @"" syntax + try builtin_str_buffer.append(" .@\""); + try builtin_str_buffer.append(feature.name); + try builtin_str_buffer.append("\",\n"); + } + } + + try builtin_str_buffer.append( + \\ }), + \\}; + \\ + ); + + assert(mem.endsWith(u8, llvm_features_buffer.toSliceConst(), ",")); + llvm_features_buffer.shrink(llvm_features_buffer.len() - 1); + + stage1_target.llvm_cpu_name = if (cpu.model.llvm_name) |s| s.ptr else null; + stage1_target.llvm_cpu_features = llvm_features_buffer.toOwnedSlice().ptr; + stage1_target.builtin_str = builtin_str_buffer.toOwnedSlice().ptr; + stage1_target.cache_hash = cache_hash.ptr; } // ABI warning @@ -1017,12 +910,55 @@ export fn stage2_libc_render(stage1_libc: *Stage2LibCInstallation, output_file: const Stage2Target = extern struct { arch: c_int, sub_arch: c_int, + vendor: c_int, - os: c_int, abi: c_int, - glibc_version: ?*Stage2GLibCVersion, // null means default - cpu_features: *Stage2CpuFeatures, + + os: c_int, is_native: bool, + + glibc_version: ?*Stage2GLibCVersion, // null means default + + llvm_cpu_name: ?[*:0]const u8, + llvm_cpu_features: ?[*:0]const u8, + builtin_str: ?[*:0]const u8, + cache_hash: ?[*:0]const u8, + + fn toTarget(in_target: Stage2Target) Target { + if (in_target.is_native) return .Native; + + const in_arch = in_target.arch - 1; // skip over ZigLLVM_UnknownArch + const in_sub_arch = in_target.sub_arch - 1; // skip over ZigLLVM_NoSubArch + const in_os = in_target.os; + const in_abi = in_target.abi - 1; // skip over ZigLLVM_UnknownEnvironment + + return .{ + .Cross = .{ + .cpu = Target.Cpu.baseline(enumInt(Target.Cpu.Arch, in_arch)), + .os = enumInt(Target.Os, in_os), + .abi = enumInt(Target.Abi, in_abi), + }, + }; + } + + fn fromTarget(self: *Stage2Target, target: Target) !void { + const cpu = switch (target) { + .Native => blk: { + // TODO self-host CPU model and feature detection instead of relying on LLVM + const llvm = @import("llvm.zig"); + const llvm_cpu_name = llvm.GetHostCPUName(); + const llvm_cpu_features = llvm.GetNativeFeatures(); + break :blk try detectNativeCpuWithLLVM(target.getArch(), llvm_cpu_name, llvm_cpu_features); + }, + .Cross => target.getCpu(), + }; + self.arch = @enumToInt(target.getArch()) + 1; // skip over ZigLLVM_UnknownArch + self.sub_arch = 0; + self.vendor = 0; + self.os = @enumToInt(target.getOs()); + self.abi = @enumToInt(target.getAbi()) + 1; // skip over ZigLLVM_UnknownEnvironment + try initStage1TargetCpuFeatures(self, cpu); + } }; // ABI warning @@ -1034,72 +970,7 @@ const Stage2GLibCVersion = extern struct { // ABI warning export fn stage2_detect_dynamic_linker(in_target: *const Stage2Target, out_ptr: *[*:0]u8, out_len: *usize) Error { - const in_arch = in_target.arch - 1; // skip over ZigLLVM_UnknownArch - const in_sub_arch = in_target.sub_arch - 1; // skip over ZigLLVM_NoSubArch - const in_os = in_target.os; - const in_abi = in_target.abi - 1; // skip over ZigLLVM_UnknownEnvironment - const target: Target = if (in_target.is_native) .Native else .{ - .Cross = .{ - .arch = switch (enumInt(@TagType(Target.Arch), in_arch)) { - .arm => .{ .arm = enumInt(Target.Arch.Arm32, in_sub_arch) }, - .armeb => .{ .armeb = enumInt(Target.Arch.Arm32, in_sub_arch) }, - .thumb => .{ .thumb = enumInt(Target.Arch.Arm32, in_sub_arch) }, - .thumbeb => .{ .thumbeb = enumInt(Target.Arch.Arm32, in_sub_arch) }, - - .aarch64 => .{ .aarch64 = enumInt(Target.Arch.Arm64, in_sub_arch) }, - .aarch64_be => .{ .aarch64_be = enumInt(Target.Arch.Arm64, in_sub_arch) }, - .aarch64_32 => .{ .aarch64_32 = enumInt(Target.Arch.Arm64, in_sub_arch) }, - - .kalimba => .{ .kalimba = enumInt(Target.Arch.Kalimba, in_sub_arch) }, - - .arc => .arc, - .avr => .avr, - .bpfel => .bpfel, - .bpfeb => .bpfeb, - .hexagon => .hexagon, - .mips => .mips, - .mipsel => .mipsel, - .mips64 => .mips64, - .mips64el => .mips64el, - .msp430 => .msp430, - .powerpc => .powerpc, - .powerpc64 => .powerpc64, - .powerpc64le => .powerpc64le, - .r600 => .r600, - .amdgcn => .amdgcn, - .riscv32 => .riscv32, - .riscv64 => .riscv64, - .sparc => .sparc, - .sparcv9 => .sparcv9, - .sparcel => .sparcel, - .s390x => .s390x, - .tce => .tce, - .tcele => .tcele, - .i386 => .i386, - .x86_64 => .x86_64, - .xcore => .xcore, - .nvptx => .nvptx, - .nvptx64 => .nvptx64, - .le32 => .le32, - .le64 => .le64, - .amdil => .amdil, - .amdil64 => .amdil64, - .hsail => .hsail, - .hsail64 => .hsail64, - .spir => .spir, - .spir64 => .spir64, - .shave => .shave, - .lanai => .lanai, - .wasm32 => .wasm32, - .wasm64 => .wasm64, - .renderscript32 => .renderscript32, - .renderscript64 => .renderscript64, - }, - .os = enumInt(Target.Os, in_os), - .abi = enumInt(Target.Abi, in_abi), - .cpu_features = in_target.cpu_features.cpu_features, - }, - }; + const target = in_target.toTarget(); const result = @import("introspect.zig").detectDynamicLinker( std.heap.c_allocator, target, diff --git a/src/codegen.cpp b/src/codegen.cpp index a28d2d469d..0c35bcd1ed 100644 --- a/src/codegen.cpp +++ b/src/codegen.cpp @@ -8624,14 +8624,11 @@ Buf *codegen_generate_builtin_source(CodeGen *g) { buf_appendf(contents, "pub const arch = %s;\n", cur_arch); buf_appendf(contents, "pub const abi = Abi.%s;\n", cur_abi); { - buf_append_str(contents, "pub const cpu_features: CpuFeatures = "); - if (g->zig_target->cpu_features != nullptr) { - const char *ptr; - size_t len; - stage2_cpu_features_get_builtin_str(g->zig_target->cpu_features, &ptr, &len); - buf_append_mem(contents, ptr, len); + buf_append_str(contents, "pub const cpu: Cpu = "); + if (g->zig_target->builtin_str != nullptr) { + buf_append_str(contents, g->zig_target->builtin_str); } else { - buf_append_str(contents, "arch.getBaselineCpuFeatures();\n"); + buf_append_str(contents, "Target.Cpu.baseline(arch);\n"); } } if (g->libc_link_lib != nullptr && g->zig_target->glibc_version != nullptr) { @@ -8734,11 +8731,8 @@ static Error define_builtin_compile_vars(CodeGen *g) { cache_int(&cache_hash, g->zig_target->vendor); cache_int(&cache_hash, g->zig_target->os); cache_int(&cache_hash, g->zig_target->abi); - if (g->zig_target->cpu_features != nullptr) { - const char *ptr; - size_t len; - stage2_cpu_features_get_cache_hash(g->zig_target->cpu_features, &ptr, &len); - cache_str(&cache_hash, ptr); + if (g->zig_target->cache_hash != nullptr) { + cache_str(&cache_hash, g->zig_target->cache_hash); } if (g->zig_target->glibc_version != nullptr) { cache_int(&cache_hash, g->zig_target->glibc_version->major); @@ -8873,9 +8867,11 @@ static void init(CodeGen *g) { } // Override CPU and features if defined by user. - if (g->zig_target->cpu_features != nullptr) { - target_specific_cpu_args = stage2_cpu_features_get_llvm_cpu(g->zig_target->cpu_features); - target_specific_features = stage2_cpu_features_get_llvm_features(g->zig_target->cpu_features); + if (g->zig_target->llvm_cpu_name != nullptr) { + target_specific_cpu_args = g->zig_target->llvm_cpu_name; + } + if (g->zig_target->llvm_cpu_features != nullptr) { + target_specific_features = g->zig_target->llvm_cpu_features; } if (g->verbose_llvm_cpu_features) { fprintf(stderr, "name=%s triple=%s\n", buf_ptr(g->root_out_name), buf_ptr(&g->llvm_triple_str)); @@ -9190,19 +9186,17 @@ void add_cc_args(CodeGen *g, ZigList &args, const char *out_dep_pa args.append("-target"); args.append(buf_ptr(&g->llvm_triple_str)); - const char *llvm_cpu = stage2_cpu_features_get_llvm_cpu(g->zig_target->cpu_features); - if (llvm_cpu != nullptr) { + if (g->zig_target->llvm_cpu_name != nullptr) { args.append("-Xclang"); args.append("-target-cpu"); args.append("-Xclang"); - args.append(llvm_cpu); + args.append(g->zig_target->llvm_cpu_name); } - const char *llvm_target_features = stage2_cpu_features_get_llvm_features(g->zig_target->cpu_features); - if (llvm_target_features != nullptr) { + if (g->zig_target->llvm_cpu_features != nullptr) { args.append("-Xclang"); args.append("-target-feature"); args.append("-Xclang"); - args.append(llvm_target_features); + args.append(g->zig_target->llvm_cpu_features); } } @@ -10406,11 +10400,8 @@ static Error check_cache(CodeGen *g, Buf *manifest_dir, Buf *digest) { cache_int(ch, g->zig_target->vendor); cache_int(ch, g->zig_target->os); cache_int(ch, g->zig_target->abi); - if (g->zig_target->cpu_features != nullptr) { - const char *ptr; - size_t len; - stage2_cpu_features_get_cache_hash(g->zig_target->cpu_features, &ptr, &len); - cache_str(ch, ptr); + if (g->zig_target->cache_hash != nullptr) { + cache_str(ch, g->zig_target->cache_hash); } if (g->zig_target->glibc_version != nullptr) { cache_int(ch, g->zig_target->glibc_version->major); diff --git a/src/error.cpp b/src/error.cpp index c633e2fe67..730c6e7193 100644 --- a/src/error.cpp +++ b/src/error.cpp @@ -59,7 +59,6 @@ const char *err_str(Error err) { case ErrorIsAsync: return "is async"; case ErrorImportOutsidePkgPath: return "import of file outside package path"; case ErrorUnknownCpu: return "unknown CPU"; - case ErrorUnknownSubArchitecture: return "unknown sub-architecture"; case ErrorUnknownCpuFeature: return "unknown CPU feature"; case ErrorInvalidCpuFeatures: return "invalid CPU features"; case ErrorInvalidLlvmCpuFeaturesFormat: return "invalid LLVM CPU features format"; diff --git a/src/main.cpp b/src/main.cpp index d7f5e5b7b0..c9076d0002 100644 --- a/src/main.cpp +++ b/src/main.cpp @@ -106,8 +106,7 @@ static int print_full_usage(const char *arg0, FILE *file, int return_code) { " --override-lib-dir [arg] override path to Zig lib directory\n" " -ffunction-sections places each function in a separate section\n" " -D[macro]=[value] define C [macro] to [value] (1 if [value] omitted)\n" - " -target-cpu [cpu] target one specific CPU by name\n" - " -target-feature [features] specify the set of CPU features to target\n" + " -mcpu [cpu] specify target CPU and feature set\n" " -code-model [default|tiny| set target code model\n" " small|kernel|\n" " medium|large]\n" @@ -238,6 +237,14 @@ static int zig_error_no_build_file(void) { return EXIT_FAILURE; } +static bool str_starts_with(const char *s1, const char *s2) { + size_t s2_len = strlen(s2); + if (strlen(s1) < s2_len) { + return false; + } + return memcmp(s1, s2, s2_len) == 0; +} + extern "C" int ZigClang_main(int argc, char **argv); #ifdef ZIG_ENABLE_MEM_PROFILE @@ -447,8 +454,7 @@ static int main0(int argc, char **argv) { WantStackCheck want_stack_check = WantStackCheckAuto; WantCSanitize want_sanitize_c = WantCSanitizeAuto; bool function_sections = false; - const char *cpu = nullptr; - const char *features = nullptr; + const char *mcpu = nullptr; CodeModel code_model = CodeModelDefault; ZigList llvm_argv = {0}; @@ -716,6 +722,8 @@ static int main0(int argc, char **argv) { emit_llvm_ir = true; } else if (strcmp(arg, "-fno-emit-llvm-ir") == 0) { emit_llvm_ir = false; + } else if (str_starts_with(arg, "-mcpu=")) { + mcpu = arg + strlen("-mcpu="); } else if (i + 1 >= argc) { fprintf(stderr, "Expected another argument after %s\n", arg); return print_error_usage(arg0); @@ -892,10 +900,8 @@ static int main0(int argc, char **argv) { , argv[i]); return EXIT_FAILURE; } - } else if (strcmp(arg, "-target-cpu") == 0) { - cpu = argv[i]; - } else if (strcmp(arg, "-target-feature") == 0) { - features = argv[i]; + } else if (strcmp(arg, "-mcpu") == 0) { + mcpu = argv[i]; } else { fprintf(stderr, "Invalid argument: %s\n", arg); return print_error_usage(arg0); @@ -971,55 +977,41 @@ static int main0(int argc, char **argv) { init_all_targets(); ZigTarget target; - if (target_string == nullptr) { - get_native_target(&target); - if (target_glibc != nullptr) { - fprintf(stderr, "-target-glibc provided but no -target parameter\n"); + if ((err = target_parse_triple(&target, target_string, mcpu))) { + if (err == ErrorUnknownArchitecture && target.arch != ZigLLVM_UnknownArch) { + fprintf(stderr, "'%s' requires a sub-architecture. Try one of these:\n", + target_arch_name(target.arch)); + SubArchList sub_arch_list = target_subarch_list(target.arch); + size_t subarch_count = target_subarch_count(sub_arch_list); + for (size_t sub_i = 0; sub_i < subarch_count; sub_i += 1) { + ZigLLVM_SubArchType sub = target_subarch_enum(sub_arch_list, sub_i); + fprintf(stderr, " %s%s\n", target_arch_name(target.arch), target_subarch_name(sub)); + } + return print_error_usage(arg0); + } else { + fprintf(stderr, "invalid target: %s\n", err_str(err)); return print_error_usage(arg0); } - } else { - if ((err = target_parse_triple(&target, target_string))) { - if (err == ErrorUnknownArchitecture && target.arch != ZigLLVM_UnknownArch) { - fprintf(stderr, "'%s' requires a sub-architecture. Try one of these:\n", - target_arch_name(target.arch)); - SubArchList sub_arch_list = target_subarch_list(target.arch); - size_t subarch_count = target_subarch_count(sub_arch_list); - for (size_t sub_i = 0; sub_i < subarch_count; sub_i += 1) { - ZigLLVM_SubArchType sub = target_subarch_enum(sub_arch_list, sub_i); - fprintf(stderr, " %s%s\n", target_arch_name(target.arch), target_subarch_name(sub)); - } - return print_error_usage(arg0); - } else { - fprintf(stderr, "invalid target: %s\n", err_str(err)); - return print_error_usage(arg0); - } - } - if (target_is_glibc(&target)) { - target.glibc_version = heap::c_allocator.create(); + } + if (target_is_glibc(&target)) { + target.glibc_version = heap::c_allocator.create(); - if (target_glibc != nullptr) { - if ((err = target_parse_glibc_version(target.glibc_version, target_glibc))) { - fprintf(stderr, "invalid glibc version '%s': %s\n", target_glibc, err_str(err)); - return print_error_usage(arg0); - } - } else { - target_init_default_glibc_version(&target); + if (target_glibc != nullptr) { + if ((err = target_parse_glibc_version(target.glibc_version, target_glibc))) { + fprintf(stderr, "invalid glibc version '%s': %s\n", target_glibc, err_str(err)); + return print_error_usage(arg0); } - } else if (target_glibc != nullptr) { - fprintf(stderr, "'%s' is not a glibc-compatible target", target_string); - return print_error_usage(arg0); + } else { + target_init_default_glibc_version(&target); } + } else if (target_glibc != nullptr) { + fprintf(stderr, "'%s' is not a glibc-compatible target", target_string); + return print_error_usage(arg0); } Buf zig_triple_buf = BUF_INIT; target_triple_zig(&zig_triple_buf, &target); - const char *stage2_triple_arg = target.is_native ? nullptr : buf_ptr(&zig_triple_buf); - if ((err = stage2_cpu_features_parse(&target.cpu_features, stage2_triple_arg, cpu, features))) { - fprintf(stderr, "unable to initialize CPU features: %s\n", err_str(err)); - return main_exit(root_progress_node, EXIT_FAILURE); - } - // If both output_dir and enable_cache are provided, and doing build-lib, we // will just do a file copy at the end. This helps when bootstrapping zig from zig0 // because we want to pass something like this: diff --git a/src/stage2.cpp b/src/stage2.cpp index c3abe54d77..f3ae03242e 100644 --- a/src/stage2.cpp +++ b/src/stage2.cpp @@ -4,6 +4,7 @@ #include "stage2.h" #include "util.hpp" #include "zig_llvm.h" +#include "target.hpp" #include #include #include @@ -90,54 +91,60 @@ void stage2_progress_complete_one(Stage2ProgressNode *node) {} void stage2_progress_disable_tty(Stage2Progress *progress) {} void stage2_progress_update_node(Stage2ProgressNode *node, size_t completed_count, size_t estimated_total_items){} -struct Stage2CpuFeatures { - const char *llvm_cpu_name; - const char *llvm_cpu_features; - const char *builtin_str; - const char *cache_hash; -}; +Error stage2_target_parse(struct ZigTarget *target, const char *zig_triple, const char *mcpu) { + Error err; -Error stage2_cpu_features_parse(struct Stage2CpuFeatures **out, const char *zig_triple, - const char *cpu_name, const char *cpu_features) -{ if (zig_triple == nullptr) { - Stage2CpuFeatures *result = heap::c_allocator.create(); - result->llvm_cpu_name = ZigLLVMGetHostCPUName(); - result->llvm_cpu_features = ZigLLVMGetNativeFeatures(); - result->builtin_str = "arch.getBaselineCpuFeatures();\n"; - result->cache_hash = "native\n\n"; - *out = result; - return ErrorNone; - } - if (cpu_name == nullptr && cpu_features == nullptr) { - Stage2CpuFeatures *result = heap::c_allocator.create(); - result->builtin_str = "arch.getBaselineCpuFeatures();\n"; - result->cache_hash = "\n\n"; - *out = result; - return ErrorNone; + get_native_target(target); + + target->llvm_cpu_name = ZigLLVMGetHostCPUName(); + target->llvm_cpu_features = ZigLLVMGetNativeFeatures(); + target->builtin_str = "Target.Cpu.baseline(arch);\n"; + target->cache_hash = "native\n\n"; + } else { + // first initialize all to zero + *target = {}; + + SplitIterator it = memSplit(str(zig_triple), str("-")); + + Optional> opt_archsub = SplitIterator_next(&it); + Optional> opt_os = SplitIterator_next(&it); + Optional> opt_abi = SplitIterator_next(&it); + + if (!opt_archsub.is_some) + return ErrorMissingArchitecture; + + if ((err = target_parse_archsub(&target->arch, &target->sub_arch, + (char*)opt_archsub.value.ptr, opt_archsub.value.len))) + { + return err; + } + + if (!opt_os.is_some) + return ErrorMissingOperatingSystem; + + if ((err = target_parse_os(&target->os, (char*)opt_os.value.ptr, opt_os.value.len))) { + return err; + } + + if (opt_abi.is_some) { + if ((err = target_parse_abi(&target->abi, (char*)opt_abi.value.ptr, opt_abi.value.len))) { + return err; + } + } else { + target->abi = target_default_abi(target->arch, target->os); + } + + target->builtin_str = "Target.Cpu.baseline(arch);\n"; + target->cache_hash = "\n\n"; } - const char *msg = "stage0 called stage2_cpu_features_parse with non-null cpu name or features"; - stage2_panic(msg, strlen(msg)); -} + if (mcpu != nullptr) { + const char *msg = "stage0 can't handle CPU/features in the target"; + stage2_panic(msg, strlen(msg)); + } -void stage2_cpu_features_get_cache_hash(const Stage2CpuFeatures *cpu_features, - const char **ptr, size_t *len) -{ - *ptr = cpu_features->cache_hash; - *len = strlen(cpu_features->cache_hash); -} -const char *stage2_cpu_features_get_llvm_cpu(const Stage2CpuFeatures *cpu_features) { - return cpu_features->llvm_cpu_name; -} -const char *stage2_cpu_features_get_llvm_features(const Stage2CpuFeatures *cpu_features) { - return cpu_features->llvm_cpu_features; -} -void stage2_cpu_features_get_builtin_str(const Stage2CpuFeatures *cpu_features, - const char **ptr, size_t *len) -{ - *ptr = cpu_features->builtin_str; - *len = strlen(cpu_features->builtin_str); + return ErrorNone; } int stage2_cmd_targets(const char *zig_triple) { diff --git a/src/stage2.h b/src/stage2.h index 302cffafc6..fe49c943a0 100644 --- a/src/stage2.h +++ b/src/stage2.h @@ -81,7 +81,6 @@ enum Error { ErrorIsAsync, ErrorImportOutsidePkgPath, ErrorUnknownCpu, - ErrorUnknownSubArchitecture, ErrorUnknownCpuFeature, ErrorInvalidCpuFeatures, ErrorInvalidLlvmCpuFeaturesFormat, @@ -200,27 +199,6 @@ ZIG_EXTERN_C void stage2_progress_complete_one(Stage2ProgressNode *node); ZIG_EXTERN_C void stage2_progress_update_node(Stage2ProgressNode *node, size_t completed_count, size_t estimated_total_items); -// ABI warning -struct Stage2CpuFeatures; - -// ABI warning -ZIG_EXTERN_C enum Error stage2_cpu_features_parse(struct Stage2CpuFeatures **result, - const char *zig_triple, const char *cpu_name, const char *cpu_features); - -// ABI warning -ZIG_EXTERN_C const char *stage2_cpu_features_get_llvm_cpu(const struct Stage2CpuFeatures *cpu_features); - -// ABI warning -ZIG_EXTERN_C const char *stage2_cpu_features_get_llvm_features(const struct Stage2CpuFeatures *cpu_features); - -// ABI warning -ZIG_EXTERN_C void stage2_cpu_features_get_builtin_str(const struct Stage2CpuFeatures *cpu_features, - const char **ptr, size_t *len); - -// ABI warning -ZIG_EXTERN_C void stage2_cpu_features_get_cache_hash(const struct Stage2CpuFeatures *cpu_features, - const char **ptr, size_t *len); - // ABI warning ZIG_EXTERN_C int stage2_cmd_targets(const char *zig_triple); @@ -296,22 +274,33 @@ struct ZigGLibCVersion { uint32_t patch; }; +struct Stage2TargetData; + // ABI warning struct ZigTarget { enum ZigLLVM_ArchType arch; enum ZigLLVM_SubArchType sub_arch; + enum ZigLLVM_VendorType vendor; - Os os; enum ZigLLVM_EnvironmentType abi; - struct ZigGLibCVersion *glibc_version; // null means default - struct Stage2CpuFeatures *cpu_features; + + Os os; bool is_native; + + struct ZigGLibCVersion *glibc_version; // null means default + + const char *llvm_cpu_name; + const char *llvm_cpu_features; + const char *builtin_str; + const char *cache_hash; }; // ABI warning ZIG_EXTERN_C enum Error stage2_detect_dynamic_linker(const struct ZigTarget *target, char **out_ptr, size_t *out_len); +// ABI warning +ZIG_EXTERN_C enum Error stage2_target_parse(struct ZigTarget *target, const char *zig_triple, const char *mcpu); // ABI warning diff --git a/src/target.cpp b/src/target.cpp index 209b42f3c9..fb064c4849 100644 --- a/src/target.cpp +++ b/src/target.cpp @@ -776,42 +776,8 @@ Error target_parse_abi(ZigLLVM_EnvironmentType *out_abi, const char *abi_ptr, si return ErrorUnknownABI; } -Error target_parse_triple(ZigTarget *target, const char *triple) { - Error err; - - // first initialize all to zero - *target = {}; - - SplitIterator it = memSplit(str(triple), str("-")); - - Optional> opt_archsub = SplitIterator_next(&it); - Optional> opt_os = SplitIterator_next(&it); - Optional> opt_abi = SplitIterator_next(&it); - - if (!opt_archsub.is_some) - return ErrorMissingArchitecture; - - if ((err = target_parse_archsub(&target->arch, &target->sub_arch, - (char*)opt_archsub.value.ptr, opt_archsub.value.len))) - { - return err; - } - - if (!opt_os.is_some) - return ErrorMissingOperatingSystem; - - if ((err = target_parse_os(&target->os, (char*)opt_os.value.ptr, opt_os.value.len))) { - return err; - } - - if (opt_abi.is_some) { - if ((err = target_parse_abi(&target->abi, (char*)opt_abi.value.ptr, opt_abi.value.len))) { - return err; - } - } else { - target->abi = target_default_abi(target->arch, target->os); - } - return ErrorNone; +Error target_parse_triple(ZigTarget *target, const char *triple, const char *mcpu) { + return stage2_target_parse(target, triple, mcpu); } const char *target_arch_name(ZigLLVM_ArchType arch) { diff --git a/src/target.hpp b/src/target.hpp index 4344749719..95acbe259e 100644 --- a/src/target.hpp +++ b/src/target.hpp @@ -50,7 +50,7 @@ enum CIntType { CIntTypeCount, }; -Error target_parse_triple(ZigTarget *target, const char *triple); +Error target_parse_triple(ZigTarget *target, const char *triple, const char *mcpu); Error target_parse_archsub(ZigLLVM_ArchType *arch, ZigLLVM_SubArchType *sub, const char *archsub_ptr, size_t archsub_len); Error target_parse_os(Os *os, const char *os_ptr, size_t os_len); diff --git a/test/tests.zig b/test/tests.zig index f079b4664c..3190126208 100644 --- a/test/tests.zig +++ b/test/tests.zig @@ -55,20 +55,18 @@ const test_targets = blk: { TestTarget{ .target = Target{ .Cross = CrossTarget{ + .cpu = Target.Cpu.baseline(.x86_64), .os = .linux, - .arch = .x86_64, .abi = .none, - .cpu_features = Target.Arch.x86_64.getBaselineCpuFeatures(), }, }, }, TestTarget{ .target = Target{ .Cross = CrossTarget{ + .cpu = Target.Cpu.baseline(.x86_64), .os = .linux, - .arch = .x86_64, .abi = .gnu, - .cpu_features = Target.Arch.x86_64.getBaselineCpuFeatures(), }, }, .link_libc = true, @@ -76,9 +74,8 @@ const test_targets = blk: { TestTarget{ .target = Target{ .Cross = CrossTarget{ + .cpu = Target.Cpu.baseline(.x86_64), .os = .linux, - .arch = .x86_64, - .cpu_features = Target.Arch.x86_64.getBaselineCpuFeatures(), .abi = .musl, }, }, @@ -88,9 +85,8 @@ const test_targets = blk: { TestTarget{ .target = Target{ .Cross = CrossTarget{ + .cpu = Target.Cpu.baseline(.i386), .os = .linux, - .arch = .i386, - .cpu_features = Target.Arch.i386.getBaselineCpuFeatures(), .abi = .none, }, }, @@ -98,9 +94,8 @@ const test_targets = blk: { TestTarget{ .target = Target{ .Cross = CrossTarget{ + .cpu = Target.Cpu.baseline(.i386), .os = .linux, - .arch = .i386, - .cpu_features = Target.Arch.i386.getBaselineCpuFeatures(), .abi = .musl, }, }, @@ -110,9 +105,8 @@ const test_targets = blk: { TestTarget{ .target = Target{ .Cross = CrossTarget{ + .cpu = Target.Cpu.baseline(.aarch64), .os = .linux, - .arch = Target.Arch{ .aarch64 = .v8a }, - .cpu_features = (Target.Arch{ .aarch64 = .v8a }).getBaselineCpuFeatures(), .abi = .none, }, }, @@ -120,9 +114,8 @@ const test_targets = blk: { TestTarget{ .target = Target{ .Cross = CrossTarget{ + .cpu = Target.Cpu.baseline(.aarch64), .os = .linux, - .arch = Target.Arch{ .aarch64 = .v8a }, - .cpu_features = (Target.Arch{ .aarch64 = .v8a }).getBaselineCpuFeatures(), .abi = .musl, }, }, @@ -131,9 +124,8 @@ const test_targets = blk: { TestTarget{ .target = Target{ .Cross = CrossTarget{ + .cpu = Target.Cpu.baseline(.aarch64), .os = .linux, - .arch = Target.Arch{ .aarch64 = .v8a }, - .cpu_features = (Target.Arch{ .aarch64 = .v8a }).getBaselineCpuFeatures(), .abi = .gnu, }, }, @@ -141,45 +133,32 @@ const test_targets = blk: { }, TestTarget{ - .target = Target{ - .Cross = CrossTarget{ - .os = .linux, - .arch = Target.Arch{ .arm = .v8a }, - .cpu_features = (Target.Arch{ .arm = .v8a }).getBaselineCpuFeatures(), - .abi = .none, - }, - }, + .target = Target.parse(.{ + .arch_os_abi = "arm-linux-none", + .cpu = "generic+v8a", + }) catch unreachable, }, TestTarget{ - .target = Target{ - .Cross = CrossTarget{ - .os = .linux, - .arch = Target.Arch{ .arm = .v8a }, - .cpu_features = (Target.Arch{ .arm = .v8a }).getBaselineCpuFeatures(), - .abi = .musleabihf, - }, - }, + .target = Target.parse(.{ + .arch_os_abi = "arm-linux-musleabihf", + .cpu = "generic+v8a", + }) catch unreachable, .link_libc = true, }, // TODO https://github.com/ziglang/zig/issues/3287 //TestTarget{ - // .target = Target{ - // .Cross = CrossTarget{ - // .os = .linux, - // .arch = Target.Arch{ .arm = .v8a }, - // .cpu_features = (Target.Arch{ .arm = .v8a }).getBaselineCpuFeatures(), - // .abi = .gnueabihf, - // }, - // }, + // .target = Target.parse(.{ + // .arch_os_abi = "arm-linux-gnueabihf", + // .cpu = "generic+v8a", + // }) catch unreachable, // .link_libc = true, //}, TestTarget{ .target = Target{ .Cross = CrossTarget{ + .cpu = Target.Cpu.baseline(.mipsel), .os = .linux, - .arch = .mipsel, - .cpu_features = Target.Arch.mipsel.getBaselineCpuFeatures(), .abi = .none, }, }, @@ -187,9 +166,8 @@ const test_targets = blk: { TestTarget{ .target = Target{ .Cross = CrossTarget{ + .cpu = Target.Cpu.baseline(.mipsel), .os = .linux, - .arch = .mipsel, - .cpu_features = Target.Arch.mipsel.getBaselineCpuFeatures(), .abi = .musl, }, }, @@ -199,9 +177,8 @@ const test_targets = blk: { TestTarget{ .target = Target{ .Cross = CrossTarget{ + .cpu = Target.Cpu.baseline(.x86_64), .os = .macosx, - .arch = .x86_64, - .cpu_features = Target.Arch.x86_64.getBaselineCpuFeatures(), .abi = .gnu, }, }, @@ -212,9 +189,8 @@ const test_targets = blk: { TestTarget{ .target = Target{ .Cross = CrossTarget{ + .cpu = Target.Cpu.baseline(.i386), .os = .windows, - .arch = .i386, - .cpu_features = Target.Arch.i386.getBaselineCpuFeatures(), .abi = .msvc, }, }, @@ -223,9 +199,8 @@ const test_targets = blk: { TestTarget{ .target = Target{ .Cross = CrossTarget{ + .cpu = Target.Cpu.baseline(.x86_64), .os = .windows, - .arch = .x86_64, - .cpu_features = Target.Arch.x86_64.getBaselineCpuFeatures(), .abi = .msvc, }, }, @@ -234,9 +209,8 @@ const test_targets = blk: { TestTarget{ .target = Target{ .Cross = CrossTarget{ + .cpu = Target.Cpu.baseline(.i386), .os = .windows, - .arch = .i386, - .cpu_features = Target.Arch.i386.getBaselineCpuFeatures(), .abi = .gnu, }, }, @@ -246,9 +220,8 @@ const test_targets = blk: { TestTarget{ .target = Target{ .Cross = CrossTarget{ + .cpu = Target.Cpu.baseline(.x86_64), .os = .windows, - .arch = .x86_64, - .cpu_features = Target.Arch.x86_64.getBaselineCpuFeatures(), .abi = .gnu, }, }, From ef2d237f2fbcca0f16b307dda01287e78363627a Mon Sep 17 00:00:00 2001 From: Andrew Kelley Date: Wed, 19 Feb 2020 21:51:24 -0500 Subject: [PATCH 04/18] this is not the proper way to support this feature --- lib/std/target.zig | 8 -------- 1 file changed, 8 deletions(-) diff --git a/lib/std/target.zig b/lib/std/target.zig index 8a3ae23337..9d2f3c29eb 100644 --- a/lib/std/target.zig +++ b/lib/std/target.zig @@ -49,8 +49,6 @@ pub const Target = union(enum) { other, pub fn parse(text: []const u8) !Os { - if (mem.eql(u8, text, "native")) return builtin.os; - const info = @typeInfo(Os); inline for (info.Enum.fields) |field| { if (mem.eql(u8, text, field.name)) { @@ -152,8 +150,6 @@ pub const Target = union(enum) { } pub fn parse(text: []const u8) !Abi { - if (mem.eql(u8, text, "native")) return builtin.abi; - const info = @typeInfo(Abi); inline for (info.Enum.fields) |field| { if (mem.eql(u8, text, field.name)) { @@ -582,8 +578,6 @@ pub const Target = union(enum) { } pub fn parse(text: []const u8) !Arch { - if (mem.eql(u8, text, "native")) return builtin.arch; - const info = @typeInfo(Arch); inline for (info.Enum.fields) |field| { if (mem.eql(u8, text, field.name)) { @@ -727,14 +721,12 @@ pub const Target = union(enum) { /// * CPU Architecture /// * Operating System /// * C ABI (optional) - /// "native" can be used for any of the fields. arch_os_abi: []const u8, /// Looks like "name+a+b-c-d+e", where "name" is a CPU Model name, "a", "b", and "e" /// are examples of CPU features to add to the set, and "c" and "d" are examples of CPU features /// to remove from the set. /// The default value of `null` means to use the "baseline" feature set. - /// "native" can be used to perform CPU introspection. cpu: ?[]const u8 = null, }; From c33cd370fc2a9cbb2b417530d8a2205bb94491d3 Mon Sep 17 00:00:00 2001 From: Andrew Kelley Date: Wed, 19 Feb 2020 21:55:25 -0500 Subject: [PATCH 05/18] fix unit test for Target.parse I think this is working correctly. Without also removing sse2 from the feature set, sse gets added back into the set because sse2 is part of the x86_64 baseline (which is the cpu provided) and sse2 depends on sse. --- lib/std/target.zig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/std/target.zig b/lib/std/target.zig index 9d2f3c29eb..951c02d55a 100644 --- a/lib/std/target.zig +++ b/lib/std/target.zig @@ -1258,7 +1258,7 @@ test "Target.parse" { { const target = (try Target.parse(.{ .arch_os_abi = "x86_64-linux-gnu", - .cpu = "x86_64-sse-avx-cx8", + .cpu = "x86_64-sse-sse2-avx-cx8", })).Cross; std.testing.expect(target.os == .linux); From 884d1504082dcef1ce8edd18f7be0242b11e29e3 Mon Sep 17 00:00:00 2001 From: Andrew Kelley Date: Wed, 19 Feb 2020 22:09:05 -0500 Subject: [PATCH 06/18] stage1 main: fix cli parsing of architecture --- src/main.cpp | 17 +++-------------- 1 file changed, 3 insertions(+), 14 deletions(-) diff --git a/src/main.cpp b/src/main.cpp index c9076d0002..d6148d4587 100644 --- a/src/main.cpp +++ b/src/main.cpp @@ -978,20 +978,9 @@ static int main0(int argc, char **argv) { ZigTarget target; if ((err = target_parse_triple(&target, target_string, mcpu))) { - if (err == ErrorUnknownArchitecture && target.arch != ZigLLVM_UnknownArch) { - fprintf(stderr, "'%s' requires a sub-architecture. Try one of these:\n", - target_arch_name(target.arch)); - SubArchList sub_arch_list = target_subarch_list(target.arch); - size_t subarch_count = target_subarch_count(sub_arch_list); - for (size_t sub_i = 0; sub_i < subarch_count; sub_i += 1) { - ZigLLVM_SubArchType sub = target_subarch_enum(sub_arch_list, sub_i); - fprintf(stderr, " %s%s\n", target_arch_name(target.arch), target_subarch_name(sub)); - } - return print_error_usage(arg0); - } else { - fprintf(stderr, "invalid target: %s\n", err_str(err)); - return print_error_usage(arg0); - } + fprintf(stderr, "invalid target: %s\n" + "See `%s targets` to display valid targets.\n", err_str(err), arg0); + return print_error_usage(arg0); } if (target_is_glibc(&target)) { target.glibc_version = heap::c_allocator.create(); From 7c298c8c172c00a2f8c138434c66a8d192031a95 Mon Sep 17 00:00:00 2001 From: Andrew Kelley Date: Wed, 19 Feb 2020 22:09:25 -0500 Subject: [PATCH 07/18] fix generation of builtin import --- src/codegen.cpp | 24 ++++-------------------- 1 file changed, 4 insertions(+), 20 deletions(-) diff --git a/src/codegen.cpp b/src/codegen.cpp index 0c35bcd1ed..b5d621dd7c 100644 --- a/src/codegen.cpp +++ b/src/codegen.cpp @@ -8504,25 +8504,9 @@ Buf *codegen_generate_builtin_source(CodeGen *g) { for (uint32_t arch_i = 0; arch_i < field_count; arch_i += 1) { ZigLLVM_ArchType arch = target_arch_enum(arch_i); const char *arch_name = target_arch_name(arch); - SubArchList sub_arch_list = target_subarch_list(arch); - if (sub_arch_list == SubArchListNone) { - if (arch == g->zig_target->arch) { - g->target_arch_index = arch_i; - cur_arch = buf_ptr(buf_sprintf("Arch.%s", arch_name)); - } - } else { - const char *sub_arch_list_name = target_subarch_list_name(sub_arch_list); - if (arch == g->zig_target->arch) { - size_t sub_count = target_subarch_count(sub_arch_list); - for (size_t sub_i = 0; sub_i < sub_count; sub_i += 1) { - ZigLLVM_SubArchType sub = target_subarch_enum(sub_arch_list, sub_i); - if (sub == g->zig_target->sub_arch) { - g->target_sub_arch_index = sub_i; - cur_arch = buf_ptr(buf_sprintf("Arch{ .%s = Arch.%s.%s }", - arch_name, sub_arch_list_name, target_subarch_name(sub))); - } - } - } + if (arch == g->zig_target->arch) { + g->target_arch_index = arch_i; + cur_arch = arch_name; } } } @@ -8621,7 +8605,7 @@ Buf *codegen_generate_builtin_source(CodeGen *g) { buf_appendf(contents, "pub const is_test = %s;\n", bool_to_str(g->is_test_build)); buf_appendf(contents, "pub const single_threaded = %s;\n", bool_to_str(g->is_single_threaded)); buf_appendf(contents, "pub const os = Os.%s;\n", cur_os); - buf_appendf(contents, "pub const arch = %s;\n", cur_arch); + buf_appendf(contents, "pub const arch = Arch.%s;\n", cur_arch); buf_appendf(contents, "pub const abi = Abi.%s;\n", cur_abi); { buf_append_str(contents, "pub const cpu: Cpu = "); From 3c76e5e33dd1abcbf02eaea32168e1368ade8025 Mon Sep 17 00:00:00 2001 From: Andrew Kelley Date: Wed, 19 Feb 2020 22:09:35 -0500 Subject: [PATCH 08/18] update tls in std lib for lack of sub-arch --- lib/std/os/linux/tls.zig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/std/os/linux/tls.zig b/lib/std/os/linux/tls.zig index 5dbdafb60a..20c51abdfa 100644 --- a/lib/std/os/linux/tls.zig +++ b/lib/std/os/linux/tls.zig @@ -152,7 +152,7 @@ pub fn setThreadPointer(addr: usize) void { : [addr] "r" (addr) ); }, - .arm => |arm| { + .arm => { const rc = std.os.linux.syscall1(std.os.linux.SYS_set_tls, addr); assert(rc == 0); }, From 9c3eff91937dfc2f075342916d1fce659e18672f Mon Sep 17 00:00:00 2001 From: Andrew Kelley Date: Thu, 20 Feb 2020 12:18:32 -0500 Subject: [PATCH 09/18] Revert "arm: clean up the messy sub-architecture & CPU features" This reverts commit 96f45c27b65307fe4abd5d1fb1cf314b1f493d8e. --- lib/std/target/arm.zig | 744 ++++++++++++++++++++++++++--------------- 1 file changed, 467 insertions(+), 277 deletions(-) diff --git a/lib/std/target/arm.zig b/lib/std/target/arm.zig index e9b95ee4d3..86593049cf 100644 --- a/lib/std/target/arm.zig +++ b/lib/std/target/arm.zig @@ -9,6 +9,39 @@ pub const Feature = enum { aclass, acquire_release, aes, + armv2, + armv2a, + armv3, + armv3m, + armv4, + armv4t, + armv5t, + armv5te, + armv5tej, + armv6, + armv6_m, + armv6j, + armv6k, + armv6kz, + armv6s_m, + armv6t2, + armv7_a, + armv7_m, + armv7_r, + armv7e_m, + armv7k, + armv7s, + armv7ve, + armv8_a, + armv8_m_base, + armv8_m_main, + armv8_r, + armv8_1_a, + armv8_1_m_main, + armv8_2_a, + armv8_3_a, + armv8_4_a, + armv8_5_a, avoid_movs_shop, avoid_partial_cpsr, cheap_predicable_cpsr, @@ -24,13 +57,13 @@ pub const Feature = enum { execute_only, expand_fp_mlx, exynos, - fp16, - fp16fml, - fp64, fp_armv8, fp_armv8d16, fp_armv8d16sp, fp_armv8sp, + fp16, + fp16fml, + fp64, fpao, fpregs, fpregs16, @@ -82,46 +115,29 @@ pub const Feature = enum { splat_vfp_neon, strict_align, swift, - thumb2, thumb_mode, + thumb2, trustzone, use_aa, use_misched, - v2, - v2a, - v3, - v3m, - v4, v4t, v5t, v5te, - v5tej, v6, - v6j, v6k, - v6kz, v6m, - v6sm, v6t2, v7, - v7a, - v7m, - v7r, v7clrex, - v7em, - v7k, - v7s, - v7ve, v8a, - v8m, - v8m_main, - v8r, v8_1a, v8_1m_main, v8_2a, v8_3a, v8_4a, v8_5a, + v8m, + v8m_main, vfp2, vfp2d16, vfp2d16sp, @@ -182,6 +198,368 @@ pub const all_features = blk: { .neon, }), }; + result[@enumToInt(Feature.armv2)] = .{ + .llvm_name = "armv2", + .description = "ARMv2 architecture", + .dependencies = featureSet(&[_]Feature{}), + }; + result[@enumToInt(Feature.armv2a)] = .{ + .llvm_name = "armv2a", + .description = "ARMv2a architecture", + .dependencies = featureSet(&[_]Feature{}), + }; + result[@enumToInt(Feature.armv3)] = .{ + .llvm_name = "armv3", + .description = "ARMv3 architecture", + .dependencies = featureSet(&[_]Feature{}), + }; + result[@enumToInt(Feature.armv3m)] = .{ + .llvm_name = "armv3m", + .description = "ARMv3m architecture", + .dependencies = featureSet(&[_]Feature{}), + }; + result[@enumToInt(Feature.armv4)] = .{ + .llvm_name = "armv4", + .description = "ARMv4 architecture", + .dependencies = featureSet(&[_]Feature{}), + }; + result[@enumToInt(Feature.armv4t)] = .{ + .llvm_name = "armv4t", + .description = "ARMv4t architecture", + .dependencies = featureSet(&[_]Feature{ + .v4t, + }), + }; + result[@enumToInt(Feature.armv5t)] = .{ + .llvm_name = "armv5t", + .description = "ARMv5t architecture", + .dependencies = featureSet(&[_]Feature{ + .v5t, + }), + }; + result[@enumToInt(Feature.armv5te)] = .{ + .llvm_name = "armv5te", + .description = "ARMv5te architecture", + .dependencies = featureSet(&[_]Feature{ + .v5te, + }), + }; + result[@enumToInt(Feature.armv5tej)] = .{ + .llvm_name = "armv5tej", + .description = "ARMv5tej architecture", + .dependencies = featureSet(&[_]Feature{ + .v5te, + }), + }; + result[@enumToInt(Feature.armv6)] = .{ + .llvm_name = "armv6", + .description = "ARMv6 architecture", + .dependencies = featureSet(&[_]Feature{ + .dsp, + .v6, + }), + }; + result[@enumToInt(Feature.armv6_m)] = .{ + .llvm_name = "armv6-m", + .description = "ARMv6m architecture", + .dependencies = featureSet(&[_]Feature{ + .db, + .mclass, + .noarm, + .strict_align, + .thumb_mode, + .v6m, + }), + }; + result[@enumToInt(Feature.armv6j)] = .{ + .llvm_name = "armv6j", + .description = "ARMv7a architecture", + .dependencies = featureSet(&[_]Feature{ + .armv6, + }), + }; + result[@enumToInt(Feature.armv6k)] = .{ + .llvm_name = "armv6k", + .description = "ARMv6k architecture", + .dependencies = featureSet(&[_]Feature{ + .v6k, + }), + }; + result[@enumToInt(Feature.armv6kz)] = .{ + .llvm_name = "armv6kz", + .description = "ARMv6kz architecture", + .dependencies = featureSet(&[_]Feature{ + .trustzone, + .v6k, + }), + }; + result[@enumToInt(Feature.armv6s_m)] = .{ + .llvm_name = "armv6s-m", + .description = "ARMv6sm architecture", + .dependencies = featureSet(&[_]Feature{ + .db, + .mclass, + .noarm, + .strict_align, + .thumb_mode, + .v6m, + }), + }; + result[@enumToInt(Feature.armv6t2)] = .{ + .llvm_name = "armv6t2", + .description = "ARMv6t2 architecture", + .dependencies = featureSet(&[_]Feature{ + .dsp, + .v6t2, + }), + }; + result[@enumToInt(Feature.armv7_a)] = .{ + .llvm_name = "armv7-a", + .description = "ARMv7a architecture", + .dependencies = featureSet(&[_]Feature{ + .aclass, + .db, + .dsp, + .neon, + .v7, + }), + }; + result[@enumToInt(Feature.armv7_m)] = .{ + .llvm_name = "armv7-m", + .description = "ARMv7m architecture", + .dependencies = featureSet(&[_]Feature{ + .db, + .hwdiv, + .mclass, + .noarm, + .thumb_mode, + .thumb2, + .v7, + }), + }; + result[@enumToInt(Feature.armv7_r)] = .{ + .llvm_name = "armv7-r", + .description = "ARMv7r architecture", + .dependencies = featureSet(&[_]Feature{ + .db, + .dsp, + .hwdiv, + .rclass, + .v7, + }), + }; + result[@enumToInt(Feature.armv7e_m)] = .{ + .llvm_name = "armv7e-m", + .description = "ARMv7em architecture", + .dependencies = featureSet(&[_]Feature{ + .db, + .dsp, + .hwdiv, + .mclass, + .noarm, + .thumb_mode, + .thumb2, + .v7, + }), + }; + result[@enumToInt(Feature.armv7k)] = .{ + .llvm_name = "armv7k", + .description = "ARMv7a architecture", + .dependencies = featureSet(&[_]Feature{ + .armv7_a, + }), + }; + result[@enumToInt(Feature.armv7s)] = .{ + .llvm_name = "armv7s", + .description = "ARMv7a architecture", + .dependencies = featureSet(&[_]Feature{ + .armv7_a, + }), + }; + result[@enumToInt(Feature.armv7ve)] = .{ + .llvm_name = "armv7ve", + .description = "ARMv7ve architecture", + .dependencies = featureSet(&[_]Feature{ + .aclass, + .db, + .dsp, + .mp, + .neon, + .trustzone, + .v7, + .virtualization, + }), + }; + result[@enumToInt(Feature.armv8_a)] = .{ + .llvm_name = "armv8-a", + .description = "ARMv8a architecture", + .dependencies = featureSet(&[_]Feature{ + .aclass, + .crc, + .crypto, + .db, + .dsp, + .fp_armv8, + .mp, + .neon, + .trustzone, + .v8a, + .virtualization, + }), + }; + result[@enumToInt(Feature.armv8_m_base)] = .{ + .llvm_name = "armv8-m.base", + .description = "ARMv8mBaseline architecture", + .dependencies = featureSet(&[_]Feature{ + .@"8msecext", + .acquire_release, + .db, + .hwdiv, + .mclass, + .noarm, + .strict_align, + .thumb_mode, + .v7clrex, + .v8m, + }), + }; + result[@enumToInt(Feature.armv8_m_main)] = .{ + .llvm_name = "armv8-m.main", + .description = "ARMv8mMainline architecture", + .dependencies = featureSet(&[_]Feature{ + .@"8msecext", + .acquire_release, + .db, + .hwdiv, + .mclass, + .noarm, + .thumb_mode, + .v8m_main, + }), + }; + result[@enumToInt(Feature.armv8_r)] = .{ + .llvm_name = "armv8-r", + .description = "ARMv8r architecture", + .dependencies = featureSet(&[_]Feature{ + .crc, + .db, + .dfb, + .dsp, + .fp_armv8, + .mp, + .neon, + .rclass, + .v8a, + .virtualization, + }), + }; + result[@enumToInt(Feature.armv8_1_a)] = .{ + .llvm_name = "armv8.1-a", + .description = "ARMv81a architecture", + .dependencies = featureSet(&[_]Feature{ + .aclass, + .crc, + .crypto, + .db, + .dsp, + .fp_armv8, + .mp, + .neon, + .trustzone, + .v8_1a, + .virtualization, + }), + }; + result[@enumToInt(Feature.armv8_1_m_main)] = .{ + .llvm_name = "armv8.1-m.main", + .description = "ARMv81mMainline architecture", + .dependencies = featureSet(&[_]Feature{ + .@"8msecext", + .acquire_release, + .db, + .hwdiv, + .lob, + .mclass, + .noarm, + .ras, + .thumb_mode, + .v8_1m_main, + }), + }; + result[@enumToInt(Feature.armv8_2_a)] = .{ + .llvm_name = "armv8.2-a", + .description = "ARMv82a architecture", + .dependencies = featureSet(&[_]Feature{ + .aclass, + .crc, + .crypto, + .db, + .dsp, + .fp_armv8, + .mp, + .neon, + .ras, + .trustzone, + .v8_2a, + .virtualization, + }), + }; + result[@enumToInt(Feature.armv8_3_a)] = .{ + .llvm_name = "armv8.3-a", + .description = "ARMv83a architecture", + .dependencies = featureSet(&[_]Feature{ + .aclass, + .crc, + .crypto, + .db, + .dsp, + .fp_armv8, + .mp, + .neon, + .ras, + .trustzone, + .v8_3a, + .virtualization, + }), + }; + result[@enumToInt(Feature.armv8_4_a)] = .{ + .llvm_name = "armv8.4-a", + .description = "ARMv84a architecture", + .dependencies = featureSet(&[_]Feature{ + .aclass, + .crc, + .crypto, + .db, + .dotprod, + .dsp, + .fp_armv8, + .mp, + .neon, + .ras, + .trustzone, + .v8_4a, + .virtualization, + }), + }; + result[@enumToInt(Feature.armv8_5_a)] = .{ + .llvm_name = "armv8.5-a", + .description = "ARMv85a architecture", + .dependencies = featureSet(&[_]Feature{ + .aclass, + .crc, + .crypto, + .db, + .dotprod, + .dsp, + .fp_armv8, + .mp, + .neon, + .ras, + .trustzone, + .v8_5a, + .virtualization, + }), + }; result[@enumToInt(Feature.avoid_movs_shop)] = .{ .llvm_name = "avoid-movs-shop", .description = "Avoid movs instructions with shifter operand", @@ -281,25 +659,6 @@ pub const all_features = blk: { .zcz, }), }; - result[@enumToInt(Feature.fp16)] = .{ - .llvm_name = "fp16", - .description = "Enable half-precision floating point", - .dependencies = featureSet(&[_]Feature{}), - }; - result[@enumToInt(Feature.fp16fml)] = .{ - .llvm_name = "fp16fml", - .description = "Enable full half-precision floating point fml instructions", - .dependencies = featureSet(&[_]Feature{ - .fullfp16, - }), - }; - result[@enumToInt(Feature.fp64)] = .{ - .llvm_name = "fp64", - .description = "Floating point unit supports double precision", - .dependencies = featureSet(&[_]Feature{ - .fpregs64, - }), - }; result[@enumToInt(Feature.fp_armv8)] = .{ .llvm_name = "fp-armv8", .description = "Enable ARMv8 FP", @@ -334,6 +693,25 @@ pub const all_features = blk: { .vfp4sp, }), }; + result[@enumToInt(Feature.fp16)] = .{ + .llvm_name = "fp16", + .description = "Enable half-precision floating point", + .dependencies = featureSet(&[_]Feature{}), + }; + result[@enumToInt(Feature.fp16fml)] = .{ + .llvm_name = "fp16fml", + .description = "Enable full half-precision floating point fml instructions", + .dependencies = featureSet(&[_]Feature{ + .fullfp16, + }), + }; + result[@enumToInt(Feature.fp64)] = .{ + .llvm_name = "fp64", + .description = "Floating point unit supports double precision", + .dependencies = featureSet(&[_]Feature{ + .fpregs64, + }), + }; result[@enumToInt(Feature.fpao)] = .{ .llvm_name = "fpao", .description = "Enable fast computation of positive address offsets", @@ -615,16 +993,16 @@ pub const all_features = blk: { .description = "Swift ARM processors", .dependencies = featureSet(&[_]Feature{}), }; - result[@enumToInt(Feature.thumb2)] = .{ - .llvm_name = "thumb2", - .description = "Enable Thumb2 instructions", - .dependencies = featureSet(&[_]Feature{}), - }; result[@enumToInt(Feature.thumb_mode)] = .{ .llvm_name = "thumb-mode", .description = "Thumb mode", .dependencies = featureSet(&[_]Feature{}), }; + result[@enumToInt(Feature.thumb2)] = .{ + .llvm_name = "thumb2", + .description = "Enable Thumb2 instructions", + .dependencies = featureSet(&[_]Feature{}), + }; result[@enumToInt(Feature.trustzone)] = .{ .llvm_name = "trustzone", .description = "Enable support for TrustZone security extensions", @@ -640,116 +1018,50 @@ pub const all_features = blk: { .description = "Use the MachineScheduler", .dependencies = featureSet(&[_]Feature{}), }; - result[@enumToInt(Feature.v2)] = .{ - .llvm_name = "armv2", - .description = "ARMv2 architecture", - .dependencies = featureSet(&[_]Feature{}), - }; - result[@enumToInt(Feature.v2a)] = .{ - .llvm_name = "armv2a", - .description = "ARMv2a architecture", - .dependencies = featureSet(&[_]Feature{}), - }; - result[@enumToInt(Feature.v3)] = .{ - .llvm_name = "armv3", - .description = "ARMv3 architecture", - .dependencies = featureSet(&[_]Feature{}), - }; - result[@enumToInt(Feature.v3m)] = .{ - .llvm_name = "armv3m", - .description = "ARMv3m architecture", - .dependencies = featureSet(&[_]Feature{}), - }; - result[@enumToInt(Feature.v4)] = .{ - .llvm_name = "armv4", - .description = "ARMv4 architecture", - .dependencies = featureSet(&[_]Feature{}), - }; result[@enumToInt(Feature.v4t)] = .{ - .llvm_name = "armv4t", - .description = "ARMv4t architecture", + .llvm_name = "v4t", + .description = "Support ARM v4T instructions", .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.v5t)] = .{ - .llvm_name = "armv5t", - .description = "ARMv5t architecture", + .llvm_name = "v5t", + .description = "Support ARM v5T instructions", .dependencies = featureSet(&[_]Feature{ .v4t, }), }; result[@enumToInt(Feature.v5te)] = .{ - .llvm_name = "armv5te", - .description = "ARMv5te architecture", + .llvm_name = "v5te", + .description = "Support ARM v5TE, v5TEj, and v5TExp instructions", .dependencies = featureSet(&[_]Feature{ .v5t, }), }; - result[@enumToInt(Feature.v5tej)] = .{ - .llvm_name = "armv5tej", - .description = "ARMv5tej architecture", - .dependencies = featureSet(&[_]Feature{ - .v5te, - }), - }; result[@enumToInt(Feature.v6)] = .{ - .llvm_name = "armv6", - .description = "ARMv6 architecture", + .llvm_name = "v6", + .description = "Support ARM v6 instructions", .dependencies = featureSet(&[_]Feature{ - .dsp, .v5te, }), }; - result[@enumToInt(Feature.v6j)] = .{ - .llvm_name = "armv6j", - .description = "ARMv7a architecture", - .dependencies = featureSet(&[_]Feature{ - .v6, - }), - }; result[@enumToInt(Feature.v6k)] = .{ - .llvm_name = "armv6k", - .description = "ARMv6k architecture", + .llvm_name = "v6k", + .description = "Support ARM v6k instructions", .dependencies = featureSet(&[_]Feature{ .v6, }), }; - result[@enumToInt(Feature.v6kz)] = .{ - .llvm_name = "armv6kz", - .description = "ARMv6kz architecture", - .dependencies = featureSet(&[_]Feature{ - .trustzone, - .v6k, - }), - }; result[@enumToInt(Feature.v6m)] = .{ - .llvm_name = "armv6-m", - .description = "ARMv6m architecture", + .llvm_name = "v6m", + .description = "Support ARM v6M instructions", .dependencies = featureSet(&[_]Feature{ - .db, - .mclass, - .noarm, - .strict_align, - .thumb_mode, - .v6, - }), - }; - result[@enumToInt(Feature.v6sm)] = .{ - .llvm_name = "armv6s-m", - .description = "ARMv6sm architecture", - .dependencies = featureSet(&[_]Feature{ - .db, - .mclass, - .noarm, - .strict_align, - .thumb_mode, .v6, }), }; result[@enumToInt(Feature.v6t2)] = .{ - .llvm_name = "armv6t2", - .description = "ARMv6t2 architecture", + .llvm_name = "v6t2", + .description = "Support ARM v6t2 instructions", .dependencies = featureSet(&[_]Feature{ - .dsp, .thumb2, .v6k, .v8m, @@ -764,199 +1076,77 @@ pub const all_features = blk: { .v7clrex, }), }; - result[@enumToInt(Feature.v7a)] = .{ - .llvm_name = "armv7-a", - .description = "ARMv7a architecture", - .dependencies = featureSet(&[_]Feature{ - .aclass, - .db, - .dsp, - .neon, - .v7, - }), - }; - result[@enumToInt(Feature.v7m)] = .{ - .llvm_name = "armv7-m", - .description = "ARMv7m architecture", - .dependencies = featureSet(&[_]Feature{ - .db, - .hwdiv, - .mclass, - .noarm, - .thumb_mode, - .thumb2, - .v7, - }), - }; - result[@enumToInt(Feature.v7r)] = .{ - .llvm_name = "armv7-r", - .description = "ARMv7r architecture", - .dependencies = featureSet(&[_]Feature{ - .db, - .dsp, - .hwdiv, - .rclass, - .v7, - }), - }; result[@enumToInt(Feature.v7clrex)] = .{ .llvm_name = "v7clrex", .description = "Has v7 clrex instruction", .dependencies = featureSet(&[_]Feature{}), }; - result[@enumToInt(Feature.v7em)] = .{ - .llvm_name = "armv7e-m", - .description = "ARMv7em architecture", - .dependencies = featureSet(&[_]Feature{ - .db, - .dsp, - .hwdiv, - .mclass, - .noarm, - .thumb_mode, - .thumb2, - .v7, - }), - }; - result[@enumToInt(Feature.v7k)] = .{ - .llvm_name = "armv7k", - .description = "ARMv7a architecture", - .dependencies = featureSet(&[_]Feature{ - .v7a, - }), - }; - result[@enumToInt(Feature.v7s)] = .{ - .llvm_name = "armv7s", - .description = "ARMv7a architecture", - .dependencies = featureSet(&[_]Feature{ - .v7a, - }), - }; - result[@enumToInt(Feature.v7ve)] = .{ - .llvm_name = "armv7ve", - .description = "ARMv7ve architecture", - .dependencies = featureSet(&[_]Feature{ - .aclass, - .db, - .dsp, - .mp, - .neon, - .trustzone, - .v7, - .virtualization, - }), - }; result[@enumToInt(Feature.v8a)] = .{ - .llvm_name = "armv8-a", - .description = "ARMv8a architecture", + .llvm_name = "v8a", + .description = "Support ARM v8a instructions", .dependencies = featureSet(&[_]Feature{ - .aclass, .acquire_release, - .crc, - .crypto, - .db, - .fp_armv8, - .mp, - .neon, - .trustzone, .v7, - .virtualization, - }), - }; - result[@enumToInt(Feature.v8m)] = .{ - .llvm_name = "armv8-m.base", - .description = "ARMv8mBaseline architecture", - .dependencies = featureSet(&[_]Feature{ - .@"8msecext", - .acquire_release, - .db, - .hwdiv, - .mclass, - .noarm, - .strict_align, - .thumb_mode, - .v6m, - .v7clrex, - }), - }; - result[@enumToInt(Feature.v8m_main)] = .{ - .llvm_name = "armv8-m.main", - .description = "ARMv8mMainline architecture", - .dependencies = featureSet(&[_]Feature{ - .@"8msecext", - .acquire_release, - .db, - .hwdiv, - .mclass, - .noarm, - .thumb_mode, - .v7, - }), - }; - result[@enumToInt(Feature.v8r)] = .{ - .llvm_name = "armv8-r", - .description = "ARMv8r architecture", - .dependencies = featureSet(&[_]Feature{ - .dfb, - .rclass, - .v8a, }), }; result[@enumToInt(Feature.v8_1a)] = .{ - .llvm_name = "armv8.1-a", - .description = "ARMv81a architecture", + .llvm_name = "v8.1a", + .description = "Support ARM v8.1a instructions", .dependencies = featureSet(&[_]Feature{ .v8a, }), }; result[@enumToInt(Feature.v8_1m_main)] = .{ - .llvm_name = "armv8.1-m.main", - .description = "ARMv81mMainline architecture", + .llvm_name = "v8.1m.main", + .description = "Support ARM v8-1M Mainline instructions", .dependencies = featureSet(&[_]Feature{ - .@"8msecext", - .acquire_release, - .db, - .hwdiv, - .lob, - .mclass, - .noarm, - .ras, - .thumb_mode, .v8m_main, }), }; result[@enumToInt(Feature.v8_2a)] = .{ - .llvm_name = "armv8.2-a", - .description = "ARMv82a architecture", + .llvm_name = "v8.2a", + .description = "Support ARM v8.2a instructions", .dependencies = featureSet(&[_]Feature{ - .ras, .v8_1a, }), }; result[@enumToInt(Feature.v8_3a)] = .{ - .llvm_name = "armv8.3-a", - .description = "ARMv83a architecture", + .llvm_name = "v8.3a", + .description = "Support ARM v8.3a instructions", .dependencies = featureSet(&[_]Feature{ .v8_2a, }), }; result[@enumToInt(Feature.v8_4a)] = .{ - .llvm_name = "armv8.4-a", - .description = "ARMv84a architecture", + .llvm_name = "v8.4a", + .description = "Support ARM v8.4a instructions", .dependencies = featureSet(&[_]Feature{ .dotprod, .v8_3a, }), }; result[@enumToInt(Feature.v8_5a)] = .{ - .llvm_name = "armv8.5-a", - .description = "ARMv85a architecture", + .llvm_name = "v8.5a", + .description = "Support ARM v8.5a instructions", .dependencies = featureSet(&[_]Feature{ - .dotprod, .sb, .v8_4a, }), }; + result[@enumToInt(Feature.v8m)] = .{ + .llvm_name = "v8m", + .description = "Support ARM v8M Baseline instructions", + .dependencies = featureSet(&[_]Feature{ + .v6m, + }), + }; + result[@enumToInt(Feature.v8m_main)] = .{ + .llvm_name = "v8m.main", + .description = "Support ARM v8M Mainline instructions", + .dependencies = featureSet(&[_]Feature{ + .v7, + }), + }; result[@enumToInt(Feature.vfp2)] = .{ .llvm_name = "vfp2", .description = "Enable VFP2 instructions", From 33c69d5cb6fd555e164dd92e5b9dcfac37d82672 Mon Sep 17 00:00:00 2001 From: Andrew Kelley Date: Thu, 20 Feb 2020 15:27:42 -0500 Subject: [PATCH 10/18] arm: clarify which CPU features are sub-architectures versus which ones are instruction sets. --- lib/std/target.zig | 2 +- lib/std/target/arm.zig | 1150 ++++++++++++++++++++-------------------- 2 files changed, 576 insertions(+), 576 deletions(-) diff --git a/lib/std/target.zig b/lib/std/target.zig index 951c02d55a..3d04e3424e 100644 --- a/lib/std/target.zig +++ b/lib/std/target.zig @@ -219,7 +219,7 @@ pub const Target = union(enum) { pub const Set = struct { ints: [usize_count]usize, - pub const needed_bit_count = 138; + pub const needed_bit_count = 154; pub const byte_count = (needed_bit_count + 7) / 8; pub const usize_count = (byte_count + (@sizeOf(usize) - 1)) / @sizeOf(usize); pub const Index = std.math.Log2Int(@IntType(false, usize_count * @bitSizeOf(usize))); diff --git a/lib/std/target/arm.zig b/lib/std/target/arm.zig index 86593049cf..7195e2803e 100644 --- a/lib/std/target/arm.zig +++ b/lib/std/target/arm.zig @@ -9,39 +9,6 @@ pub const Feature = enum { aclass, acquire_release, aes, - armv2, - armv2a, - armv3, - armv3m, - armv4, - armv4t, - armv5t, - armv5te, - armv5tej, - armv6, - armv6_m, - armv6j, - armv6k, - armv6kz, - armv6s_m, - armv6t2, - armv7_a, - armv7_m, - armv7_r, - armv7e_m, - armv7k, - armv7s, - armv7ve, - armv8_a, - armv8_m_base, - armv8_m_main, - armv8_r, - armv8_1_a, - armv8_1_m_main, - armv8_2_a, - armv8_3_a, - armv8_4_a, - armv8_5_a, avoid_movs_shop, avoid_partial_cpsr, cheap_predicable_cpsr, @@ -57,13 +24,13 @@ pub const Feature = enum { execute_only, expand_fp_mlx, exynos, + fp16, + fp16fml, + fp64, fp_armv8, fp_armv8d16, fp_armv8d16sp, fp_armv8sp, - fp16, - fp16fml, - fp64, fpao, fpregs, fpregs16, @@ -71,6 +38,24 @@ pub const Feature = enum { fullfp16, fuse_aes, fuse_literals, + has_v4t, + has_v5t, + has_v5te, + has_v6, + has_v6k, + has_v6m, + has_v6t2, + has_v7, + has_v7clrex, + has_v8_1a, + has_v8_1m_main, + has_v8_2a, + has_v8_3a, + has_v8_4a, + has_v8_5a, + has_v8, + has_v8m, + has_v8m_main, hwdiv, hwdiv_arm, iwmmxt, @@ -115,29 +100,44 @@ pub const Feature = enum { splat_vfp_neon, strict_align, swift, - thumb_mode, thumb2, + thumb_mode, trustzone, use_aa, use_misched, + v2, + v2a, + v3, + v3m, + v4, v4t, v5t, v5te, + v5tej, v6, + v6j, v6k, + v6kz, v6m, + v6sm, v6t2, - v7, - v7clrex, + v7a, + v7em, + v7k, + v7m, + v7r, + v7s, + v7ve, v8a, + v8m, + v8m_main, + v8r, v8_1a, v8_1m_main, v8_2a, v8_3a, v8_4a, v8_5a, - v8m, - v8m_main, vfp2, vfp2d16, vfp2d16sp, @@ -198,368 +198,6 @@ pub const all_features = blk: { .neon, }), }; - result[@enumToInt(Feature.armv2)] = .{ - .llvm_name = "armv2", - .description = "ARMv2 architecture", - .dependencies = featureSet(&[_]Feature{}), - }; - result[@enumToInt(Feature.armv2a)] = .{ - .llvm_name = "armv2a", - .description = "ARMv2a architecture", - .dependencies = featureSet(&[_]Feature{}), - }; - result[@enumToInt(Feature.armv3)] = .{ - .llvm_name = "armv3", - .description = "ARMv3 architecture", - .dependencies = featureSet(&[_]Feature{}), - }; - result[@enumToInt(Feature.armv3m)] = .{ - .llvm_name = "armv3m", - .description = "ARMv3m architecture", - .dependencies = featureSet(&[_]Feature{}), - }; - result[@enumToInt(Feature.armv4)] = .{ - .llvm_name = "armv4", - .description = "ARMv4 architecture", - .dependencies = featureSet(&[_]Feature{}), - }; - result[@enumToInt(Feature.armv4t)] = .{ - .llvm_name = "armv4t", - .description = "ARMv4t architecture", - .dependencies = featureSet(&[_]Feature{ - .v4t, - }), - }; - result[@enumToInt(Feature.armv5t)] = .{ - .llvm_name = "armv5t", - .description = "ARMv5t architecture", - .dependencies = featureSet(&[_]Feature{ - .v5t, - }), - }; - result[@enumToInt(Feature.armv5te)] = .{ - .llvm_name = "armv5te", - .description = "ARMv5te architecture", - .dependencies = featureSet(&[_]Feature{ - .v5te, - }), - }; - result[@enumToInt(Feature.armv5tej)] = .{ - .llvm_name = "armv5tej", - .description = "ARMv5tej architecture", - .dependencies = featureSet(&[_]Feature{ - .v5te, - }), - }; - result[@enumToInt(Feature.armv6)] = .{ - .llvm_name = "armv6", - .description = "ARMv6 architecture", - .dependencies = featureSet(&[_]Feature{ - .dsp, - .v6, - }), - }; - result[@enumToInt(Feature.armv6_m)] = .{ - .llvm_name = "armv6-m", - .description = "ARMv6m architecture", - .dependencies = featureSet(&[_]Feature{ - .db, - .mclass, - .noarm, - .strict_align, - .thumb_mode, - .v6m, - }), - }; - result[@enumToInt(Feature.armv6j)] = .{ - .llvm_name = "armv6j", - .description = "ARMv7a architecture", - .dependencies = featureSet(&[_]Feature{ - .armv6, - }), - }; - result[@enumToInt(Feature.armv6k)] = .{ - .llvm_name = "armv6k", - .description = "ARMv6k architecture", - .dependencies = featureSet(&[_]Feature{ - .v6k, - }), - }; - result[@enumToInt(Feature.armv6kz)] = .{ - .llvm_name = "armv6kz", - .description = "ARMv6kz architecture", - .dependencies = featureSet(&[_]Feature{ - .trustzone, - .v6k, - }), - }; - result[@enumToInt(Feature.armv6s_m)] = .{ - .llvm_name = "armv6s-m", - .description = "ARMv6sm architecture", - .dependencies = featureSet(&[_]Feature{ - .db, - .mclass, - .noarm, - .strict_align, - .thumb_mode, - .v6m, - }), - }; - result[@enumToInt(Feature.armv6t2)] = .{ - .llvm_name = "armv6t2", - .description = "ARMv6t2 architecture", - .dependencies = featureSet(&[_]Feature{ - .dsp, - .v6t2, - }), - }; - result[@enumToInt(Feature.armv7_a)] = .{ - .llvm_name = "armv7-a", - .description = "ARMv7a architecture", - .dependencies = featureSet(&[_]Feature{ - .aclass, - .db, - .dsp, - .neon, - .v7, - }), - }; - result[@enumToInt(Feature.armv7_m)] = .{ - .llvm_name = "armv7-m", - .description = "ARMv7m architecture", - .dependencies = featureSet(&[_]Feature{ - .db, - .hwdiv, - .mclass, - .noarm, - .thumb_mode, - .thumb2, - .v7, - }), - }; - result[@enumToInt(Feature.armv7_r)] = .{ - .llvm_name = "armv7-r", - .description = "ARMv7r architecture", - .dependencies = featureSet(&[_]Feature{ - .db, - .dsp, - .hwdiv, - .rclass, - .v7, - }), - }; - result[@enumToInt(Feature.armv7e_m)] = .{ - .llvm_name = "armv7e-m", - .description = "ARMv7em architecture", - .dependencies = featureSet(&[_]Feature{ - .db, - .dsp, - .hwdiv, - .mclass, - .noarm, - .thumb_mode, - .thumb2, - .v7, - }), - }; - result[@enumToInt(Feature.armv7k)] = .{ - .llvm_name = "armv7k", - .description = "ARMv7a architecture", - .dependencies = featureSet(&[_]Feature{ - .armv7_a, - }), - }; - result[@enumToInt(Feature.armv7s)] = .{ - .llvm_name = "armv7s", - .description = "ARMv7a architecture", - .dependencies = featureSet(&[_]Feature{ - .armv7_a, - }), - }; - result[@enumToInt(Feature.armv7ve)] = .{ - .llvm_name = "armv7ve", - .description = "ARMv7ve architecture", - .dependencies = featureSet(&[_]Feature{ - .aclass, - .db, - .dsp, - .mp, - .neon, - .trustzone, - .v7, - .virtualization, - }), - }; - result[@enumToInt(Feature.armv8_a)] = .{ - .llvm_name = "armv8-a", - .description = "ARMv8a architecture", - .dependencies = featureSet(&[_]Feature{ - .aclass, - .crc, - .crypto, - .db, - .dsp, - .fp_armv8, - .mp, - .neon, - .trustzone, - .v8a, - .virtualization, - }), - }; - result[@enumToInt(Feature.armv8_m_base)] = .{ - .llvm_name = "armv8-m.base", - .description = "ARMv8mBaseline architecture", - .dependencies = featureSet(&[_]Feature{ - .@"8msecext", - .acquire_release, - .db, - .hwdiv, - .mclass, - .noarm, - .strict_align, - .thumb_mode, - .v7clrex, - .v8m, - }), - }; - result[@enumToInt(Feature.armv8_m_main)] = .{ - .llvm_name = "armv8-m.main", - .description = "ARMv8mMainline architecture", - .dependencies = featureSet(&[_]Feature{ - .@"8msecext", - .acquire_release, - .db, - .hwdiv, - .mclass, - .noarm, - .thumb_mode, - .v8m_main, - }), - }; - result[@enumToInt(Feature.armv8_r)] = .{ - .llvm_name = "armv8-r", - .description = "ARMv8r architecture", - .dependencies = featureSet(&[_]Feature{ - .crc, - .db, - .dfb, - .dsp, - .fp_armv8, - .mp, - .neon, - .rclass, - .v8a, - .virtualization, - }), - }; - result[@enumToInt(Feature.armv8_1_a)] = .{ - .llvm_name = "armv8.1-a", - .description = "ARMv81a architecture", - .dependencies = featureSet(&[_]Feature{ - .aclass, - .crc, - .crypto, - .db, - .dsp, - .fp_armv8, - .mp, - .neon, - .trustzone, - .v8_1a, - .virtualization, - }), - }; - result[@enumToInt(Feature.armv8_1_m_main)] = .{ - .llvm_name = "armv8.1-m.main", - .description = "ARMv81mMainline architecture", - .dependencies = featureSet(&[_]Feature{ - .@"8msecext", - .acquire_release, - .db, - .hwdiv, - .lob, - .mclass, - .noarm, - .ras, - .thumb_mode, - .v8_1m_main, - }), - }; - result[@enumToInt(Feature.armv8_2_a)] = .{ - .llvm_name = "armv8.2-a", - .description = "ARMv82a architecture", - .dependencies = featureSet(&[_]Feature{ - .aclass, - .crc, - .crypto, - .db, - .dsp, - .fp_armv8, - .mp, - .neon, - .ras, - .trustzone, - .v8_2a, - .virtualization, - }), - }; - result[@enumToInt(Feature.armv8_3_a)] = .{ - .llvm_name = "armv8.3-a", - .description = "ARMv83a architecture", - .dependencies = featureSet(&[_]Feature{ - .aclass, - .crc, - .crypto, - .db, - .dsp, - .fp_armv8, - .mp, - .neon, - .ras, - .trustzone, - .v8_3a, - .virtualization, - }), - }; - result[@enumToInt(Feature.armv8_4_a)] = .{ - .llvm_name = "armv8.4-a", - .description = "ARMv84a architecture", - .dependencies = featureSet(&[_]Feature{ - .aclass, - .crc, - .crypto, - .db, - .dotprod, - .dsp, - .fp_armv8, - .mp, - .neon, - .ras, - .trustzone, - .v8_4a, - .virtualization, - }), - }; - result[@enumToInt(Feature.armv8_5_a)] = .{ - .llvm_name = "armv8.5-a", - .description = "ARMv85a architecture", - .dependencies = featureSet(&[_]Feature{ - .aclass, - .crc, - .crypto, - .db, - .dotprod, - .dsp, - .fp_armv8, - .mp, - .neon, - .ras, - .trustzone, - .v8_5a, - .virtualization, - }), - }; result[@enumToInt(Feature.avoid_movs_shop)] = .{ .llvm_name = "avoid-movs-shop", .description = "Avoid movs instructions with shifter operand", @@ -659,6 +297,25 @@ pub const all_features = blk: { .zcz, }), }; + result[@enumToInt(Feature.fp16)] = .{ + .llvm_name = "fp16", + .description = "Enable half-precision floating point", + .dependencies = featureSet(&[_]Feature{}), + }; + result[@enumToInt(Feature.fp16fml)] = .{ + .llvm_name = "fp16fml", + .description = "Enable full half-precision floating point fml instructions", + .dependencies = featureSet(&[_]Feature{ + .fullfp16, + }), + }; + result[@enumToInt(Feature.fp64)] = .{ + .llvm_name = "fp64", + .description = "Floating point unit supports double precision", + .dependencies = featureSet(&[_]Feature{ + .fpregs64, + }), + }; result[@enumToInt(Feature.fp_armv8)] = .{ .llvm_name = "fp-armv8", .description = "Enable ARMv8 FP", @@ -693,25 +350,6 @@ pub const all_features = blk: { .vfp4sp, }), }; - result[@enumToInt(Feature.fp16)] = .{ - .llvm_name = "fp16", - .description = "Enable half-precision floating point", - .dependencies = featureSet(&[_]Feature{}), - }; - result[@enumToInt(Feature.fp16fml)] = .{ - .llvm_name = "fp16fml", - .description = "Enable full half-precision floating point fml instructions", - .dependencies = featureSet(&[_]Feature{ - .fullfp16, - }), - }; - result[@enumToInt(Feature.fp64)] = .{ - .llvm_name = "fp64", - .description = "Floating point unit supports double precision", - .dependencies = featureSet(&[_]Feature{ - .fpregs64, - }), - }; result[@enumToInt(Feature.fpao)] = .{ .llvm_name = "fpao", .description = "Enable fast computation of positive address offsets", @@ -754,6 +392,135 @@ pub const all_features = blk: { .description = "CPU fuses literal generation operations", .dependencies = featureSet(&[_]Feature{}), }; + result[@enumToInt(Feature.has_v4t)] = .{ + .llvm_name = "v4t", + .description = "Support ARM v4T instructions", + .dependencies = featureSet(&[_]Feature{}), + }; + result[@enumToInt(Feature.has_v5t)] = .{ + .llvm_name = "v5t", + .description = "Support ARM v5T instructions", + .dependencies = featureSet(&[_]Feature{ + .has_v4t, + }), + }; + result[@enumToInt(Feature.has_v5te)] = .{ + .llvm_name = "v5te", + .description = "Support ARM v5TE, v5TEj, and v5TExp instructions", + .dependencies = featureSet(&[_]Feature{ + .has_v5t, + }), + }; + result[@enumToInt(Feature.has_v6)] = .{ + .llvm_name = "v6", + .description = "Support ARM v6 instructions", + .dependencies = featureSet(&[_]Feature{ + .has_v5te, + }), + }; + result[@enumToInt(Feature.has_v6k)] = .{ + .llvm_name = "v6k", + .description = "Support ARM v6k instructions", + .dependencies = featureSet(&[_]Feature{ + .has_v6, + }), + }; + result[@enumToInt(Feature.has_v6m)] = .{ + .llvm_name = "v6m", + .description = "Support ARM v6M instructions", + .dependencies = featureSet(&[_]Feature{ + .has_v6, + }), + }; + result[@enumToInt(Feature.has_v6t2)] = .{ + .llvm_name = "v6t2", + .description = "Support ARM v6t2 instructions", + .dependencies = featureSet(&[_]Feature{ + .thumb2, + .has_v6k, + .has_v8m, + }), + }; + result[@enumToInt(Feature.has_v7)] = .{ + .llvm_name = "v7", + .description = "Support ARM v7 instructions", + .dependencies = featureSet(&[_]Feature{ + .perfmon, + .has_v6t2, + .has_v7clrex, + }), + }; + result[@enumToInt(Feature.has_v7clrex)] = .{ + .llvm_name = "v7clrex", + .description = "Has v7 clrex instruction", + .dependencies = featureSet(&[_]Feature{}), + }; + result[@enumToInt(Feature.has_v8)] = .{ + .llvm_name = "v8", + .description = "Support ARM v8 instructions", + .dependencies = featureSet(&[_]Feature{ + .acquire_release, + .has_v7, + }), + }; + result[@enumToInt(Feature.has_v8_1a)] = .{ + .llvm_name = "v8.1a", + .description = "Support ARM v8.1a instructions", + .dependencies = featureSet(&[_]Feature{ + .has_v8, + }), + }; + result[@enumToInt(Feature.has_v8_1m_main)] = .{ + .llvm_name = "v8.1m.main", + .description = "Support ARM v8-1M Mainline instructions", + .dependencies = featureSet(&[_]Feature{ + .has_v8m_main, + }), + }; + result[@enumToInt(Feature.has_v8_2a)] = .{ + .llvm_name = "v8.2a", + .description = "Support ARM v8.2a instructions", + .dependencies = featureSet(&[_]Feature{ + .has_v8_1a, + }), + }; + result[@enumToInt(Feature.has_v8_3a)] = .{ + .llvm_name = "v8.3a", + .description = "Support ARM v8.3a instructions", + .dependencies = featureSet(&[_]Feature{ + .has_v8_2a, + }), + }; + result[@enumToInt(Feature.has_v8_4a)] = .{ + .llvm_name = "v8.4a", + .description = "Support ARM v8.4a instructions", + .dependencies = featureSet(&[_]Feature{ + .dotprod, + .has_v8_3a, + }), + }; + result[@enumToInt(Feature.has_v8_5a)] = .{ + .llvm_name = "v8.5a", + .description = "Support ARM v8.5a instructions", + .dependencies = featureSet(&[_]Feature{ + .sb, + .has_v8_4a, + }), + }; + result[@enumToInt(Feature.has_v8m)] = .{ + .llvm_name = "v8m", + .description = "Support ARM v8M Baseline instructions", + .dependencies = featureSet(&[_]Feature{ + .has_v6m, + }), + }; + result[@enumToInt(Feature.has_v8m_main)] = .{ + .llvm_name = "v8m.main", + .description = "Support ARM v8M Mainline instructions", + .dependencies = featureSet(&[_]Feature{ + .has_v7, + }), + }; result[@enumToInt(Feature.hwdiv)] = .{ .llvm_name = "hwdiv", .description = "Enable divide instructions in Thumb", @@ -768,14 +535,14 @@ pub const all_features = blk: { .llvm_name = "iwmmxt", .description = "ARMv5te architecture", .dependencies = featureSet(&[_]Feature{ - .v5te, + .has_v5te, }), }; result[@enumToInt(Feature.iwmmxt2)] = .{ .llvm_name = "iwmmxt2", .description = "ARMv5te architecture", .dependencies = featureSet(&[_]Feature{ - .v5te, + .has_v5te, }), }; result[@enumToInt(Feature.lob)] = .{ @@ -820,7 +587,7 @@ pub const all_features = blk: { .dsp, .fpregs16, .fpregs64, - .v8_1m_main, + .has_v8_1m_main, }), }; result[@enumToInt(Feature.mve_fp)] = .{ @@ -993,16 +760,16 @@ pub const all_features = blk: { .description = "Swift ARM processors", .dependencies = featureSet(&[_]Feature{}), }; - result[@enumToInt(Feature.thumb_mode)] = .{ - .llvm_name = "thumb-mode", - .description = "Thumb mode", - .dependencies = featureSet(&[_]Feature{}), - }; result[@enumToInt(Feature.thumb2)] = .{ .llvm_name = "thumb2", .description = "Enable Thumb2 instructions", .dependencies = featureSet(&[_]Feature{}), }; + result[@enumToInt(Feature.thumb_mode)] = .{ + .llvm_name = "thumb-mode", + .description = "Thumb mode", + .dependencies = featureSet(&[_]Feature{}), + }; result[@enumToInt(Feature.trustzone)] = .{ .llvm_name = "trustzone", .description = "Enable support for TrustZone security extensions", @@ -1018,133 +785,366 @@ pub const all_features = blk: { .description = "Use the MachineScheduler", .dependencies = featureSet(&[_]Feature{}), }; - result[@enumToInt(Feature.v4t)] = .{ - .llvm_name = "v4t", - .description = "Support ARM v4T instructions", + result[@enumToInt(Feature.v2)] = .{ + .llvm_name = "armv2", + .description = "ARMv2 architecture", .dependencies = featureSet(&[_]Feature{}), }; - result[@enumToInt(Feature.v5t)] = .{ - .llvm_name = "v5t", - .description = "Support ARM v5T instructions", + result[@enumToInt(Feature.v2a)] = .{ + .llvm_name = "armv2a", + .description = "ARMv2a architecture", + .dependencies = featureSet(&[_]Feature{}), + }; + result[@enumToInt(Feature.v3)] = .{ + .llvm_name = "armv3", + .description = "ARMv3 architecture", + .dependencies = featureSet(&[_]Feature{}), + }; + result[@enumToInt(Feature.v3m)] = .{ + .llvm_name = "armv3m", + .description = "ARMv3m architecture", + .dependencies = featureSet(&[_]Feature{}), + }; + result[@enumToInt(Feature.v4)] = .{ + .llvm_name = "armv4", + .description = "ARMv4 architecture", + .dependencies = featureSet(&[_]Feature{}), + }; + result[@enumToInt(Feature.v4t)] = .{ + .llvm_name = "armv4t", + .description = "ARMv4t architecture", .dependencies = featureSet(&[_]Feature{ - .v4t, + .has_v4t, + }), + }; + result[@enumToInt(Feature.v5t)] = .{ + .llvm_name = "armv5t", + .description = "ARMv5t architecture", + .dependencies = featureSet(&[_]Feature{ + .has_v5t, }), }; result[@enumToInt(Feature.v5te)] = .{ - .llvm_name = "v5te", - .description = "Support ARM v5TE, v5TEj, and v5TExp instructions", + .llvm_name = "armv5te", + .description = "ARMv5te architecture", .dependencies = featureSet(&[_]Feature{ - .v5t, + .has_v5te, + }), + }; + result[@enumToInt(Feature.v5tej)] = .{ + .llvm_name = "armv5tej", + .description = "ARMv5tej architecture", + .dependencies = featureSet(&[_]Feature{ + .has_v5te, }), }; result[@enumToInt(Feature.v6)] = .{ - .llvm_name = "v6", - .description = "Support ARM v6 instructions", + .llvm_name = "armv6", + .description = "ARMv6 architecture", .dependencies = featureSet(&[_]Feature{ - .v5te, - }), - }; - result[@enumToInt(Feature.v6k)] = .{ - .llvm_name = "v6k", - .description = "Support ARM v6k instructions", - .dependencies = featureSet(&[_]Feature{ - .v6, + .dsp, + .has_v6, }), }; result[@enumToInt(Feature.v6m)] = .{ - .llvm_name = "v6m", - .description = "Support ARM v6M instructions", + .llvm_name = "armv6-m", + .description = "ARMv6m architecture", + .dependencies = featureSet(&[_]Feature{ + .db, + .mclass, + .noarm, + .strict_align, + .thumb_mode, + .has_v6m, + }), + }; + result[@enumToInt(Feature.v6j)] = .{ + .llvm_name = "armv6j", + .description = "ARMv7a architecture", .dependencies = featureSet(&[_]Feature{ .v6, }), }; + result[@enumToInt(Feature.v6k)] = .{ + .llvm_name = "armv6k", + .description = "ARMv6k architecture", + .dependencies = featureSet(&[_]Feature{ + .has_v6k, + }), + }; + result[@enumToInt(Feature.v6kz)] = .{ + .llvm_name = "armv6kz", + .description = "ARMv6kz architecture", + .dependencies = featureSet(&[_]Feature{ + .trustzone, + .has_v6k, + }), + }; + result[@enumToInt(Feature.v6sm)] = .{ + .llvm_name = "armv6s-m", + .description = "ARMv6sm architecture", + .dependencies = featureSet(&[_]Feature{ + .db, + .mclass, + .noarm, + .strict_align, + .thumb_mode, + .has_v6m, + }), + }; result[@enumToInt(Feature.v6t2)] = .{ - .llvm_name = "v6t2", - .description = "Support ARM v6t2 instructions", + .llvm_name = "armv6t2", + .description = "ARMv6t2 architecture", .dependencies = featureSet(&[_]Feature{ + .dsp, + .has_v6t2, + }), + }; + result[@enumToInt(Feature.v7a)] = .{ + .llvm_name = "armv7-a", + .description = "ARMv7a architecture", + .dependencies = featureSet(&[_]Feature{ + .aclass, + .db, + .dsp, + .neon, + .has_v7, + }), + }; + result[@enumToInt(Feature.v7m)] = .{ + .llvm_name = "armv7-m", + .description = "ARMv7m architecture", + .dependencies = featureSet(&[_]Feature{ + .db, + .hwdiv, + .mclass, + .noarm, + .thumb_mode, .thumb2, - .v6k, - .v8m, + .has_v7, }), }; - result[@enumToInt(Feature.v7)] = .{ - .llvm_name = "v7", - .description = "Support ARM v7 instructions", + result[@enumToInt(Feature.v7r)] = .{ + .llvm_name = "armv7-r", + .description = "ARMv7r architecture", .dependencies = featureSet(&[_]Feature{ - .perfmon, - .v6t2, - .v7clrex, + .db, + .dsp, + .hwdiv, + .rclass, + .has_v7, }), }; - result[@enumToInt(Feature.v7clrex)] = .{ - .llvm_name = "v7clrex", - .description = "Has v7 clrex instruction", - .dependencies = featureSet(&[_]Feature{}), + result[@enumToInt(Feature.v7em)] = .{ + .llvm_name = "armv7e-m", + .description = "ARMv7em architecture", + .dependencies = featureSet(&[_]Feature{ + .db, + .dsp, + .hwdiv, + .mclass, + .noarm, + .thumb_mode, + .thumb2, + .has_v7, + }), + }; + result[@enumToInt(Feature.v7k)] = .{ + .llvm_name = "armv7k", + .description = "ARMv7a architecture", + .dependencies = featureSet(&[_]Feature{ + .v7a, + }), + }; + result[@enumToInt(Feature.v7s)] = .{ + .llvm_name = "armv7s", + .description = "ARMv7a architecture", + .dependencies = featureSet(&[_]Feature{ + .v7a, + }), + }; + result[@enumToInt(Feature.v7ve)] = .{ + .llvm_name = "armv7ve", + .description = "ARMv7ve architecture", + .dependencies = featureSet(&[_]Feature{ + .aclass, + .db, + .dsp, + .mp, + .neon, + .trustzone, + .has_v7, + .virtualization, + }), }; result[@enumToInt(Feature.v8a)] = .{ - .llvm_name = "v8a", - .description = "Support ARM v8a instructions", + .llvm_name = "armv8-a", + .description = "ARMv8a architecture", .dependencies = featureSet(&[_]Feature{ - .acquire_release, - .v7, - }), - }; - result[@enumToInt(Feature.v8_1a)] = .{ - .llvm_name = "v8.1a", - .description = "Support ARM v8.1a instructions", - .dependencies = featureSet(&[_]Feature{ - .v8a, - }), - }; - result[@enumToInt(Feature.v8_1m_main)] = .{ - .llvm_name = "v8.1m.main", - .description = "Support ARM v8-1M Mainline instructions", - .dependencies = featureSet(&[_]Feature{ - .v8m_main, - }), - }; - result[@enumToInt(Feature.v8_2a)] = .{ - .llvm_name = "v8.2a", - .description = "Support ARM v8.2a instructions", - .dependencies = featureSet(&[_]Feature{ - .v8_1a, - }), - }; - result[@enumToInt(Feature.v8_3a)] = .{ - .llvm_name = "v8.3a", - .description = "Support ARM v8.3a instructions", - .dependencies = featureSet(&[_]Feature{ - .v8_2a, - }), - }; - result[@enumToInt(Feature.v8_4a)] = .{ - .llvm_name = "v8.4a", - .description = "Support ARM v8.4a instructions", - .dependencies = featureSet(&[_]Feature{ - .dotprod, - .v8_3a, - }), - }; - result[@enumToInt(Feature.v8_5a)] = .{ - .llvm_name = "v8.5a", - .description = "Support ARM v8.5a instructions", - .dependencies = featureSet(&[_]Feature{ - .sb, - .v8_4a, + .aclass, + .crc, + .crypto, + .db, + .dsp, + .fp_armv8, + .mp, + .neon, + .trustzone, + .has_v8, + .virtualization, }), }; result[@enumToInt(Feature.v8m)] = .{ - .llvm_name = "v8m", - .description = "Support ARM v8M Baseline instructions", + .llvm_name = "armv8-m.base", + .description = "ARMv8mBaseline architecture", .dependencies = featureSet(&[_]Feature{ - .v6m, + .@"8msecext", + .acquire_release, + .db, + .hwdiv, + .mclass, + .noarm, + .strict_align, + .thumb_mode, + .has_v7clrex, + .has_v8m, }), }; result[@enumToInt(Feature.v8m_main)] = .{ - .llvm_name = "v8m.main", - .description = "Support ARM v8M Mainline instructions", + .llvm_name = "armv8-m.main", + .description = "ARMv8mMainline architecture", .dependencies = featureSet(&[_]Feature{ - .v7, + .@"8msecext", + .acquire_release, + .db, + .hwdiv, + .mclass, + .noarm, + .thumb_mode, + .has_v8m_main, + }), + }; + result[@enumToInt(Feature.v8r)] = .{ + .llvm_name = "armv8-r", + .description = "ARMv8r architecture", + .dependencies = featureSet(&[_]Feature{ + .crc, + .db, + .dfb, + .dsp, + .fp_armv8, + .mp, + .neon, + .rclass, + .has_v8, + .virtualization, + }), + }; + result[@enumToInt(Feature.v8_1a)] = .{ + .llvm_name = "armv8.1-a", + .description = "ARMv81a architecture", + .dependencies = featureSet(&[_]Feature{ + .aclass, + .crc, + .crypto, + .db, + .dsp, + .fp_armv8, + .mp, + .neon, + .trustzone, + .has_v8_1a, + .virtualization, + }), + }; + result[@enumToInt(Feature.v8_1m_main)] = .{ + .llvm_name = "armv8.1-m.main", + .description = "ARMv81mMainline architecture", + .dependencies = featureSet(&[_]Feature{ + .@"8msecext", + .acquire_release, + .db, + .hwdiv, + .lob, + .mclass, + .noarm, + .ras, + .thumb_mode, + .has_v8_1m_main, + }), + }; + result[@enumToInt(Feature.v8_2a)] = .{ + .llvm_name = "armv8.2-a", + .description = "ARMv82a architecture", + .dependencies = featureSet(&[_]Feature{ + .aclass, + .crc, + .crypto, + .db, + .dsp, + .fp_armv8, + .mp, + .neon, + .ras, + .trustzone, + .has_v8_2a, + .virtualization, + }), + }; + result[@enumToInt(Feature.v8_3a)] = .{ + .llvm_name = "armv8.3-a", + .description = "ARMv83a architecture", + .dependencies = featureSet(&[_]Feature{ + .aclass, + .crc, + .crypto, + .db, + .dsp, + .fp_armv8, + .mp, + .neon, + .ras, + .trustzone, + .has_v8_3a, + .virtualization, + }), + }; + result[@enumToInt(Feature.v8_4a)] = .{ + .llvm_name = "armv8.4-a", + .description = "ARMv84a architecture", + .dependencies = featureSet(&[_]Feature{ + .aclass, + .crc, + .crypto, + .db, + .dotprod, + .dsp, + .fp_armv8, + .mp, + .neon, + .ras, + .trustzone, + .has_v8_4a, + .virtualization, + }), + }; + result[@enumToInt(Feature.v8_5a)] = .{ + .llvm_name = "armv8.5-a", + .description = "ARMv85a architecture", + .dependencies = featureSet(&[_]Feature{ + .aclass, + .crc, + .crypto, + .db, + .dotprod, + .dsp, + .fp_armv8, + .mp, + .neon, + .ras, + .trustzone, + .has_v8_5a, + .virtualization, }), }; result[@enumToInt(Feature.vfp2)] = .{ @@ -1279,7 +1279,7 @@ pub const all_features = blk: { .llvm_name = "xscale", .description = "ARMv5te architecture", .dependencies = featureSet(&[_]Feature{ - .v5te, + .has_v5te, }), }; result[@enumToInt(Feature.zcz)] = .{ @@ -1300,49 +1300,49 @@ pub const cpu = struct { .name = "arm1020e", .llvm_name = "arm1020e", .features = featureSet(&[_]Feature{ - .v5te, + .has_v5te, }), }; pub const arm1020t = CpuModel{ .name = "arm1020t", .llvm_name = "arm1020t", .features = featureSet(&[_]Feature{ - .v5t, + .has_v5t, }), }; pub const arm1022e = CpuModel{ .name = "arm1022e", .llvm_name = "arm1022e", .features = featureSet(&[_]Feature{ - .v5te, + .has_v5te, }), }; pub const arm10e = CpuModel{ .name = "arm10e", .llvm_name = "arm10e", .features = featureSet(&[_]Feature{ - .v5te, + .has_v5te, }), }; pub const arm10tdmi = CpuModel{ .name = "arm10tdmi", .llvm_name = "arm10tdmi", .features = featureSet(&[_]Feature{ - .v5t, + .has_v5t, }), }; pub const arm1136j_s = CpuModel{ .name = "arm1136j_s", .llvm_name = "arm1136j-s", .features = featureSet(&[_]Feature{ - .v6, + .has_v6, }), }; pub const arm1136jf_s = CpuModel{ .name = "arm1136jf_s", .llvm_name = "arm1136jf-s", .features = featureSet(&[_]Feature{ - .v6, + .has_v6, .slowfpvmlx, .vfp2, }), @@ -1351,14 +1351,14 @@ pub const cpu = struct { .name = "arm1156t2_s", .llvm_name = "arm1156t2-s", .features = featureSet(&[_]Feature{ - .v6t2, + .has_v6t2, }), }; pub const arm1156t2f_s = CpuModel{ .name = "arm1156t2f_s", .llvm_name = "arm1156t2f-s", .features = featureSet(&[_]Feature{ - .v6t2, + .has_v6t2, .slowfpvmlx, .vfp2, }), @@ -1390,28 +1390,28 @@ pub const cpu = struct { .name = "arm710t", .llvm_name = "arm710t", .features = featureSet(&[_]Feature{ - .v4t, + .has_v4t, }), }; pub const arm720t = CpuModel{ .name = "arm720t", .llvm_name = "arm720t", .features = featureSet(&[_]Feature{ - .v4t, + .has_v4t, }), }; pub const arm7tdmi = CpuModel{ .name = "arm7tdmi", .llvm_name = "arm7tdmi", .features = featureSet(&[_]Feature{ - .v4t, + .has_v4t, }), }; pub const arm7tdmi_s = CpuModel{ .name = "arm7tdmi_s", .llvm_name = "arm7tdmi-s", .features = featureSet(&[_]Feature{ - .v4t, + .has_v4t, }), }; pub const arm8 = CpuModel{ @@ -1432,84 +1432,84 @@ pub const cpu = struct { .name = "arm9", .llvm_name = "arm9", .features = featureSet(&[_]Feature{ - .v4t, + .has_v4t, }), }; pub const arm920 = CpuModel{ .name = "arm920", .llvm_name = "arm920", .features = featureSet(&[_]Feature{ - .v4t, + .has_v4t, }), }; pub const arm920t = CpuModel{ .name = "arm920t", .llvm_name = "arm920t", .features = featureSet(&[_]Feature{ - .v4t, + .has_v4t, }), }; pub const arm922t = CpuModel{ .name = "arm922t", .llvm_name = "arm922t", .features = featureSet(&[_]Feature{ - .v4t, + .has_v4t, }), }; pub const arm926ej_s = CpuModel{ .name = "arm926ej_s", .llvm_name = "arm926ej-s", .features = featureSet(&[_]Feature{ - .v5te, + .has_v5te, }), }; pub const arm940t = CpuModel{ .name = "arm940t", .llvm_name = "arm940t", .features = featureSet(&[_]Feature{ - .v4t, + .has_v4t, }), }; pub const arm946e_s = CpuModel{ .name = "arm946e_s", .llvm_name = "arm946e-s", .features = featureSet(&[_]Feature{ - .v5te, + .has_v5te, }), }; pub const arm966e_s = CpuModel{ .name = "arm966e_s", .llvm_name = "arm966e-s", .features = featureSet(&[_]Feature{ - .v5te, + .has_v5te, }), }; pub const arm968e_s = CpuModel{ .name = "arm968e_s", .llvm_name = "arm968e-s", .features = featureSet(&[_]Feature{ - .v5te, + .has_v5te, }), }; pub const arm9e = CpuModel{ .name = "arm9e", .llvm_name = "arm9e", .features = featureSet(&[_]Feature{ - .v5te, + .has_v5te, }), }; pub const arm9tdmi = CpuModel{ .name = "arm9tdmi", .llvm_name = "arm9tdmi", .features = featureSet(&[_]Feature{ - .v4t, + .has_v4t, }), }; pub const baseline = CpuModel{ .name = "baseline", .llvm_name = "generic", .features = featureSet(&[_]Feature{ - .v6m, + .has_v6m, }), }; pub const cortex_a12 = CpuModel{ @@ -1561,7 +1561,7 @@ pub const cpu = struct { .name = "cortex_a32", .llvm_name = "cortex-a32", .features = featureSet(&[_]Feature{ - .v8a, + .has_v8, .crc, .crypto, .hwdiv, @@ -1572,7 +1572,7 @@ pub const cpu = struct { .name = "cortex_a35", .llvm_name = "cortex-a35", .features = featureSet(&[_]Feature{ - .v8a, + .has_v8, .crc, .crypto, .hwdiv, @@ -1597,7 +1597,7 @@ pub const cpu = struct { .name = "cortex_a53", .llvm_name = "cortex-a53", .features = featureSet(&[_]Feature{ - .v8a, + .has_v8, .crc, .crypto, .fpao, @@ -1609,7 +1609,7 @@ pub const cpu = struct { .name = "cortex_a55", .llvm_name = "cortex-a55", .features = featureSet(&[_]Feature{ - .v8_2a, + .has_v8_2a, .dotprod, .hwdiv, .hwdiv_arm, @@ -1619,7 +1619,7 @@ pub const cpu = struct { .name = "cortex_a57", .llvm_name = "cortex-a57", .features = featureSet(&[_]Feature{ - .v8a, + .has_v8, .avoid_partial_cpsr, .cheap_predicable_cpsr, .crc, @@ -1649,7 +1649,7 @@ pub const cpu = struct { .name = "cortex_a72", .llvm_name = "cortex-a72", .features = featureSet(&[_]Feature{ - .v8a, + .has_v8, .crc, .crypto, .hwdiv, @@ -1660,7 +1660,7 @@ pub const cpu = struct { .name = "cortex_a73", .llvm_name = "cortex-a73", .features = featureSet(&[_]Feature{ - .v8a, + .has_v8, .crc, .crypto, .hwdiv, @@ -1671,7 +1671,7 @@ pub const cpu = struct { .name = "cortex_a75", .llvm_name = "cortex-a75", .features = featureSet(&[_]Feature{ - .v8_2a, + .has_v8_2a, .dotprod, .hwdiv, .hwdiv_arm, @@ -1682,7 +1682,7 @@ pub const cpu = struct { .llvm_name = "cortex-a76", .features = featureSet(&[_]Feature{ .a76, - .v8_2a, + .has_v8_2a, .crc, .crypto, .dotprod, @@ -1696,7 +1696,7 @@ pub const cpu = struct { .llvm_name = "cortex-a76ae", .features = featureSet(&[_]Feature{ .a76, - .v8_2a, + .has_v8_2a, .crc, .crypto, .dotprod, @@ -1742,28 +1742,28 @@ pub const cpu = struct { .name = "cortex_m0", .llvm_name = "cortex-m0", .features = featureSet(&[_]Feature{ - .v6m, + .has_v6m, }), }; pub const cortex_m0plus = CpuModel{ .name = "cortex_m0plus", .llvm_name = "cortex-m0plus", .features = featureSet(&[_]Feature{ - .v6m, + .has_v6m, }), }; pub const cortex_m1 = CpuModel{ .name = "cortex_m1", .llvm_name = "cortex-m1", .features = featureSet(&[_]Feature{ - .v6m, + .has_v6m, }), }; pub const cortex_m23 = CpuModel{ .name = "cortex_m23", .llvm_name = "cortex-m23", .features = featureSet(&[_]Feature{ - .v8m, + .has_v8m, .no_movt, }), }; @@ -1783,7 +1783,7 @@ pub const cpu = struct { .name = "cortex_m33", .llvm_name = "cortex-m33", .features = featureSet(&[_]Feature{ - .v8m_main, + .has_v8m_main, .dsp, .fp_armv8d16sp, .loop_align, @@ -1797,7 +1797,7 @@ pub const cpu = struct { .name = "cortex_m35p", .llvm_name = "cortex-m35p", .features = featureSet(&[_]Feature{ - .v8m_main, + .has_v8m_main, .dsp, .fp_armv8d16sp, .loop_align, @@ -1908,7 +1908,7 @@ pub const cpu = struct { .name = "cyclone", .llvm_name = "cyclone", .features = featureSet(&[_]Feature{ - .v8a, + .has_v8, .avoid_movs_shop, .avoid_partial_cpsr, .crypto, @@ -1929,14 +1929,14 @@ pub const cpu = struct { .name = "ep9312", .llvm_name = "ep9312", .features = featureSet(&[_]Feature{ - .v4t, + .has_v4t, }), }; pub const exynos_m1 = CpuModel{ .name = "exynos_m1", .llvm_name = "exynos-m1", .features = featureSet(&[_]Feature{ - .v8a, + .has_v8, .exynos, }), }; @@ -1944,7 +1944,7 @@ pub const cpu = struct { .name = "exynos_m2", .llvm_name = "exynos-m2", .features = featureSet(&[_]Feature{ - .v8a, + .has_v8, .exynos, }), }; @@ -1952,7 +1952,7 @@ pub const cpu = struct { .name = "exynos_m3", .llvm_name = "exynos-m3", .features = featureSet(&[_]Feature{ - .v8a, + .has_v8, .exynos, }), }; @@ -1960,7 +1960,7 @@ pub const cpu = struct { .name = "exynos_m4", .llvm_name = "exynos-m4", .features = featureSet(&[_]Feature{ - .v8_2a, + .has_v8_2a, .dotprod, .exynos, .fullfp16, @@ -1973,7 +1973,7 @@ pub const cpu = struct { .dotprod, .exynos, .fullfp16, - .v8_2a, + .has_v8_2a, }), }; pub const generic = CpuModel{ @@ -1985,7 +1985,7 @@ pub const cpu = struct { .name = "iwmmxt", .llvm_name = "iwmmxt", .features = featureSet(&[_]Feature{ - .v5te, + .has_v5te, }), }; pub const krait = CpuModel{ @@ -2012,14 +2012,14 @@ pub const cpu = struct { .crypto, .hwdiv, .hwdiv_arm, - .v8a, + .has_v8, }), }; pub const mpcore = CpuModel{ .name = "mpcore", .llvm_name = "mpcore", .features = featureSet(&[_]Feature{ - .v6k, + .has_v6k, .slowfpvmlx, .vfp2, }), @@ -2028,14 +2028,14 @@ pub const cpu = struct { .name = "mpcorenovfp", .llvm_name = "mpcorenovfp", .features = featureSet(&[_]Feature{ - .v6k, + .has_v6k, }), }; pub const sc000 = CpuModel{ .name = "sc000", .llvm_name = "sc000", .features = featureSet(&[_]Feature{ - .v6m, + .has_v6m, }), }; pub const sc300 = CpuModel{ @@ -2108,7 +2108,7 @@ pub const cpu = struct { .name = "xscale", .llvm_name = "xscale", .features = featureSet(&[_]Feature{ - .v5te, + .has_v5te, }), }; }; From 0f016b368de2ac93a298ab771646931329062fb5 Mon Sep 17 00:00:00 2001 From: Andrew Kelley Date: Thu, 20 Feb 2020 18:31:17 -0500 Subject: [PATCH 11/18] support -mcpu=baseline, both in stage1 and stage2 See e381a42de9c0f0c5439a926b0ac99026a0373f49 for more details. This is set up so that if we wish to make "baseline" depend on the OS in the future, it is possible to do that. --- lib/std/target.zig | 32 ++++++++++++++++++-------------- src-self-hosted/stage2.zig | 4 ++-- src/stage2.cpp | 27 ++++++++++++++++++--------- test/compile_errors.zig | 3 +-- test/tests.zig | 8 ++++---- test/translate_c.zig | 3 +-- 6 files changed, 44 insertions(+), 33 deletions(-) diff --git a/lib/std/target.zig b/lib/std/target.zig index 3d04e3424e..875ccda57f 100644 --- a/lib/std/target.zig +++ b/lib/std/target.zig @@ -726,8 +726,7 @@ pub const Target = union(enum) { /// Looks like "name+a+b-c-d+e", where "name" is a CPU Model name, "a", "b", and "e" /// are examples of CPU features to add to the set, and "c" and "d" are examples of CPU features /// to remove from the set. - /// The default value of `null` means to use the "baseline" feature set. - cpu: ?[]const u8 = null, + cpu_features: []const u8 = "baseline", }; pub fn parse(args: ParseOptions) !Target { @@ -742,23 +741,29 @@ pub const Target = union(enum) { const abi = if (abi_name) |n| try Abi.parse(n) else Abi.default(arch, os); const all_features = arch.allFeaturesList(); - const cpu: Cpu = if (args.cpu) |cpu_text| blk: { - var index: usize = 0; - while (index < cpu_text.len and cpu_text[index] != '+' and cpu_text[index] != '-') { - index += 1; - } - const cpu_name = cpu_text[0..index]; + var index: usize = 0; + while (index < args.cpu_features.len and + args.cpu_features[index] != '+' and + args.cpu_features[index] != '-') + { + index += 1; + } + const cpu_name = args.cpu_features[0..index]; + const cpu: Cpu = if (mem.eql(u8, cpu_name, "baseline")) Cpu.baseline(arch) else blk: { const cpu_model = try arch.parseCpuModel(cpu_name); var set = cpu_model.features; - while (index < cpu_text.len) { - const op = cpu_text[index]; + while (index < args.cpu_features.len) { + const op = args.cpu_features[index]; index += 1; const start = index; - while (index < cpu_text.len and cpu_text[index] != '+' and cpu_text[index] != '-') { + while (index < args.cpu_features.len and + args.cpu_features[index] != '+' and + args.cpu_features[index] != '-') + { index += 1; } - const feature_name = cpu_text[start..index]; + const feature_name = args.cpu_features[start..index]; for (all_features) |feature, feat_index_usize| { const feat_index = @intCast(Cpu.Feature.Set.Index, feat_index_usize); if (mem.eql(u8, feature_name, feature.name)) { @@ -779,8 +784,7 @@ pub const Target = union(enum) { .model = cpu_model, .features = set, }; - } else Cpu.baseline(arch); - + }; var cross = Cross{ .cpu = cpu, .os = os, diff --git a/src-self-hosted/stage2.zig b/src-self-hosted/stage2.zig index 048686190d..f7c4306cd5 100644 --- a/src-self-hosted/stage2.zig +++ b/src-self-hosted/stage2.zig @@ -675,8 +675,8 @@ fn stage2TargetParse( ) !void { const target: Target = if (zig_triple_oz) |zig_triple_z| blk: { const zig_triple = mem.toSliceConst(u8, zig_triple_z); - const mcpu = if (mcpu_oz) |mcpu_z| mem.toSliceConst(u8, mcpu_z) else null; - break :blk try Target.parse(.{ .arch_os_abi = zig_triple, .cpu = mcpu }); + const mcpu = if (mcpu_oz) |mcpu_z| mem.toSliceConst(u8, mcpu_z) else "baseline"; + break :blk try Target.parse(.{ .arch_os_abi = zig_triple, .cpu_features = mcpu }); } else Target.Native; try stage1_target.fromTarget(target); diff --git a/src/stage2.cpp b/src/stage2.cpp index f3ae03242e..035ce5a008 100644 --- a/src/stage2.cpp +++ b/src/stage2.cpp @@ -97,10 +97,20 @@ Error stage2_target_parse(struct ZigTarget *target, const char *zig_triple, cons if (zig_triple == nullptr) { get_native_target(target); - target->llvm_cpu_name = ZigLLVMGetHostCPUName(); - target->llvm_cpu_features = ZigLLVMGetNativeFeatures(); - target->builtin_str = "Target.Cpu.baseline(arch);\n"; - target->cache_hash = "native\n\n"; + if (mcpu == nullptr) { + target->llvm_cpu_name = ZigLLVMGetHostCPUName(); + target->llvm_cpu_features = ZigLLVMGetNativeFeatures(); + target->builtin_str = "Target.Cpu.baseline(arch);\n"; + target->cache_hash = "native\n\n"; + } else if (strcmp(mcpu, "baseline") == 0) { + target->llvm_cpu_name = ""; + target->llvm_cpu_features = ""; + target->builtin_str = "Target.Cpu.baseline(arch);\n"; + target->cache_hash = "baseline\n\n"; + } else { + const char *msg = "stage0 can't handle CPU/features in the target"; + stage2_panic(msg, strlen(msg)); + } } else { // first initialize all to zero *target = {}; @@ -135,15 +145,14 @@ Error stage2_target_parse(struct ZigTarget *target, const char *zig_triple, cons target->abi = target_default_abi(target->arch, target->os); } + if (mcpu != nullptr && strcmp(mcpu, "baseline") != 0) { + const char *msg = "stage0 can't handle CPU/features in the target"; + stage2_panic(msg, strlen(msg)); + } target->builtin_str = "Target.Cpu.baseline(arch);\n"; target->cache_hash = "\n\n"; } - if (mcpu != nullptr) { - const char *msg = "stage0 can't handle CPU/features in the target"; - stage2_panic(msg, strlen(msg)); - } - return ErrorNone; } diff --git a/test/compile_errors.zig b/test/compile_errors.zig index 9f2b3716b0..4d133a1b5c 100644 --- a/test/compile_errors.zig +++ b/test/compile_errors.zig @@ -350,8 +350,7 @@ pub fn addCases(cases: *tests.CompileErrorContext) void { }); tc.target = Target{ .Cross = .{ - .arch = .wasm32, - .cpu_features = Target.Arch.wasm32.getBaselineCpuFeatures(), + .cpu = Target.Cpu.baseline(.wasm32), .os = .wasi, .abi = .none, }, diff --git a/test/tests.zig b/test/tests.zig index 3190126208..f12f7f83d4 100644 --- a/test/tests.zig +++ b/test/tests.zig @@ -135,13 +135,13 @@ const test_targets = blk: { TestTarget{ .target = Target.parse(.{ .arch_os_abi = "arm-linux-none", - .cpu = "generic+v8a", + .cpu_features = "generic+v8a", }) catch unreachable, }, TestTarget{ .target = Target.parse(.{ .arch_os_abi = "arm-linux-musleabihf", - .cpu = "generic+v8a", + .cpu_features = "generic+v8a", }) catch unreachable, .link_libc = true, }, @@ -149,7 +149,7 @@ const test_targets = blk: { //TestTarget{ // .target = Target.parse(.{ // .arch_os_abi = "arm-linux-gnueabihf", - // .cpu = "generic+v8a", + // .cpu_features = "generic+v8a", // }) catch unreachable, // .link_libc = true, //}, @@ -449,7 +449,7 @@ pub fn addPkgTests( const ArchTag = @TagType(builtin.Arch); if (test_target.disable_native and test_target.target.getOs() == builtin.os and - @as(ArchTag, test_target.target.getArch()) == @as(ArchTag, builtin.arch)) + test_target.target.getArch() == builtin.arch) { continue; } diff --git a/test/translate_c.zig b/test/translate_c.zig index b69142e864..2351a6c94f 100644 --- a/test/translate_c.zig +++ b/test/translate_c.zig @@ -1095,10 +1095,9 @@ pub fn addCases(cases: *tests.TranslateCContext) void { cases.addWithTarget("Calling convention", tests.Target{ .Cross = .{ + .cpu = Target.Cpu.baseline(.i386), .os = .linux, - .arch = .i386, .abi = .none, - .cpu_features = Target.Arch.i386.getBaselineCpuFeatures(), }, }, \\void __attribute__((fastcall)) foo1(float *a); From 2de7d0b10c29442f556654b61d0c5c4a53047a09 Mon Sep 17 00:00:00 2001 From: Andrew Kelley Date: Thu, 20 Feb 2020 18:50:20 -0500 Subject: [PATCH 12/18] fix zig build, ABI ABI, and update tests to new Target layout --- lib/std/build.zig | 36 +++++++++++++----------------------- src-self-hosted/stage2.zig | 4 ++-- test/compile_errors.zig | 3 +-- test/translate_c.zig | 24 ++++++++---------------- 4 files changed, 24 insertions(+), 43 deletions(-) diff --git a/lib/std/build.zig b/lib/std/build.zig index f6e8474701..beb89ab7ce 100644 --- a/lib/std/build.zig +++ b/lib/std/build.zig @@ -1909,43 +1909,33 @@ pub const LibExeObjStep = struct { try zig_args.append(self.target.zigTriple(builder.allocator) catch unreachable); const all_features = self.target.getArch().allFeaturesList(); - var populated_cpu_features = cross.cpu_features.cpu.features; - if (self.target.getArch().subArchFeature()) |sub_arch_index| { - populated_cpu_features.addFeature(sub_arch_index); - } + var populated_cpu_features = cross.cpu.model.features; populated_cpu_features.populateDependencies(all_features); - if (populated_cpu_features.eql(cross.cpu_features.features)) { + if (populated_cpu_features.eql(cross.cpu.features)) { // The CPU name alone is sufficient. // If it is the baseline CPU, no command line args are required. - if (cross.cpu_features.cpu != self.target.getArch().getBaselineCpuFeatures().cpu) { - try zig_args.append("-target-cpu"); - try zig_args.append(cross.cpu_features.cpu.name); + if (cross.cpu.model != Target.Cpu.baseline(self.target.getArch()).model) { + try zig_args.append("-mcpu"); + try zig_args.append(cross.cpu.model.name); } } else { - try zig_args.append("-target-cpu"); - try zig_args.append(cross.cpu_features.cpu.name); + var mcpu_buffer = try std.Buffer.init(builder.allocator, "-mcpu="); + try zig_args.append(cross.cpu.model.name); - try zig_args.append("-target-feature"); - var feature_str_buffer = try std.Buffer.initSize(builder.allocator, 0); for (all_features) |feature, i_usize| { const i = @intCast(Target.Cpu.Feature.Set.Index, i_usize); const in_cpu_set = populated_cpu_features.isEnabled(i); - const in_actual_set = cross.cpu_features.features.isEnabled(i); + const in_actual_set = cross.cpu.features.isEnabled(i); if (in_cpu_set and !in_actual_set) { - try feature_str_buffer.appendByte('-'); - try feature_str_buffer.append(feature.name); - try feature_str_buffer.appendByte(','); + try mcpu_buffer.appendByte('-'); + try mcpu_buffer.append(feature.name); } else if (!in_cpu_set and in_actual_set) { - try feature_str_buffer.appendByte('+'); - try feature_str_buffer.append(feature.name); - try feature_str_buffer.appendByte(','); + try mcpu_buffer.appendByte('+'); + try mcpu_buffer.append(feature.name); } } - if (mem.endsWith(u8, feature_str_buffer.toSliceConst(), ",")) { - feature_str_buffer.shrink(feature_str_buffer.len() - 1); - } - try zig_args.append(feature_str_buffer.toSliceConst()); + try zig_args.append(mcpu_buffer.toSliceConst()); } }, } diff --git a/src-self-hosted/stage2.zig b/src-self-hosted/stage2.zig index f7c4306cd5..683e698010 100644 --- a/src-self-hosted/stage2.zig +++ b/src-self-hosted/stage2.zig @@ -930,7 +930,7 @@ const Stage2Target = extern struct { const in_arch = in_target.arch - 1; // skip over ZigLLVM_UnknownArch const in_sub_arch = in_target.sub_arch - 1; // skip over ZigLLVM_NoSubArch const in_os = in_target.os; - const in_abi = in_target.abi - 1; // skip over ZigLLVM_UnknownEnvironment + const in_abi = in_target.abi; return .{ .Cross = .{ @@ -956,7 +956,7 @@ const Stage2Target = extern struct { self.sub_arch = 0; self.vendor = 0; self.os = @enumToInt(target.getOs()); - self.abi = @enumToInt(target.getAbi()) + 1; // skip over ZigLLVM_UnknownEnvironment + self.abi = @enumToInt(target.getAbi()); try initStage1TargetCpuFeatures(self, cpu); } }; diff --git a/test/compile_errors.zig b/test/compile_errors.zig index a204273313..56dde8dd8f 100644 --- a/test/compile_errors.zig +++ b/test/compile_errors.zig @@ -763,8 +763,7 @@ pub fn addCases(cases: *tests.CompileErrorContext) void { }); tc.target = Target{ .Cross = .{ - .arch = .x86_64, - .cpu_features = Target.Arch.x86_64.getBaselineCpuFeatures(), + .cpu = Target.Cpu.baseline(.x86_64), .os = .linux, .abi = .gnu, }, diff --git a/test/translate_c.zig b/test/translate_c.zig index 2351a6c94f..e3c68a6d53 100644 --- a/test/translate_c.zig +++ b/test/translate_c.zig @@ -1113,14 +1113,10 @@ pub fn addCases(cases: *tests.TranslateCContext) void { \\pub fn foo5(a: [*c]f32) callconv(.Thiscall) void; }); - cases.addWithTarget("Calling convention", tests.Target{ - .Cross = .{ - .os = .linux, - .arch = .{ .arm = .v8_5a }, - .abi = .none, - .cpu_features = (Target.Arch{ .arm = .v8_5a }).getBaselineCpuFeatures(), - }, - }, + cases.addWithTarget("Calling convention", Target.parse(.{ + .arch_os_abi = "arm-linux-none", + .cpu_features = "generic+v8_5a", + }) catch unreachable, \\void __attribute__((pcs("aapcs"))) foo1(float *a); \\void __attribute__((pcs("aapcs-vfp"))) foo2(float *a); , &[_][]const u8{ @@ -1128,14 +1124,10 @@ pub fn addCases(cases: *tests.TranslateCContext) void { \\pub fn foo2(a: [*c]f32) callconv(.AAPCSVFP) void; }); - cases.addWithTarget("Calling convention", tests.Target{ - .Cross = .{ - .os = .linux, - .arch = .{ .aarch64 = .v8_5a }, - .abi = .none, - .cpu_features = (Target.Arch{ .aarch64 = .v8_5a }).getBaselineCpuFeatures(), - }, - }, + cases.addWithTarget("Calling convention", Target.parse(.{ + .arch_os_abi = "aarch64-linux-none", + .cpu_features = "generic+v8_5a", + }) catch unreachable, \\void __attribute__((aarch64_vector_pcs)) foo1(float *a); , &[_][]const u8{ \\pub fn foo1(a: [*c]f32) callconv(.Vectorcall) void; From 7b8b4d200cce5030efb758eb4fc8fade9c3e8402 Mon Sep 17 00:00:00 2001 From: Andrew Kelley Date: Fri, 21 Feb 2020 01:54:00 -0500 Subject: [PATCH 13/18] fix not initializing some ZigTarget fields --- src-self-hosted/stage2.zig | 18 +++++++++++++----- 1 file changed, 13 insertions(+), 5 deletions(-) diff --git a/src-self-hosted/stage2.zig b/src-self-hosted/stage2.zig index 683e698010..6a537a486a 100644 --- a/src-self-hosted/stage2.zig +++ b/src-self-hosted/stage2.zig @@ -952,11 +952,19 @@ const Stage2Target = extern struct { }, .Cross => target.getCpu(), }; - self.arch = @enumToInt(target.getArch()) + 1; // skip over ZigLLVM_UnknownArch - self.sub_arch = 0; - self.vendor = 0; - self.os = @enumToInt(target.getOs()); - self.abi = @enumToInt(target.getAbi()); + self.* = .{ + .arch = @enumToInt(target.getArch()) + 1, // skip over ZigLLVM_UnknownArch + .sub_arch = 0, + .vendor = 0, + .os = @enumToInt(target.getOs()), + .abi = @enumToInt(target.getAbi()), + .llvm_cpu_name = null, + .llvm_cpu_features = null, + .builtin_str = null, + .cache_hash = null, + .is_native = target == .Native, + .glibc_version = null, + }; try initStage1TargetCpuFeatures(self, cpu); } }; From a391a82e4987728e30bf5c27be5631f9d4db530f Mon Sep 17 00:00:00 2001 From: Andrew Kelley Date: Fri, 21 Feb 2020 01:58:40 -0500 Subject: [PATCH 14/18] fix zig build adding invalid cli args --- lib/std/build.zig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/std/build.zig b/lib/std/build.zig index beb89ab7ce..43cc4a2150 100644 --- a/lib/std/build.zig +++ b/lib/std/build.zig @@ -1921,7 +1921,7 @@ pub const LibExeObjStep = struct { } } else { var mcpu_buffer = try std.Buffer.init(builder.allocator, "-mcpu="); - try zig_args.append(cross.cpu.model.name); + try mcpu_buffer.append(cross.cpu.model.name); for (all_features) |feature, i_usize| { const i = @intCast(Target.Cpu.Feature.Set.Index, i_usize); From ab56d3e18ca7dbc430fdc2ca51fce08804cc3599 Mon Sep 17 00:00:00 2001 From: Andrew Kelley Date: Fri, 21 Feb 2020 11:07:56 -0500 Subject: [PATCH 15/18] fix std.Target unit tests --- lib/std/target.zig | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/lib/std/target.zig b/lib/std/target.zig index 875ccda57f..a341fb3977 100644 --- a/lib/std/target.zig +++ b/lib/std/target.zig @@ -1262,7 +1262,7 @@ test "Target.parse" { { const target = (try Target.parse(.{ .arch_os_abi = "x86_64-linux-gnu", - .cpu = "x86_64-sse-sse2-avx-cx8", + .cpu_features = "x86_64-sse-sse2-avx-cx8", })).Cross; std.testing.expect(target.os == .linux); @@ -1277,7 +1277,7 @@ test "Target.parse" { { const target = (try Target.parse(.{ .arch_os_abi = "arm-linux-musleabihf", - .cpu = "generic+v8a", + .cpu_features = "generic+v8a", })).Cross; std.testing.expect(target.os == .linux); From 61c67a9833c312678289272e5e0547a78cbd299c Mon Sep 17 00:00:00 2001 From: Andrew Kelley Date: Fri, 21 Feb 2020 11:47:34 -0500 Subject: [PATCH 16/18] remove sub-arch from stage1 --- src-self-hosted/stage2.zig | 7 +- src/codegen.cpp | 3 - src/glibc.cpp | 6 +- src/stage2.cpp | 4 +- src/stage2.h | 5 +- src/target.cpp | 279 +------------------------------------ src/target.hpp | 21 +-- src/zig_llvm.cpp | 94 +------------ src/zig_llvm.h | 38 +---- 9 files changed, 17 insertions(+), 440 deletions(-) diff --git a/src-self-hosted/stage2.zig b/src-self-hosted/stage2.zig index 6a537a486a..d99f436a75 100644 --- a/src-self-hosted/stage2.zig +++ b/src-self-hosted/stage2.zig @@ -909,12 +909,11 @@ export fn stage2_libc_render(stage1_libc: *Stage2LibCInstallation, output_file: // ABI warning const Stage2Target = extern struct { arch: c_int, - sub_arch: c_int, - vendor: c_int, - abi: c_int, + abi: c_int, os: c_int, + is_native: bool, glibc_version: ?*Stage2GLibCVersion, // null means default @@ -928,7 +927,6 @@ const Stage2Target = extern struct { if (in_target.is_native) return .Native; const in_arch = in_target.arch - 1; // skip over ZigLLVM_UnknownArch - const in_sub_arch = in_target.sub_arch - 1; // skip over ZigLLVM_NoSubArch const in_os = in_target.os; const in_abi = in_target.abi; @@ -954,7 +952,6 @@ const Stage2Target = extern struct { }; self.* = .{ .arch = @enumToInt(target.getArch()) + 1, // skip over ZigLLVM_UnknownArch - .sub_arch = 0, .vendor = 0, .os = @enumToInt(target.getOs()), .abi = @enumToInt(target.getAbi()), diff --git a/src/codegen.cpp b/src/codegen.cpp index b5d621dd7c..6e48f9be42 100644 --- a/src/codegen.cpp +++ b/src/codegen.cpp @@ -8711,7 +8711,6 @@ static Error define_builtin_compile_vars(CodeGen *g) { cache_int(&cache_hash, g->code_model); cache_int(&cache_hash, g->zig_target->is_native); cache_int(&cache_hash, g->zig_target->arch); - cache_int(&cache_hash, g->zig_target->sub_arch); cache_int(&cache_hash, g->zig_target->vendor); cache_int(&cache_hash, g->zig_target->os); cache_int(&cache_hash, g->zig_target->abi); @@ -9616,7 +9615,6 @@ Error create_c_object_cache(CodeGen *g, CacheHash **out_cache_hash, bool verbose cache_list_of_str(cache_hash, g->libc_include_dir_list, g->libc_include_dir_len); cache_int(cache_hash, g->zig_target->is_native); cache_int(cache_hash, g->zig_target->arch); - cache_int(cache_hash, g->zig_target->sub_arch); cache_int(cache_hash, g->zig_target->vendor); cache_int(cache_hash, g->zig_target->os); cache_int(cache_hash, g->zig_target->abi); @@ -10380,7 +10378,6 @@ static Error check_cache(CodeGen *g, Buf *manifest_dir, Buf *digest) { cache_int(ch, g->out_type); cache_bool(ch, g->zig_target->is_native); cache_int(ch, g->zig_target->arch); - cache_int(ch, g->zig_target->sub_arch); cache_int(ch, g->zig_target->vendor); cache_int(ch, g->zig_target->os); cache_int(ch, g->zig_target->abi); diff --git a/src/glibc.cpp b/src/glibc.cpp index ec45b6afa7..849aac6c77 100644 --- a/src/glibc.cpp +++ b/src/glibc.cpp @@ -116,10 +116,8 @@ Error glibc_load_metadata(ZigGLibCAbi **out_result, Buf *zig_lib_dir, bool verbo assert(opt_abi.is_some); - err = target_parse_archsub(&target->arch, &target->sub_arch, - (char*)opt_arch.value.ptr, opt_arch.value.len); - // there's no sub arch so we might get an error, but the arch is still populated - assert(err == ErrorNone || err == ErrorUnknownArchitecture); + err = target_parse_arch(&target->arch, (char*)opt_arch.value.ptr, opt_arch.value.len); + assert(err == ErrorNone); target->os = OsLinux; diff --git a/src/stage2.cpp b/src/stage2.cpp index f5bfc1001c..736f11622e 100644 --- a/src/stage2.cpp +++ b/src/stage2.cpp @@ -125,9 +125,7 @@ Error stage2_target_parse(struct ZigTarget *target, const char *zig_triple, cons if (!opt_archsub.is_some) return ErrorMissingArchitecture; - if ((err = target_parse_archsub(&target->arch, &target->sub_arch, - (char*)opt_archsub.value.ptr, opt_archsub.value.len))) - { + if ((err = target_parse_arch(&target->arch, (char*)opt_archsub.value.ptr, opt_archsub.value.len))) { return err; } diff --git a/src/stage2.h b/src/stage2.h index fe49c943a0..e6db241e88 100644 --- a/src/stage2.h +++ b/src/stage2.h @@ -279,12 +279,11 @@ struct Stage2TargetData; // ABI warning struct ZigTarget { enum ZigLLVM_ArchType arch; - enum ZigLLVM_SubArchType sub_arch; - enum ZigLLVM_VendorType vendor; - enum ZigLLVM_EnvironmentType abi; + enum ZigLLVM_EnvironmentType abi; Os os; + bool is_native; struct ZigGLibCVersion *glibc_version; // null means default diff --git a/src/target.cpp b/src/target.cpp index fb064c4849..0a3fb3da5f 100644 --- a/src/target.cpp +++ b/src/target.cpp @@ -15,60 +15,6 @@ #include -static const SubArchList subarch_list_list[] = { - SubArchListNone, - SubArchListArm32, - SubArchListArm64, - SubArchListKalimba, - SubArchListMips, -}; - -static const ZigLLVM_SubArchType subarch_list_arm32[] = { - ZigLLVM_ARMSubArch_v8_5a, - ZigLLVM_ARMSubArch_v8_4a, - ZigLLVM_ARMSubArch_v8_3a, - ZigLLVM_ARMSubArch_v8_2a, - ZigLLVM_ARMSubArch_v8_1a, - ZigLLVM_ARMSubArch_v8, - ZigLLVM_ARMSubArch_v8r, - ZigLLVM_ARMSubArch_v8m_baseline, - ZigLLVM_ARMSubArch_v8m_mainline, - ZigLLVM_ARMSubArch_v8_1m_mainline, - ZigLLVM_ARMSubArch_v7, - ZigLLVM_ARMSubArch_v7em, - ZigLLVM_ARMSubArch_v7m, - ZigLLVM_ARMSubArch_v7s, - ZigLLVM_ARMSubArch_v7k, - ZigLLVM_ARMSubArch_v7ve, - ZigLLVM_ARMSubArch_v6, - ZigLLVM_ARMSubArch_v6m, - ZigLLVM_ARMSubArch_v6k, - ZigLLVM_ARMSubArch_v6t2, - ZigLLVM_ARMSubArch_v5, - ZigLLVM_ARMSubArch_v5te, - ZigLLVM_ARMSubArch_v4t, - -}; - -static const ZigLLVM_SubArchType subarch_list_arm64[] = { - ZigLLVM_ARMSubArch_v8_5a, - ZigLLVM_ARMSubArch_v8_4a, - ZigLLVM_ARMSubArch_v8_3a, - ZigLLVM_ARMSubArch_v8_2a, - ZigLLVM_ARMSubArch_v8_1a, - ZigLLVM_ARMSubArch_v8, -}; - -static const ZigLLVM_SubArchType subarch_list_kalimba[] = { - ZigLLVM_KalimbaSubArch_v5, - ZigLLVM_KalimbaSubArch_v4, - ZigLLVM_KalimbaSubArch_v3, -}; - -static const ZigLLVM_SubArchType subarch_list_mips[] = { - ZigLLVM_MipsSubArch_r6, -}; - static const ZigLLVM_ArchType arch_list[] = { ZigLLVM_arm, // ARM (little endian): arm, armv.*, xscale ZigLLVM_armeb, // ARM (big endian): armeb @@ -509,7 +455,6 @@ void get_native_target(ZigTarget *target) { ZigLLVM_ObjectFormatType oformat; // ignored; based on arch/os ZigLLVMGetNativeTarget( &target->arch, - &target->sub_arch, &target->vendor, &os_type, &target->abi, @@ -535,223 +480,18 @@ void target_init_default_glibc_version(ZigTarget *target) { *target->glibc_version = {2, 17, 0}; } -Error target_parse_archsub(ZigLLVM_ArchType *out_arch, ZigLLVM_SubArchType *out_sub, - const char *archsub_ptr, size_t archsub_len) -{ +Error target_parse_arch(ZigLLVM_ArchType *out_arch, const char *arch_ptr, size_t arch_len) { *out_arch = ZigLLVM_UnknownArch; - *out_sub = ZigLLVM_NoSubArch; for (size_t arch_i = 0; arch_i < array_length(arch_list); arch_i += 1) { ZigLLVM_ArchType arch = arch_list[arch_i]; - SubArchList sub_arch_list = target_subarch_list(arch); - size_t subarch_count = target_subarch_count(sub_arch_list); - if (mem_eql_str(archsub_ptr, archsub_len, target_arch_name(arch))) { + if (mem_eql_str(arch_ptr, arch_len, target_arch_name(arch))) { *out_arch = arch; - if (subarch_count == 0) { - return ErrorNone; - } - } - for (size_t sub_i = 0; sub_i < subarch_count; sub_i += 1) { - ZigLLVM_SubArchType sub = target_subarch_enum(sub_arch_list, sub_i); - char arch_name[64]; - int n = sprintf(arch_name, "%s%s", target_arch_name(arch), target_subarch_name(sub)); - if (mem_eql_mem(arch_name, n, archsub_ptr, archsub_len)) { - *out_arch = arch; - *out_sub = sub; - return ErrorNone; - } + return ErrorNone; } } return ErrorUnknownArchitecture; } -SubArchList target_subarch_list(ZigLLVM_ArchType arch) { - switch (arch) { - case ZigLLVM_UnknownArch: - zig_unreachable(); - case ZigLLVM_arm: - case ZigLLVM_armeb: - case ZigLLVM_thumb: - case ZigLLVM_thumbeb: - return SubArchListArm32; - - case ZigLLVM_aarch64: - case ZigLLVM_aarch64_be: - case ZigLLVM_aarch64_32: - return SubArchListArm64; - - case ZigLLVM_kalimba: - return SubArchListKalimba; - - case ZigLLVM_arc: - case ZigLLVM_avr: - case ZigLLVM_bpfel: - case ZigLLVM_bpfeb: - case ZigLLVM_hexagon: - case ZigLLVM_mips: - case ZigLLVM_mipsel: - case ZigLLVM_mips64: - case ZigLLVM_mips64el: - case ZigLLVM_msp430: - case ZigLLVM_ppc: - case ZigLLVM_ppc64: - case ZigLLVM_ppc64le: - case ZigLLVM_r600: - case ZigLLVM_amdgcn: - case ZigLLVM_riscv32: - case ZigLLVM_riscv64: - case ZigLLVM_sparc: - case ZigLLVM_sparcv9: - case ZigLLVM_sparcel: - case ZigLLVM_systemz: - case ZigLLVM_tce: - case ZigLLVM_tcele: - case ZigLLVM_x86: - case ZigLLVM_x86_64: - case ZigLLVM_xcore: - case ZigLLVM_nvptx: - case ZigLLVM_nvptx64: - case ZigLLVM_le32: - case ZigLLVM_le64: - case ZigLLVM_amdil: - case ZigLLVM_amdil64: - case ZigLLVM_hsail: - case ZigLLVM_hsail64: - case ZigLLVM_spir: - case ZigLLVM_spir64: - case ZigLLVM_shave: - case ZigLLVM_lanai: - case ZigLLVM_wasm32: - case ZigLLVM_wasm64: - case ZigLLVM_renderscript32: - case ZigLLVM_renderscript64: - return SubArchListNone; - } - zig_unreachable(); -} - -size_t target_subarch_count(SubArchList sub_arch_list) { - switch (sub_arch_list) { - case SubArchListNone: - return 0; - case SubArchListArm32: - return array_length(subarch_list_arm32); - case SubArchListArm64: - return array_length(subarch_list_arm64); - case SubArchListKalimba: - return array_length(subarch_list_kalimba); - case SubArchListMips: - return array_length(subarch_list_mips); - } - zig_unreachable(); -} - -ZigLLVM_SubArchType target_subarch_enum(SubArchList sub_arch_list, size_t i) { - switch (sub_arch_list) { - case SubArchListNone: - zig_unreachable(); - case SubArchListArm32: - assert(i < array_length(subarch_list_arm32)); - return subarch_list_arm32[i]; - case SubArchListArm64: - assert(i < array_length(subarch_list_arm64)); - return subarch_list_arm64[i]; - case SubArchListKalimba: - assert(i < array_length(subarch_list_kalimba)); - return subarch_list_kalimba[i]; - case SubArchListMips: - assert(i < array_length(subarch_list_mips)); - return subarch_list_mips[i]; - } - zig_unreachable(); -} - -const char *target_subarch_name(ZigLLVM_SubArchType subarch) { - switch (subarch) { - case ZigLLVM_NoSubArch: - return ""; - case ZigLLVM_ARMSubArch_v8_5a: - return "v8_5a"; - case ZigLLVM_ARMSubArch_v8_4a: - return "v8_4a"; - case ZigLLVM_ARMSubArch_v8_3a: - return "v8_3a"; - case ZigLLVM_ARMSubArch_v8_2a: - return "v8_2a"; - case ZigLLVM_ARMSubArch_v8_1a: - return "v8_1a"; - case ZigLLVM_ARMSubArch_v8: - return "v8a"; - case ZigLLVM_ARMSubArch_v8r: - return "v8r"; - case ZigLLVM_ARMSubArch_v8m_baseline: - return "v8m_baseline"; - case ZigLLVM_ARMSubArch_v8m_mainline: - return "v8m_mainline"; - case ZigLLVM_ARMSubArch_v8_1m_mainline: - return "v8_1m_mainline"; - case ZigLLVM_ARMSubArch_v7: - return "v7a"; - case ZigLLVM_ARMSubArch_v7em: - return "v7em"; - case ZigLLVM_ARMSubArch_v7m: - return "v7m"; - case ZigLLVM_ARMSubArch_v7s: - return "v7s"; - case ZigLLVM_ARMSubArch_v7k: - return "v7k"; - case ZigLLVM_ARMSubArch_v7ve: - return "v7ve"; - case ZigLLVM_ARMSubArch_v6: - return "v6"; - case ZigLLVM_ARMSubArch_v6m: - return "v6m"; - case ZigLLVM_ARMSubArch_v6k: - return "v6k"; - case ZigLLVM_ARMSubArch_v6t2: - return "v6t2"; - case ZigLLVM_ARMSubArch_v5: - return "v5"; - case ZigLLVM_ARMSubArch_v5te: - return "v5te"; - case ZigLLVM_ARMSubArch_v4t: - return "v4t"; - case ZigLLVM_KalimbaSubArch_v3: - return "v3"; - case ZigLLVM_KalimbaSubArch_v4: - return "v4"; - case ZigLLVM_KalimbaSubArch_v5: - return "v5"; - case ZigLLVM_MipsSubArch_r6: - return "r6"; - } - zig_unreachable(); -} - -size_t target_subarch_list_count(void) { - return array_length(subarch_list_list); -} - -SubArchList target_subarch_list_enum(size_t index) { - assert(index < array_length(subarch_list_list)); - return subarch_list_list[index]; -} - -const char *target_subarch_list_name(SubArchList sub_arch_list) { - switch (sub_arch_list) { - case SubArchListNone: - return "None"; - case SubArchListArm32: - return "Arm32"; - case SubArchListArm64: - return "Arm64"; - case SubArchListKalimba: - return "Kalimba"; - case SubArchListMips: - return "Mips"; - } - zig_unreachable(); -} - Error target_parse_os(Os *out_os, const char *os_ptr, size_t os_len) { for (size_t i = 0; i < array_length(os_list); i += 1) { Os os = os_list[i]; @@ -794,18 +534,16 @@ void init_all_targets(void) { void target_triple_zig(Buf *triple, const ZigTarget *target) { buf_resize(triple, 0); - buf_appendf(triple, "%s%s-%s-%s", + buf_appendf(triple, "%s-%s-%s", target_arch_name(target->arch), - target_subarch_name(target->sub_arch), target_os_name(target->os), target_abi_name(target->abi)); } void target_triple_llvm(Buf *triple, const ZigTarget *target) { buf_resize(triple, 0); - buf_appendf(triple, "%s%s-%s-%s-%s", + buf_appendf(triple, "%s-%s-%s-%s", ZigLLVMGetArchTypeName(target->arch), - ZigLLVMGetSubArchTypeName(target->sub_arch), ZigLLVMGetVendorTypeName(target->vendor), ZigLLVMGetOSTypeName(get_llvm_os_type(target->os)), ZigLLVMGetEnvironmentTypeName(target->abi)); @@ -1182,10 +920,8 @@ bool target_can_exec(const ZigTarget *host_target, const ZigTarget *guest_target return true; } - if (guest_target->os == host_target->os && guest_target->arch == host_target->arch && - guest_target->sub_arch == host_target->sub_arch) - { - // OS, arch, and sub-arch match + if (guest_target->os == host_target->os && guest_target->arch == host_target->arch) { + // OS and arch match return true; } @@ -1607,7 +1343,6 @@ void target_libc_enum(size_t index, ZigTarget *out_target) { out_target->arch = libcs_available[index].arch; out_target->os = libcs_available[index].os; out_target->abi = libcs_available[index].abi; - out_target->sub_arch = ZigLLVM_NoSubArch; out_target->vendor = ZigLLVM_UnknownVendor; out_target->is_native = false; } diff --git a/src/target.hpp b/src/target.hpp index 95acbe259e..9396eb2623 100644 --- a/src/target.hpp +++ b/src/target.hpp @@ -12,15 +12,6 @@ struct Buf; -// Synchronize with target.cpp::subarch_list_list -enum SubArchList { - SubArchListNone, - SubArchListArm32, - SubArchListArm64, - SubArchListKalimba, - SubArchListMips, -}; - enum TargetSubsystem { TargetSubsystemConsole, TargetSubsystemWindows, @@ -51,8 +42,7 @@ enum CIntType { }; Error target_parse_triple(ZigTarget *target, const char *triple, const char *mcpu); -Error target_parse_archsub(ZigLLVM_ArchType *arch, ZigLLVM_SubArchType *sub, - const char *archsub_ptr, size_t archsub_len); +Error target_parse_arch(ZigLLVM_ArchType *arch, const char *arch_ptr, size_t arch_len); Error target_parse_os(Os *os, const char *os_ptr, size_t os_len); Error target_parse_abi(ZigLLVM_EnvironmentType *abi, const char *abi_ptr, size_t abi_len); @@ -63,15 +53,6 @@ size_t target_arch_count(void); ZigLLVM_ArchType target_arch_enum(size_t index); const char *target_arch_name(ZigLLVM_ArchType arch); -SubArchList target_subarch_list(ZigLLVM_ArchType arch); -size_t target_subarch_count(SubArchList sub_arch_list); -ZigLLVM_SubArchType target_subarch_enum(SubArchList subarch_list, size_t index); -const char *target_subarch_name(ZigLLVM_SubArchType subarch); - -size_t target_subarch_list_count(void); -SubArchList target_subarch_list_enum(size_t index); -const char *target_subarch_list_name(SubArchList sub_arch_list); - const char *arch_stack_pointer_register_name(ZigLLVM_ArchType arch); size_t target_vendor_count(void); diff --git a/src/zig_llvm.cpp b/src/zig_llvm.cpp index 64706500d5..aed2944f62 100644 --- a/src/zig_llvm.cpp +++ b/src/zig_llvm.cpp @@ -806,7 +806,7 @@ const char *ZigLLVMGetEnvironmentTypeName(ZigLLVM_EnvironmentType env_type) { return (const char*)Triple::getEnvironmentTypeName((Triple::EnvironmentType)env_type).bytes_begin(); } -void ZigLLVMGetNativeTarget(ZigLLVM_ArchType *arch_type, ZigLLVM_SubArchType *sub_arch_type, +void ZigLLVMGetNativeTarget(ZigLLVM_ArchType *arch_type, ZigLLVM_VendorType *vendor_type, ZigLLVM_OSType *os_type, ZigLLVM_EnvironmentType *environ_type, ZigLLVM_ObjectFormatType *oformat) { @@ -814,7 +814,6 @@ void ZigLLVMGetNativeTarget(ZigLLVM_ArchType *arch_type, ZigLLVM_SubArchType *su Triple triple(Triple::normalize(native_triple)); *arch_type = (ZigLLVM_ArchType)triple.getArch(); - *sub_arch_type = (ZigLLVM_SubArchType)triple.getSubArch(); *vendor_type = (ZigLLVM_VendorType)triple.getVendor(); *os_type = (ZigLLVM_OSType)triple.getOS(); *environ_type = (ZigLLVM_EnvironmentType)triple.getEnvironment(); @@ -823,68 +822,6 @@ void ZigLLVMGetNativeTarget(ZigLLVM_ArchType *arch_type, ZigLLVM_SubArchType *su free(native_triple); } -const char *ZigLLVMGetSubArchTypeName(ZigLLVM_SubArchType sub_arch) { - switch (sub_arch) { - case ZigLLVM_NoSubArch: - return ""; - case ZigLLVM_ARMSubArch_v8_5a: - return "v8.5a"; - case ZigLLVM_ARMSubArch_v8_4a: - return "v8.4a"; - case ZigLLVM_ARMSubArch_v8_3a: - return "v8.3a"; - case ZigLLVM_ARMSubArch_v8_2a: - return "v8.2a"; - case ZigLLVM_ARMSubArch_v8_1a: - return "v8.1a"; - case ZigLLVM_ARMSubArch_v8: - return "v8a"; - case ZigLLVM_ARMSubArch_v8r: - return "v8r"; - case ZigLLVM_ARMSubArch_v8m_baseline: - return "v8m.base"; - case ZigLLVM_ARMSubArch_v8m_mainline: - return "v8m.main"; - case ZigLLVM_ARMSubArch_v8_1m_mainline: - return "v8.1m.main"; - case ZigLLVM_ARMSubArch_v7: - return "v7a"; - case ZigLLVM_ARMSubArch_v7em: - return "v7em"; - case ZigLLVM_ARMSubArch_v7m: - return "v7m"; - case ZigLLVM_ARMSubArch_v7s: - return "v7s"; - case ZigLLVM_ARMSubArch_v7k: - return "v7k"; - case ZigLLVM_ARMSubArch_v7ve: - return "v7ve"; - case ZigLLVM_ARMSubArch_v6: - return "v6"; - case ZigLLVM_ARMSubArch_v6m: - return "v6m"; - case ZigLLVM_ARMSubArch_v6k: - return "v6k"; - case ZigLLVM_ARMSubArch_v6t2: - return "v6t2"; - case ZigLLVM_ARMSubArch_v5: - return "v5"; - case ZigLLVM_ARMSubArch_v5te: - return "v5te"; - case ZigLLVM_ARMSubArch_v4t: - return "v4t"; - case ZigLLVM_KalimbaSubArch_v3: - return "v3"; - case ZigLLVM_KalimbaSubArch_v4: - return "v4"; - case ZigLLVM_KalimbaSubArch_v5: - return "v5"; - case ZigLLVM_MipsSubArch_r6: - return "r6"; - } - abort(); -} - void ZigLLVMAddModuleDebugInfoFlag(LLVMModuleRef module) { unwrap(module)->addModuleFlag(Module::Warning, "Debug Info Version", DEBUG_METADATA_VERSION); unwrap(module)->addModuleFlag(Module::Warning, "Dwarf Version", 4); @@ -1218,35 +1155,6 @@ static_assert((Triple::ArchType)ZigLLVM_renderscript32 == Triple::renderscript32 static_assert((Triple::ArchType)ZigLLVM_renderscript64 == Triple::renderscript64, ""); static_assert((Triple::ArchType)ZigLLVM_LastArchType == Triple::LastArchType, ""); -static_assert((Triple::SubArchType)ZigLLVM_NoSubArch == Triple::NoSubArch, ""); -static_assert((Triple::SubArchType)ZigLLVM_ARMSubArch_v8_4a == Triple::ARMSubArch_v8_4a, ""); -static_assert((Triple::SubArchType)ZigLLVM_ARMSubArch_v8_3a == Triple::ARMSubArch_v8_3a, ""); -static_assert((Triple::SubArchType)ZigLLVM_ARMSubArch_v8_2a == Triple::ARMSubArch_v8_2a, ""); -static_assert((Triple::SubArchType)ZigLLVM_ARMSubArch_v8_1a == Triple::ARMSubArch_v8_1a, ""); -static_assert((Triple::SubArchType)ZigLLVM_ARMSubArch_v8 == Triple::ARMSubArch_v8, ""); -static_assert((Triple::SubArchType)ZigLLVM_ARMSubArch_v8r == Triple::ARMSubArch_v8r, ""); -static_assert((Triple::SubArchType)ZigLLVM_ARMSubArch_v8m_baseline == Triple::ARMSubArch_v8m_baseline, ""); -static_assert((Triple::SubArchType)ZigLLVM_ARMSubArch_v8m_mainline == Triple::ARMSubArch_v8m_mainline, ""); -static_assert((Triple::SubArchType)ZigLLVM_ARMSubArch_v8_1m_mainline == Triple::ARMSubArch_v8_1m_mainline, ""); -static_assert((Triple::SubArchType)ZigLLVM_ARMSubArch_v7 == Triple::ARMSubArch_v7, ""); -static_assert((Triple::SubArchType)ZigLLVM_ARMSubArch_v7em == Triple::ARMSubArch_v7em, ""); -static_assert((Triple::SubArchType)ZigLLVM_ARMSubArch_v7m == Triple::ARMSubArch_v7m, ""); -static_assert((Triple::SubArchType)ZigLLVM_ARMSubArch_v7s == Triple::ARMSubArch_v7s, ""); -static_assert((Triple::SubArchType)ZigLLVM_ARMSubArch_v7k == Triple::ARMSubArch_v7k, ""); -static_assert((Triple::SubArchType)ZigLLVM_ARMSubArch_v7ve == Triple::ARMSubArch_v7ve, ""); -static_assert((Triple::SubArchType)ZigLLVM_ARMSubArch_v6 == Triple::ARMSubArch_v6, ""); -static_assert((Triple::SubArchType)ZigLLVM_ARMSubArch_v6m == Triple::ARMSubArch_v6m, ""); -static_assert((Triple::SubArchType)ZigLLVM_ARMSubArch_v6k == Triple::ARMSubArch_v6k, ""); -static_assert((Triple::SubArchType)ZigLLVM_ARMSubArch_v6t2 == Triple::ARMSubArch_v6t2, ""); -static_assert((Triple::SubArchType)ZigLLVM_ARMSubArch_v5 == Triple::ARMSubArch_v5, ""); -static_assert((Triple::SubArchType)ZigLLVM_ARMSubArch_v5te == Triple::ARMSubArch_v5te, ""); -static_assert((Triple::SubArchType)ZigLLVM_ARMSubArch_v4t == Triple::ARMSubArch_v4t, ""); -static_assert((Triple::SubArchType)ZigLLVM_KalimbaSubArch_v3 == Triple::KalimbaSubArch_v3, ""); -static_assert((Triple::SubArchType)ZigLLVM_KalimbaSubArch_v4 == Triple::KalimbaSubArch_v4, ""); -static_assert((Triple::SubArchType)ZigLLVM_KalimbaSubArch_v5 == Triple::KalimbaSubArch_v5, ""); -static_assert((Triple::SubArchType)ZigLLVM_KalimbaSubArch_v5 == Triple::KalimbaSubArch_v5, ""); -static_assert((Triple::SubArchType)ZigLLVM_MipsSubArch_r6 == Triple::MipsSubArch_r6, ""); - static_assert((Triple::VendorType)ZigLLVM_UnknownVendor == Triple::UnknownVendor, ""); static_assert((Triple::VendorType)ZigLLVM_Apple == Triple::Apple, ""); static_assert((Triple::VendorType)ZigLLVM_PC == Triple::PC, ""); diff --git a/src/zig_llvm.h b/src/zig_llvm.h index 95751cd08a..95f5926ec7 100644 --- a/src/zig_llvm.h +++ b/src/zig_llvm.h @@ -324,41 +324,6 @@ enum ZigLLVM_ArchType { ZigLLVM_LastArchType = ZigLLVM_renderscript64 }; -// synchronize with lists in target.cpp -enum ZigLLVM_SubArchType { - ZigLLVM_NoSubArch, - - ZigLLVM_ARMSubArch_v8_5a, - ZigLLVM_ARMSubArch_v8_4a, - ZigLLVM_ARMSubArch_v8_3a, - ZigLLVM_ARMSubArch_v8_2a, - ZigLLVM_ARMSubArch_v8_1a, - ZigLLVM_ARMSubArch_v8, - ZigLLVM_ARMSubArch_v8r, - ZigLLVM_ARMSubArch_v8m_baseline, - ZigLLVM_ARMSubArch_v8m_mainline, - ZigLLVM_ARMSubArch_v8_1m_mainline, - ZigLLVM_ARMSubArch_v7, - ZigLLVM_ARMSubArch_v7em, - ZigLLVM_ARMSubArch_v7m, - ZigLLVM_ARMSubArch_v7s, - ZigLLVM_ARMSubArch_v7k, - ZigLLVM_ARMSubArch_v7ve, - ZigLLVM_ARMSubArch_v6, - ZigLLVM_ARMSubArch_v6m, - ZigLLVM_ARMSubArch_v6k, - ZigLLVM_ARMSubArch_v6t2, - ZigLLVM_ARMSubArch_v5, - ZigLLVM_ARMSubArch_v5te, - ZigLLVM_ARMSubArch_v4t, - - ZigLLVM_KalimbaSubArch_v3, - ZigLLVM_KalimbaSubArch_v4, - ZigLLVM_KalimbaSubArch_v5, - - ZigLLVM_MipsSubArch_r6, -}; - enum ZigLLVM_VendorType { ZigLLVM_UnknownVendor, @@ -518,7 +483,6 @@ LLVMValueRef ZigLLVMBuildAtomicRMW(LLVMBuilderRef B, enum ZigLLVM_AtomicRMWBinOp #define ZigLLVM_DIFlags_AllCallsDescribed (1U << 29) ZIG_EXTERN_C const char *ZigLLVMGetArchTypeName(enum ZigLLVM_ArchType arch); -ZIG_EXTERN_C const char *ZigLLVMGetSubArchTypeName(enum ZigLLVM_SubArchType sub_arch); ZIG_EXTERN_C const char *ZigLLVMGetVendorTypeName(enum ZigLLVM_VendorType vendor); ZIG_EXTERN_C const char *ZigLLVMGetOSTypeName(enum ZigLLVM_OSType os); ZIG_EXTERN_C const char *ZigLLVMGetEnvironmentTypeName(enum ZigLLVM_EnvironmentType abi); @@ -532,7 +496,7 @@ ZIG_EXTERN_C bool ZigLLVMWriteArchive(const char *archive_name, const char **fil bool ZigLLVMWriteImportLibrary(const char *def_path, const enum ZigLLVM_ArchType arch, const char *output_lib_path, const bool kill_at); -ZIG_EXTERN_C void ZigLLVMGetNativeTarget(enum ZigLLVM_ArchType *arch_type, enum ZigLLVM_SubArchType *sub_arch_type, +ZIG_EXTERN_C void ZigLLVMGetNativeTarget(enum ZigLLVM_ArchType *arch_type, enum ZigLLVM_VendorType *vendor_type, enum ZigLLVM_OSType *os_type, enum ZigLLVM_EnvironmentType *environ_type, enum ZigLLVM_ObjectFormatType *oformat); From 7da7fbb9122e6e2a5f936ce9c1eaf8b5776fa8ac Mon Sep 17 00:00:00 2001 From: Andrew Kelley Date: Fri, 21 Feb 2020 12:29:27 -0500 Subject: [PATCH 17/18] update ARM cpu models to correctly include the sub-arch --- lib/std/target/arm.zig | 108 ++++++++++++++++++++--------------------- 1 file changed, 54 insertions(+), 54 deletions(-) diff --git a/lib/std/target/arm.zig b/lib/std/target/arm.zig index 7195e2803e..50c1bfed15 100644 --- a/lib/std/target/arm.zig +++ b/lib/std/target/arm.zig @@ -1300,49 +1300,49 @@ pub const cpu = struct { .name = "arm1020e", .llvm_name = "arm1020e", .features = featureSet(&[_]Feature{ - .has_v5te, + .v5te, }), }; pub const arm1020t = CpuModel{ .name = "arm1020t", .llvm_name = "arm1020t", .features = featureSet(&[_]Feature{ - .has_v5t, + .v5t, }), }; pub const arm1022e = CpuModel{ .name = "arm1022e", .llvm_name = "arm1022e", .features = featureSet(&[_]Feature{ - .has_v5te, + .v5te, }), }; pub const arm10e = CpuModel{ .name = "arm10e", .llvm_name = "arm10e", .features = featureSet(&[_]Feature{ - .has_v5te, + .v5te, }), }; pub const arm10tdmi = CpuModel{ .name = "arm10tdmi", .llvm_name = "arm10tdmi", .features = featureSet(&[_]Feature{ - .has_v5t, + .v5t, }), }; pub const arm1136j_s = CpuModel{ .name = "arm1136j_s", .llvm_name = "arm1136j-s", .features = featureSet(&[_]Feature{ - .has_v6, + .v6, }), }; pub const arm1136jf_s = CpuModel{ .name = "arm1136jf_s", .llvm_name = "arm1136jf-s", .features = featureSet(&[_]Feature{ - .has_v6, + .v6, .slowfpvmlx, .vfp2, }), @@ -1351,14 +1351,14 @@ pub const cpu = struct { .name = "arm1156t2_s", .llvm_name = "arm1156t2-s", .features = featureSet(&[_]Feature{ - .has_v6t2, + .v6t2, }), }; pub const arm1156t2f_s = CpuModel{ .name = "arm1156t2f_s", .llvm_name = "arm1156t2f-s", .features = featureSet(&[_]Feature{ - .has_v6t2, + .v6t2, .slowfpvmlx, .vfp2, }), @@ -1390,28 +1390,28 @@ pub const cpu = struct { .name = "arm710t", .llvm_name = "arm710t", .features = featureSet(&[_]Feature{ - .has_v4t, + .v4t, }), }; pub const arm720t = CpuModel{ .name = "arm720t", .llvm_name = "arm720t", .features = featureSet(&[_]Feature{ - .has_v4t, + .v4t, }), }; pub const arm7tdmi = CpuModel{ .name = "arm7tdmi", .llvm_name = "arm7tdmi", .features = featureSet(&[_]Feature{ - .has_v4t, + .v4t, }), }; pub const arm7tdmi_s = CpuModel{ .name = "arm7tdmi_s", .llvm_name = "arm7tdmi-s", .features = featureSet(&[_]Feature{ - .has_v4t, + .v4t, }), }; pub const arm8 = CpuModel{ @@ -1432,84 +1432,84 @@ pub const cpu = struct { .name = "arm9", .llvm_name = "arm9", .features = featureSet(&[_]Feature{ - .has_v4t, + .v4t, }), }; pub const arm920 = CpuModel{ .name = "arm920", .llvm_name = "arm920", .features = featureSet(&[_]Feature{ - .has_v4t, + .v4t, }), }; pub const arm920t = CpuModel{ .name = "arm920t", .llvm_name = "arm920t", .features = featureSet(&[_]Feature{ - .has_v4t, + .v4t, }), }; pub const arm922t = CpuModel{ .name = "arm922t", .llvm_name = "arm922t", .features = featureSet(&[_]Feature{ - .has_v4t, + .v4t, }), }; pub const arm926ej_s = CpuModel{ .name = "arm926ej_s", .llvm_name = "arm926ej-s", .features = featureSet(&[_]Feature{ - .has_v5te, + .v5te, }), }; pub const arm940t = CpuModel{ .name = "arm940t", .llvm_name = "arm940t", .features = featureSet(&[_]Feature{ - .has_v4t, + .v4t, }), }; pub const arm946e_s = CpuModel{ .name = "arm946e_s", .llvm_name = "arm946e-s", .features = featureSet(&[_]Feature{ - .has_v5te, + .v5te, }), }; pub const arm966e_s = CpuModel{ .name = "arm966e_s", .llvm_name = "arm966e-s", .features = featureSet(&[_]Feature{ - .has_v5te, + .v5te, }), }; pub const arm968e_s = CpuModel{ .name = "arm968e_s", .llvm_name = "arm968e-s", .features = featureSet(&[_]Feature{ - .has_v5te, + .v5te, }), }; pub const arm9e = CpuModel{ .name = "arm9e", .llvm_name = "arm9e", .features = featureSet(&[_]Feature{ - .has_v5te, + .v5te, }), }; pub const arm9tdmi = CpuModel{ .name = "arm9tdmi", .llvm_name = "arm9tdmi", .features = featureSet(&[_]Feature{ - .has_v4t, + .v4t, }), }; pub const baseline = CpuModel{ .name = "baseline", .llvm_name = "generic", .features = featureSet(&[_]Feature{ - .has_v6m, + .v6m, }), }; pub const cortex_a12 = CpuModel{ @@ -1561,22 +1561,22 @@ pub const cpu = struct { .name = "cortex_a32", .llvm_name = "cortex-a32", .features = featureSet(&[_]Feature{ - .has_v8, .crc, .crypto, .hwdiv, .hwdiv_arm, + .v8a, }), }; pub const cortex_a35 = CpuModel{ .name = "cortex_a35", .llvm_name = "cortex-a35", .features = featureSet(&[_]Feature{ - .has_v8, .crc, .crypto, .hwdiv, .hwdiv_arm, + .v8a, }), }; pub const cortex_a5 = CpuModel{ @@ -1597,7 +1597,7 @@ pub const cpu = struct { .name = "cortex_a53", .llvm_name = "cortex-a53", .features = featureSet(&[_]Feature{ - .has_v8, + .v8a, .crc, .crypto, .fpao, @@ -1609,7 +1609,7 @@ pub const cpu = struct { .name = "cortex_a55", .llvm_name = "cortex-a55", .features = featureSet(&[_]Feature{ - .has_v8_2a, + .v8_2a, .dotprod, .hwdiv, .hwdiv_arm, @@ -1619,7 +1619,7 @@ pub const cpu = struct { .name = "cortex_a57", .llvm_name = "cortex-a57", .features = featureSet(&[_]Feature{ - .has_v8, + .v8a, .avoid_partial_cpsr, .cheap_predicable_cpsr, .crc, @@ -1649,7 +1649,7 @@ pub const cpu = struct { .name = "cortex_a72", .llvm_name = "cortex-a72", .features = featureSet(&[_]Feature{ - .has_v8, + .v8a, .crc, .crypto, .hwdiv, @@ -1660,7 +1660,7 @@ pub const cpu = struct { .name = "cortex_a73", .llvm_name = "cortex-a73", .features = featureSet(&[_]Feature{ - .has_v8, + .v8a, .crc, .crypto, .hwdiv, @@ -1671,7 +1671,7 @@ pub const cpu = struct { .name = "cortex_a75", .llvm_name = "cortex-a75", .features = featureSet(&[_]Feature{ - .has_v8_2a, + .v8_2a, .dotprod, .hwdiv, .hwdiv_arm, @@ -1682,7 +1682,7 @@ pub const cpu = struct { .llvm_name = "cortex-a76", .features = featureSet(&[_]Feature{ .a76, - .has_v8_2a, + .v8_2a, .crc, .crypto, .dotprod, @@ -1696,7 +1696,7 @@ pub const cpu = struct { .llvm_name = "cortex-a76ae", .features = featureSet(&[_]Feature{ .a76, - .has_v8_2a, + .v8_2a, .crc, .crypto, .dotprod, @@ -1742,28 +1742,28 @@ pub const cpu = struct { .name = "cortex_m0", .llvm_name = "cortex-m0", .features = featureSet(&[_]Feature{ - .has_v6m, + .v6m, }), }; pub const cortex_m0plus = CpuModel{ .name = "cortex_m0plus", .llvm_name = "cortex-m0plus", .features = featureSet(&[_]Feature{ - .has_v6m, + .v6m, }), }; pub const cortex_m1 = CpuModel{ .name = "cortex_m1", .llvm_name = "cortex-m1", .features = featureSet(&[_]Feature{ - .has_v6m, + .v6m, }), }; pub const cortex_m23 = CpuModel{ .name = "cortex_m23", .llvm_name = "cortex-m23", .features = featureSet(&[_]Feature{ - .has_v8m, + .v8m, .no_movt, }), }; @@ -1783,7 +1783,7 @@ pub const cpu = struct { .name = "cortex_m33", .llvm_name = "cortex-m33", .features = featureSet(&[_]Feature{ - .has_v8m_main, + .v8m_main, .dsp, .fp_armv8d16sp, .loop_align, @@ -1797,7 +1797,7 @@ pub const cpu = struct { .name = "cortex_m35p", .llvm_name = "cortex-m35p", .features = featureSet(&[_]Feature{ - .has_v8m_main, + .v8m_main, .dsp, .fp_armv8d16sp, .loop_align, @@ -1908,7 +1908,7 @@ pub const cpu = struct { .name = "cyclone", .llvm_name = "cyclone", .features = featureSet(&[_]Feature{ - .has_v8, + .v8a, .avoid_movs_shop, .avoid_partial_cpsr, .crypto, @@ -1929,14 +1929,14 @@ pub const cpu = struct { .name = "ep9312", .llvm_name = "ep9312", .features = featureSet(&[_]Feature{ - .has_v4t, + .v4t, }), }; pub const exynos_m1 = CpuModel{ .name = "exynos_m1", .llvm_name = "exynos-m1", .features = featureSet(&[_]Feature{ - .has_v8, + .v8a, .exynos, }), }; @@ -1944,7 +1944,7 @@ pub const cpu = struct { .name = "exynos_m2", .llvm_name = "exynos-m2", .features = featureSet(&[_]Feature{ - .has_v8, + .v8a, .exynos, }), }; @@ -1952,7 +1952,7 @@ pub const cpu = struct { .name = "exynos_m3", .llvm_name = "exynos-m3", .features = featureSet(&[_]Feature{ - .has_v8, + .v8_2a, .exynos, }), }; @@ -1960,7 +1960,7 @@ pub const cpu = struct { .name = "exynos_m4", .llvm_name = "exynos-m4", .features = featureSet(&[_]Feature{ - .has_v8_2a, + .v8_2a, .dotprod, .exynos, .fullfp16, @@ -1973,7 +1973,7 @@ pub const cpu = struct { .dotprod, .exynos, .fullfp16, - .has_v8_2a, + .v8_2a, }), }; pub const generic = CpuModel{ @@ -1985,7 +1985,7 @@ pub const cpu = struct { .name = "iwmmxt", .llvm_name = "iwmmxt", .features = featureSet(&[_]Feature{ - .has_v5te, + .v5te, }), }; pub const krait = CpuModel{ @@ -2012,14 +2012,14 @@ pub const cpu = struct { .crypto, .hwdiv, .hwdiv_arm, - .has_v8, + .v8a, }), }; pub const mpcore = CpuModel{ .name = "mpcore", .llvm_name = "mpcore", .features = featureSet(&[_]Feature{ - .has_v6k, + .v6k, .slowfpvmlx, .vfp2, }), @@ -2028,14 +2028,14 @@ pub const cpu = struct { .name = "mpcorenovfp", .llvm_name = "mpcorenovfp", .features = featureSet(&[_]Feature{ - .has_v6k, + .v6k, }), }; pub const sc000 = CpuModel{ .name = "sc000", .llvm_name = "sc000", .features = featureSet(&[_]Feature{ - .has_v6m, + .v6m, }), }; pub const sc300 = CpuModel{ @@ -2108,7 +2108,7 @@ pub const cpu = struct { .name = "xscale", .llvm_name = "xscale", .features = featureSet(&[_]Feature{ - .has_v5te, + .v5te, }), }; }; From 71573584cdfb1ddb176681fcb7d1544cac7a72ca Mon Sep 17 00:00:00 2001 From: Andrew Kelley Date: Fri, 21 Feb 2020 13:34:55 -0500 Subject: [PATCH 18/18] std.Target.parse gives parsing diagnostics --- lib/std/target.zig | 40 ++++++++++++++++++++++++++++++++++---- src-self-hosted/stage2.zig | 35 ++++++++++++++++++++++++++++++--- 2 files changed, 68 insertions(+), 7 deletions(-) diff --git a/lib/std/target.zig b/lib/std/target.zig index a341fb3977..83d3dafbc2 100644 --- a/lib/std/target.zig +++ b/lib/std/target.zig @@ -727,18 +727,47 @@ pub const Target = union(enum) { /// are examples of CPU features to add to the set, and "c" and "d" are examples of CPU features /// to remove from the set. cpu_features: []const u8 = "baseline", + + /// If this is provided, the function will populate some information about parsing failures, + /// so that user-friendly error messages can be delivered. + diagnostics: ?*Diagnostics = null, + + pub const Diagnostics = struct { + /// If the architecture was determined, this will be populated. + arch: ?Cpu.Arch = null, + + /// If the OS was determined, this will be populated. + os: ?Os = null, + + /// If the ABI was determined, this will be populated. + abi: ?Abi = null, + + /// If the CPU name was determined, this will be populated. + cpu_name: ?[]const u8 = null, + + /// If error.UnknownCpuFeature is returned, this will be populated. + unknown_feature_name: ?[]const u8 = null, + }; }; pub fn parse(args: ParseOptions) !Target { + var dummy_diags: ParseOptions.Diagnostics = undefined; + var diags = args.diagnostics orelse &dummy_diags; + var it = mem.separate(args.arch_os_abi, "-"); const arch_name = it.next() orelse return error.MissingArchitecture; - const os_name = it.next() orelse return error.MissingOperatingSystem; - const abi_name = it.next(); - if (it.next() != null) return error.UnexpectedExtraField; - const arch = try Cpu.Arch.parse(arch_name); + diags.arch = arch; + + const os_name = it.next() orelse return error.MissingOperatingSystem; const os = try Os.parse(os_name); + diags.os = os; + + const abi_name = it.next(); const abi = if (abi_name) |n| try Abi.parse(n) else Abi.default(arch, os); + diags.abi = abi; + + if (it.next() != null) return error.UnexpectedExtraField; const all_features = arch.allFeaturesList(); var index: usize = 0; @@ -749,6 +778,8 @@ pub const Target = union(enum) { index += 1; } const cpu_name = args.cpu_features[0..index]; + diags.cpu_name = cpu_name; + const cpu: Cpu = if (mem.eql(u8, cpu_name, "baseline")) Cpu.baseline(arch) else blk: { const cpu_model = try arch.parseCpuModel(cpu_name); @@ -775,6 +806,7 @@ pub const Target = union(enum) { break; } } else { + diags.unknown_feature_name = feature_name; return error.UnknownCpuFeature; } } diff --git a/src-self-hosted/stage2.zig b/src-self-hosted/stage2.zig index d99f436a75..3aea04b919 100644 --- a/src-self-hosted/stage2.zig +++ b/src-self-hosted/stage2.zig @@ -661,9 +661,7 @@ export fn stage2_target_parse( error.MissingOperatingSystem => return .MissingOperatingSystem, error.MissingArchitecture => return .MissingArchitecture, error.InvalidLlvmCpuFeaturesFormat => return .InvalidLlvmCpuFeaturesFormat, - error.UnknownCpu => return .UnknownCpu, error.UnexpectedExtraField => return .SemanticAnalyzeFail, - error.UnknownCpuFeature => return .UnknownCpuFeature, }; return .None; } @@ -676,7 +674,38 @@ fn stage2TargetParse( const target: Target = if (zig_triple_oz) |zig_triple_z| blk: { const zig_triple = mem.toSliceConst(u8, zig_triple_z); const mcpu = if (mcpu_oz) |mcpu_z| mem.toSliceConst(u8, mcpu_z) else "baseline"; - break :blk try Target.parse(.{ .arch_os_abi = zig_triple, .cpu_features = mcpu }); + var diags: std.Target.ParseOptions.Diagnostics = .{}; + break :blk Target.parse(.{ + .arch_os_abi = zig_triple, + .cpu_features = mcpu, + .diagnostics = &diags, + }) catch |err| switch (err) { + error.UnknownCpu => { + std.debug.warn("Unknown CPU: '{}'\nAvailable CPUs for architecture '{}':\n", .{ + diags.cpu_name.?, + @tagName(diags.arch.?), + }); + for (diags.arch.?.allCpuModels()) |cpu| { + std.debug.warn(" {}\n", .{cpu.name}); + } + process.exit(1); + }, + error.UnknownCpuFeature => { + std.debug.warn( + \\Unknown CPU feature: '{}' + \\Available CPU features for architecture '{}': + \\ + , .{ + diags.unknown_feature_name, + @tagName(diags.arch.?), + }); + for (diags.arch.?.allFeaturesList()) |feature| { + std.debug.warn(" {}: {}\n", .{ feature.name, feature.description }); + } + process.exit(1); + }, + else => |e| return e, + }; } else Target.Native; try stage1_target.fromTarget(target);