Andrew Kelley 0bebb688fb stage2: change max int align from 8 to 16 for more ISAs ...

These targets now have a similar disagreement with LLVM about the
alignment of 128-bit integers as x86_64:
 * riscv64
 * powerpc64
 * powerpc64le
 * mips64
 * mips64el
 * sparcv9

See #2987

2022-05-04 19:11:02 -07:00

..

include

update libcxx, libcxxabi, and C headers to release/13.x branch

2021-08-28 13:11:47 -07:00

libc

tools/gen_stubs: sort output by section/symbol name

2022-05-04 18:38:45 +02:00

libcxx

update libcxx, libcxxabi, and C headers to release/13.x branch

2021-08-28 13:11:47 -07:00

libcxxabi

update libcxx, libcxxabi, and C headers to release/13.x branch

2021-08-28 13:11:47 -07:00

libunwind

Import SPARCv9 libunwind

2022-02-13 17:16:22 +02:00

std

stage2: change max int align from 8 to 16 for more ISAs

2022-05-04 19:11:02 -07:00

tsan

update libcxx, libcxxabi, libunwind, and tsan to llvm 13 rc1

2021-08-16 23:32:13 -07:00