Andrew Kelley c3d10dbda1 stage2 llvm backend: implement llvmType for error union and slices

2021-07-25 19:06:48 -07:00

..

llvm

stage2 llvm backend: implement llvmType for error union and slices

2021-07-25 19:06:48 -07:00

spirv

add ast-check flag to zig fmt, fix found bugs

2021-06-14 00:16:40 +03:00

aarch64.zig

update usage of std.testing in stage2

2021-05-08 15:15:30 +03:00

arm.zig

fix code broken from previous commit

2021-06-21 17:03:03 -07:00

c.zig

stage2: improvements towards zig test

2021-07-23 22:42:31 -07:00

llvm.zig

stage2 llvm backend: implement llvmType for error union and slices

2021-07-25 19:06:48 -07:00

riscv64.zig

update usage of std.testing in stage2

2021-05-08 15:15:30 +03:00

spirv.zig

stage2: update LLVM backend to new AIR memory layout

2021-07-20 12:19:16 -07:00

wasm.zig

Re-enable switch test cases and fix regressions

2021-07-24 20:05:41 +02:00

x86_64.zig

stage2: slightly improve error reporting for missing imports

2021-06-23 10:44:46 -07:00

x86.zig

rename src-self-hosted/ to src/

2020-09-21 18:38:55 -07:00