mirror of
https://github.com/ziglang/zig.git
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1012 lines
32 KiB
C
Vendored
1012 lines
32 KiB
C
Vendored
/**
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* This file is part of the mingw-w64 runtime package.
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* No warranty is given; refer to the file DISCLAIMER within this package.
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*/
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#ifndef _WINHVAPIDEFS_H_
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#define _WINHVAPIDEFS_H_
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typedef enum WHV_CAPABILITY_CODE {
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WHvCapabilityCodeHypervisorPresent = 0x00000000,
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WHvCapabilityCodeFeatures = 0x00000001,
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WHvCapabilityCodeExtendedVmExits = 0x00000002,
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WHvCapabilityCodeExceptionExitBitmap = 0x00000003,
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WHvCapabilityCodeX64MsrExitBitmap = 0x00000004,
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WHvCapabilityCodeProcessorVendor = 0x00001000,
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WHvCapabilityCodeProcessorFeatures = 0x00001001,
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WHvCapabilityCodeProcessorClFlushSize = 0x00001002,
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WHvCapabilityCodeProcessorXsaveFeatures = 0x00001003,
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WHvCapabilityCodeProcessorClockFrequency = 0x00001004,
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WHvCapabilityCodeInterruptClockFrequency = 0x00001005,
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WHvCapabilityCodeProcessorFeaturesBanks = 0x00001006
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} WHV_CAPABILITY_CODE;
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typedef union WHV_CAPABILITY_FEATURES {
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__C89_NAMELESS struct {
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UINT64 PartialUnmap : 1;
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UINT64 LocalApicEmulation : 1;
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UINT64 Xsave : 1;
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UINT64 DirtyPageTracking : 1;
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UINT64 SpeculationControl : 1;
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UINT64 ApicRemoteRead : 1;
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UINT64 IdleSuspend : 1;
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UINT64 Reserved : 57;
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};
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UINT64 AsUINT64;
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} WHV_CAPABILITY_FEATURES;
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C_ASSERT(sizeof(WHV_CAPABILITY_FEATURES) == sizeof(UINT64));
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typedef union WHV_EXTENDED_VM_EXITS {
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__C89_NAMELESS struct {
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UINT64 X64CpuidExit : 1;
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UINT64 X64MsrExit : 1;
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UINT64 ExceptionExit : 1;
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UINT64 X64RdtscExit : 1;
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UINT64 X64ApicSmiExitTrap : 1;
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UINT64 HypercallExit : 1;
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UINT64 X64ApicInitSipiExitTrap : 1;
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UINT64 Reserved : 57;
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};
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UINT64 AsUINT64;
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} WHV_EXTENDED_VM_EXITS;
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C_ASSERT(sizeof(WHV_EXTENDED_VM_EXITS) == sizeof(UINT64));
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typedef enum WHV_PROCESSOR_VENDOR {
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WHvProcessorVendorAmd = 0x0000,
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WHvProcessorVendorIntel = 0x0001,
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WHvProcessorVendorHygon = 0x0002
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} WHV_PROCESSOR_VENDOR;
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typedef union WHV_PROCESSOR_FEATURES {
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__C89_NAMELESS struct {
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UINT64 Sse3Support : 1;
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UINT64 LahfSahfSupport : 1;
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UINT64 Ssse3Support : 1;
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UINT64 Sse4_1Support : 1;
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UINT64 Sse4_2Support : 1;
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UINT64 Sse4aSupport : 1;
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UINT64 XopSupport : 1;
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UINT64 PopCntSupport : 1;
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UINT64 Cmpxchg16bSupport : 1;
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UINT64 Altmovcr8Support : 1;
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UINT64 LzcntSupport : 1;
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UINT64 MisAlignSseSupport : 1;
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UINT64 MmxExtSupport : 1;
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UINT64 Amd3DNowSupport : 1;
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UINT64 ExtendedAmd3DNowSupport : 1;
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UINT64 Page1GbSupport : 1;
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UINT64 AesSupport : 1;
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UINT64 PclmulqdqSupport : 1;
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UINT64 PcidSupport : 1;
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UINT64 Fma4Support : 1;
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UINT64 F16CSupport : 1;
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UINT64 RdRandSupport : 1;
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UINT64 RdWrFsGsSupport : 1;
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UINT64 SmepSupport : 1;
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UINT64 EnhancedFastStringSupport : 1;
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UINT64 Bmi1Support : 1;
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UINT64 Bmi2Support : 1;
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UINT64 Reserved1 : 2;
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UINT64 MovbeSupport : 1;
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UINT64 Npiep1Support : 1;
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UINT64 DepX87FPUSaveSupport : 1;
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UINT64 RdSeedSupport : 1;
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UINT64 AdxSupport : 1;
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UINT64 IntelPrefetchSupport : 1;
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UINT64 SmapSupport : 1;
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UINT64 HleSupport : 1;
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UINT64 RtmSupport : 1;
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UINT64 RdtscpSupport : 1;
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UINT64 ClflushoptSupport : 1;
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UINT64 ClwbSupport : 1;
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UINT64 ShaSupport : 1;
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UINT64 X87PointersSavedSupport : 1;
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UINT64 InvpcidSupport : 1;
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UINT64 IbrsSupport : 1;
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UINT64 StibpSupport : 1;
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UINT64 IbpbSupport : 1;
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UINT64 Reserved2 : 1;
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UINT64 SsbdSupport : 1;
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UINT64 FastShortRepMovSupport : 1;
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UINT64 Reserved3 : 1;
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UINT64 RdclNo : 1;
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UINT64 IbrsAllSupport : 1;
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UINT64 Reserved4 : 1;
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UINT64 SsbNo : 1;
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UINT64 RsbANo : 1;
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UINT64 Reserved5 : 1;
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UINT64 RdPidSupport : 1;
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UINT64 UmipSupport : 1;
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UINT64 MdsNoSupport : 1;
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UINT64 MdClearSupport : 1;
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UINT64 Reserved6 : 3;
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};
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UINT64 AsUINT64;
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} WHV_PROCESSOR_FEATURES;
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C_ASSERT(sizeof(WHV_PROCESSOR_FEATURES) == sizeof(UINT64));
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typedef union WHV_PROCESSOR_FEATURES1 {
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__C89_NAMELESS struct {
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UINT64 Reserved1 : 2;
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UINT64 ClZeroSupport : 1;
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UINT64 Reserved2 : 61;
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};
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UINT64 AsUINT64;
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} WHV_PROCESSOR_FEATURES1;
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C_ASSERT(sizeof(WHV_PROCESSOR_FEATURES1) == sizeof(UINT64));
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#define WHV_PROCESSOR_FEATURES_BANKS_COUNT 2
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typedef struct WHV_PROCESSOR_FEATURES_BANKS {
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UINT32 BanksCount;
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UINT32 Reserved0;
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__C89_NAMELESS union {
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__C89_NAMELESS struct {
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WHV_PROCESSOR_FEATURES Bank0;
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WHV_PROCESSOR_FEATURES1 Bank1;
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};
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UINT64 AsUINT64[WHV_PROCESSOR_FEATURES_BANKS_COUNT];
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};
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} WHV_PROCESSOR_FEATURES_BANKS;
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C_ASSERT(sizeof(WHV_PROCESSOR_FEATURES_BANKS) == sizeof(UINT64) * (WHV_PROCESSOR_FEATURES_BANKS_COUNT + 1));
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typedef union _WHV_PROCESSOR_XSAVE_FEATURES {
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__C89_NAMELESS struct {
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UINT64 XsaveSupport : 1;
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UINT64 XsaveoptSupport : 1;
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UINT64 AvxSupport : 1;
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UINT64 Avx2Support : 1;
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UINT64 FmaSupport : 1;
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UINT64 MpxSupport : 1;
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UINT64 Avx512Support : 1;
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UINT64 Avx512DQSupport : 1;
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UINT64 Avx512CDSupport : 1;
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UINT64 Avx512BWSupport : 1;
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UINT64 Avx512VLSupport : 1;
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UINT64 XsaveCompSupport : 1;
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UINT64 XsaveSupervisorSupport : 1;
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UINT64 Xcr1Support : 1;
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UINT64 Avx512BitalgSupport : 1;
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UINT64 Avx512IfmaSupport : 1;
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UINT64 Avx512VBmiSupport : 1;
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UINT64 Avx512VBmi2Support : 1;
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UINT64 Avx512VnniSupport : 1;
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UINT64 GfniSupport : 1;
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UINT64 VaesSupport : 1;
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UINT64 Avx512VPopcntdqSupport : 1;
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UINT64 VpclmulqdqSupport : 1;
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UINT64 Avx512Bf16Support : 1;
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UINT64 Avx512Vp2IntersectSupport : 1;
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UINT64 Reserved : 39;
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};
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UINT64 AsUINT64;
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} WHV_PROCESSOR_XSAVE_FEATURES, *PWHV_PROCESSOR_XSAVE_FEATURES;
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C_ASSERT(sizeof(WHV_PROCESSOR_XSAVE_FEATURES) == sizeof(UINT64));
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typedef union WHV_X64_MSR_EXIT_BITMAP {
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UINT64 AsUINT64;
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__C89_NAMELESS struct {
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UINT64 UnhandledMsrs : 1;
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UINT64 TscMsrWrite : 1;
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UINT64 TscMsrRead : 1;
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UINT64 ApicBaseMsrWrite : 1;
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UINT64 Reserved : 60;
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};
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} WHV_X64_MSR_EXIT_BITMAP;
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C_ASSERT(sizeof(WHV_X64_MSR_EXIT_BITMAP) == sizeof(UINT64));
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typedef union WHV_CAPABILITY {
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WINBOOL HypervisorPresent;
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WHV_CAPABILITY_FEATURES Features;
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WHV_EXTENDED_VM_EXITS ExtendedVmExits;
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WHV_PROCESSOR_VENDOR ProcessorVendor;
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WHV_PROCESSOR_FEATURES ProcessorFeatures;
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WHV_PROCESSOR_XSAVE_FEATURES ProcessorXsaveFeatures;
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UINT8 ProcessorClFlushSize;
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UINT64 ExceptionExitBitmap;
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WHV_X64_MSR_EXIT_BITMAP X64MsrExitBitmap;
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UINT64 ProcessorClockFrequency;
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UINT64 InterruptClockFrequency;
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WHV_PROCESSOR_FEATURES_BANKS ProcessorFeaturesBanks;
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} WHV_CAPABILITY;
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typedef VOID* WHV_PARTITION_HANDLE;
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typedef enum WHV_PARTITION_PROPERTY_CODE {
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WHvPartitionPropertyCodeExtendedVmExits = 0x00000001,
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WHvPartitionPropertyCodeExceptionExitBitmap = 0x00000002,
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WHvPartitionPropertyCodeSeparateSecurityDomain = 0x00000003,
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WHvPartitionPropertyCodeNestedVirtualization = 0x00000004,
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WHvPartitionPropertyCodeX64MsrExitBitmap = 0x00000005,
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WHvPartitionPropertyCodeProcessorFeatures = 0x00001001,
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WHvPartitionPropertyCodeProcessorClFlushSize = 0x00001002,
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WHvPartitionPropertyCodeCpuidExitList = 0x00001003,
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WHvPartitionPropertyCodeCpuidResultList = 0x00001004,
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WHvPartitionPropertyCodeLocalApicEmulationMode = 0x00001005,
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WHvPartitionPropertyCodeProcessorXsaveFeatures = 0x00001006,
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WHvPartitionPropertyCodeProcessorClockFrequency = 0x00001007,
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WHvPartitionPropertyCodeInterruptClockFrequency = 0x00001008,
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WHvPartitionPropertyCodeApicRemoteReadSupport = 0x00001009,
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WHvPartitionPropertyCodeProcessorFeaturesBanks = 0x0000100A,
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WHvPartitionPropertyCodeReferenceTime = 0x0000100B,
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WHvPartitionPropertyCodeProcessorCount = 0x00001fff
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} WHV_PARTITION_PROPERTY_CODE;
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typedef struct WHV_X64_CPUID_RESULT {
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UINT32 Function;
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UINT32 Reserved[3];
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UINT32 Eax;
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UINT32 Ebx;
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UINT32 Ecx;
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UINT32 Edx;
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} WHV_X64_CPUID_RESULT;
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typedef enum WHV_EXCEPTION_TYPE {
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WHvX64ExceptionTypeDivideErrorFault = 0x0,
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WHvX64ExceptionTypeDebugTrapOrFault = 0x1,
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WHvX64ExceptionTypeBreakpointTrap = 0x3,
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WHvX64ExceptionTypeOverflowTrap = 0x4,
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WHvX64ExceptionTypeBoundRangeFault = 0x5,
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WHvX64ExceptionTypeInvalidOpcodeFault = 0x6,
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WHvX64ExceptionTypeDeviceNotAvailableFault = 0x7,
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WHvX64ExceptionTypeDoubleFaultAbort = 0x8,
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WHvX64ExceptionTypeInvalidTaskStateSegmentFault = 0x0A,
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WHvX64ExceptionTypeSegmentNotPresentFault = 0x0B,
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WHvX64ExceptionTypeStackFault = 0x0C,
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WHvX64ExceptionTypeGeneralProtectionFault = 0x0D,
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WHvX64ExceptionTypePageFault = 0x0E,
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WHvX64ExceptionTypeFloatingPointErrorFault = 0x10,
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WHvX64ExceptionTypeAlignmentCheckFault = 0x11,
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WHvX64ExceptionTypeMachineCheckAbort = 0x12,
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WHvX64ExceptionTypeSimdFloatingPointFault = 0x13
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} WHV_EXCEPTION_TYPE;
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typedef enum WHV_X64_LOCAL_APIC_EMULATION_MODE {
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WHvX64LocalApicEmulationModeNone,
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WHvX64LocalApicEmulationModeXApic,
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WHvX64LocalApicEmulationModeX2Apic
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} WHV_X64_LOCAL_APIC_EMULATION_MODE;
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typedef union WHV_PARTITION_PROPERTY {
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WHV_EXTENDED_VM_EXITS ExtendedVmExits;
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WHV_PROCESSOR_FEATURES ProcessorFeatures;
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WHV_PROCESSOR_XSAVE_FEATURES ProcessorXsaveFeatures;
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UINT8 ProcessorClFlushSize;
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UINT32 ProcessorCount;
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UINT32 CpuidExitList[1];
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WHV_X64_CPUID_RESULT CpuidResultList[1];
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UINT64 ExceptionExitBitmap;
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WHV_X64_LOCAL_APIC_EMULATION_MODE LocalApicEmulationMode;
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WINBOOL SeparateSecurityDomain;
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WINBOOL NestedVirtualization;
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WHV_X64_MSR_EXIT_BITMAP X64MsrExitBitmap;
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UINT64 ProcessorClockFrequency;
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UINT64 InterruptClockFrequency;
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WINBOOL ApicRemoteRead;
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WHV_PROCESSOR_FEATURES_BANKS ProcessorFeaturesBanks;
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UINT64 ReferenceTime;
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} WHV_PARTITION_PROPERTY;
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typedef UINT64 WHV_GUEST_PHYSICAL_ADDRESS;
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typedef UINT64 WHV_GUEST_VIRTUAL_ADDRESS;
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typedef enum WHV_MAP_GPA_RANGE_FLAGS {
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WHvMapGpaRangeFlagNone = 0x00000000,
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WHvMapGpaRangeFlagRead = 0x00000001,
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WHvMapGpaRangeFlagWrite = 0x00000002,
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WHvMapGpaRangeFlagExecute = 0x00000004,
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WHvMapGpaRangeFlagTrackDirtyPages = 0x00000008
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} WHV_MAP_GPA_RANGE_FLAGS;
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DEFINE_ENUM_FLAG_OPERATORS(WHV_MAP_GPA_RANGE_FLAGS);
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typedef enum WHV_TRANSLATE_GVA_FLAGS {
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WHvTranslateGvaFlagNone = 0x00000000,
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WHvTranslateGvaFlagValidateRead = 0x00000001,
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WHvTranslateGvaFlagValidateWrite = 0x00000002,
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WHvTranslateGvaFlagValidateExecute = 0x00000004,
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WHvTranslateGvaFlagPrivilegeExempt = 0x00000008,
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WHvTranslateGvaFlagSetPageTableBits = 0x00000010
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} WHV_TRANSLATE_GVA_FLAGS;
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DEFINE_ENUM_FLAG_OPERATORS(WHV_TRANSLATE_GVA_FLAGS);
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typedef enum WHV_TRANSLATE_GVA_RESULT_CODE {
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WHvTranslateGvaResultSuccess = 0,
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WHvTranslateGvaResultPageNotPresent = 1,
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WHvTranslateGvaResultPrivilegeViolation = 2,
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WHvTranslateGvaResultInvalidPageTableFlags = 3,
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WHvTranslateGvaResultGpaUnmapped = 4,
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WHvTranslateGvaResultGpaNoReadAccess = 5,
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WHvTranslateGvaResultGpaNoWriteAccess = 6,
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WHvTranslateGvaResultGpaIllegalOverlayAccess = 7,
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WHvTranslateGvaResultIntercept = 8
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} WHV_TRANSLATE_GVA_RESULT_CODE;
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typedef struct WHV_TRANSLATE_GVA_RESULT {
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WHV_TRANSLATE_GVA_RESULT_CODE ResultCode;
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UINT32 Reserved;
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} WHV_TRANSLATE_GVA_RESULT;
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typedef enum WHV_REGISTER_NAME {
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WHvX64RegisterRax = 0x00000000,
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WHvX64RegisterRcx = 0x00000001,
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WHvX64RegisterRdx = 0x00000002,
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WHvX64RegisterRbx = 0x00000003,
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WHvX64RegisterRsp = 0x00000004,
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WHvX64RegisterRbp = 0x00000005,
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WHvX64RegisterRsi = 0x00000006,
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WHvX64RegisterRdi = 0x00000007,
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WHvX64RegisterR8 = 0x00000008,
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WHvX64RegisterR9 = 0x00000009,
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WHvX64RegisterR10 = 0x0000000A,
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WHvX64RegisterR11 = 0x0000000B,
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WHvX64RegisterR12 = 0x0000000C,
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WHvX64RegisterR13 = 0x0000000D,
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WHvX64RegisterR14 = 0x0000000E,
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WHvX64RegisterR15 = 0x0000000F,
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WHvX64RegisterRip = 0x00000010,
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WHvX64RegisterRflags = 0x00000011,
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WHvX64RegisterEs = 0x00000012,
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WHvX64RegisterCs = 0x00000013,
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WHvX64RegisterSs = 0x00000014,
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WHvX64RegisterDs = 0x00000015,
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WHvX64RegisterFs = 0x00000016,
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WHvX64RegisterGs = 0x00000017,
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WHvX64RegisterLdtr = 0x00000018,
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WHvX64RegisterTr = 0x00000019,
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WHvX64RegisterIdtr = 0x0000001A,
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WHvX64RegisterGdtr = 0x0000001B,
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WHvX64RegisterCr0 = 0x0000001C,
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WHvX64RegisterCr2 = 0x0000001D,
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WHvX64RegisterCr3 = 0x0000001E,
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WHvX64RegisterCr4 = 0x0000001F,
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WHvX64RegisterCr8 = 0x00000020,
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WHvX64RegisterDr0 = 0x00000021,
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WHvX64RegisterDr1 = 0x00000022,
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WHvX64RegisterDr2 = 0x00000023,
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WHvX64RegisterDr3 = 0x00000024,
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WHvX64RegisterDr6 = 0x00000025,
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WHvX64RegisterDr7 = 0x00000026,
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WHvX64RegisterXCr0 = 0x00000027,
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WHvX64RegisterXmm0 = 0x00001000,
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WHvX64RegisterXmm1 = 0x00001001,
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WHvX64RegisterXmm2 = 0x00001002,
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WHvX64RegisterXmm3 = 0x00001003,
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WHvX64RegisterXmm4 = 0x00001004,
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WHvX64RegisterXmm5 = 0x00001005,
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WHvX64RegisterXmm6 = 0x00001006,
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WHvX64RegisterXmm7 = 0x00001007,
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WHvX64RegisterXmm8 = 0x00001008,
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WHvX64RegisterXmm9 = 0x00001009,
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WHvX64RegisterXmm10 = 0x0000100A,
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WHvX64RegisterXmm11 = 0x0000100B,
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WHvX64RegisterXmm12 = 0x0000100C,
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WHvX64RegisterXmm13 = 0x0000100D,
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WHvX64RegisterXmm14 = 0x0000100E,
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WHvX64RegisterXmm15 = 0x0000100F,
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WHvX64RegisterFpMmx0 = 0x00001010,
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WHvX64RegisterFpMmx1 = 0x00001011,
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WHvX64RegisterFpMmx2 = 0x00001012,
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WHvX64RegisterFpMmx3 = 0x00001013,
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WHvX64RegisterFpMmx4 = 0x00001014,
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WHvX64RegisterFpMmx5 = 0x00001015,
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WHvX64RegisterFpMmx6 = 0x00001016,
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WHvX64RegisterFpMmx7 = 0x00001017,
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WHvX64RegisterFpControlStatus = 0x00001018,
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WHvX64RegisterXmmControlStatus = 0x00001019,
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WHvX64RegisterTsc = 0x00002000,
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WHvX64RegisterEfer = 0x00002001,
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WHvX64RegisterKernelGsBase = 0x00002002,
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WHvX64RegisterApicBase = 0x00002003,
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WHvX64RegisterPat = 0x00002004,
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WHvX64RegisterSysenterCs = 0x00002005,
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WHvX64RegisterSysenterEip = 0x00002006,
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WHvX64RegisterSysenterEsp = 0x00002007,
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WHvX64RegisterStar = 0x00002008,
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WHvX64RegisterLstar = 0x00002009,
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WHvX64RegisterCstar = 0x0000200A,
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WHvX64RegisterSfmask = 0x0000200B,
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WHvX64RegisterInitialApicId = 0x0000200C,
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WHvX64RegisterMsrMtrrCap = 0x0000200D,
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WHvX64RegisterMsrMtrrDefType = 0x0000200E,
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WHvX64RegisterMsrMtrrPhysBase0 = 0x00002010,
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WHvX64RegisterMsrMtrrPhysBase1 = 0x00002011,
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WHvX64RegisterMsrMtrrPhysBase2 = 0x00002012,
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WHvX64RegisterMsrMtrrPhysBase3 = 0x00002013,
|
|
WHvX64RegisterMsrMtrrPhysBase4 = 0x00002014,
|
|
WHvX64RegisterMsrMtrrPhysBase5 = 0x00002015,
|
|
WHvX64RegisterMsrMtrrPhysBase6 = 0x00002016,
|
|
WHvX64RegisterMsrMtrrPhysBase7 = 0x00002017,
|
|
WHvX64RegisterMsrMtrrPhysBase8 = 0x00002018,
|
|
WHvX64RegisterMsrMtrrPhysBase9 = 0x00002019,
|
|
WHvX64RegisterMsrMtrrPhysBaseA = 0x0000201A,
|
|
WHvX64RegisterMsrMtrrPhysBaseB = 0x0000201B,
|
|
WHvX64RegisterMsrMtrrPhysBaseC = 0x0000201C,
|
|
WHvX64RegisterMsrMtrrPhysBaseD = 0x0000201D,
|
|
WHvX64RegisterMsrMtrrPhysBaseE = 0x0000201E,
|
|
WHvX64RegisterMsrMtrrPhysBaseF = 0x0000201F,
|
|
WHvX64RegisterMsrMtrrPhysMask0 = 0x00002040,
|
|
WHvX64RegisterMsrMtrrPhysMask1 = 0x00002041,
|
|
WHvX64RegisterMsrMtrrPhysMask2 = 0x00002042,
|
|
WHvX64RegisterMsrMtrrPhysMask3 = 0x00002043,
|
|
WHvX64RegisterMsrMtrrPhysMask4 = 0x00002044,
|
|
WHvX64RegisterMsrMtrrPhysMask5 = 0x00002045,
|
|
WHvX64RegisterMsrMtrrPhysMask6 = 0x00002046,
|
|
WHvX64RegisterMsrMtrrPhysMask7 = 0x00002047,
|
|
WHvX64RegisterMsrMtrrPhysMask8 = 0x00002048,
|
|
WHvX64RegisterMsrMtrrPhysMask9 = 0x00002049,
|
|
WHvX64RegisterMsrMtrrPhysMaskA = 0x0000204A,
|
|
WHvX64RegisterMsrMtrrPhysMaskB = 0x0000204B,
|
|
WHvX64RegisterMsrMtrrPhysMaskC = 0x0000204C,
|
|
WHvX64RegisterMsrMtrrPhysMaskD = 0x0000204D,
|
|
WHvX64RegisterMsrMtrrPhysMaskE = 0x0000204E,
|
|
WHvX64RegisterMsrMtrrPhysMaskF = 0x0000204F,
|
|
WHvX64RegisterMsrMtrrFix64k00000 = 0x00002070,
|
|
WHvX64RegisterMsrMtrrFix16k80000 = 0x00002071,
|
|
WHvX64RegisterMsrMtrrFix16kA0000 = 0x00002072,
|
|
WHvX64RegisterMsrMtrrFix4kC0000 = 0x00002073,
|
|
WHvX64RegisterMsrMtrrFix4kC8000 = 0x00002074,
|
|
WHvX64RegisterMsrMtrrFix4kD0000 = 0x00002075,
|
|
WHvX64RegisterMsrMtrrFix4kD8000 = 0x00002076,
|
|
WHvX64RegisterMsrMtrrFix4kE0000 = 0x00002077,
|
|
WHvX64RegisterMsrMtrrFix4kE8000 = 0x00002078,
|
|
WHvX64RegisterMsrMtrrFix4kF0000 = 0x00002079,
|
|
WHvX64RegisterMsrMtrrFix4kF8000 = 0x0000207A,
|
|
WHvX64RegisterTscAux = 0x0000207B,
|
|
WHvX64RegisterSpecCtrl = 0x00002084,
|
|
WHvX64RegisterPredCmd = 0x00002085,
|
|
WHvX64RegisterTscVirtualOffset = 0x00002087,
|
|
WHvX64RegisterApicId = 0x00003002,
|
|
WHvX64RegisterApicVersion = 0x00003003,
|
|
WHvRegisterPendingInterruption = 0x80000000,
|
|
WHvRegisterInterruptState = 0x80000001,
|
|
WHvRegisterPendingEvent = 0x80000002,
|
|
WHvX64RegisterDeliverabilityNotifications = 0x80000004,
|
|
WHvRegisterInternalActivityState = 0x80000005,
|
|
WHvX64RegisterPendingDebugException = 0x80000006
|
|
} WHV_REGISTER_NAME;
|
|
|
|
typedef union DECLSPEC_ALIGN(16) WHV_UINT128 {
|
|
__C89_NAMELESS struct {
|
|
UINT64 Low64;
|
|
UINT64 High64;
|
|
};
|
|
UINT32 Dword[4];
|
|
} WHV_UINT128;
|
|
|
|
typedef union WHV_X64_FP_REGISTER {
|
|
__C89_NAMELESS struct {
|
|
UINT64 Mantissa;
|
|
UINT64 BiasedExponent:15;
|
|
UINT64 Sign:1;
|
|
UINT64 Reserved:48;
|
|
};
|
|
WHV_UINT128 AsUINT128;
|
|
} WHV_X64_FP_REGISTER;
|
|
|
|
typedef union WHV_X64_FP_CONTROL_STATUS_REGISTER {
|
|
__C89_NAMELESS struct {
|
|
UINT16 FpControl;
|
|
UINT16 FpStatus;
|
|
UINT8 FpTag;
|
|
UINT8 Reserved;
|
|
UINT16 LastFpOp;
|
|
__C89_NAMELESS union {
|
|
UINT64 LastFpRip;
|
|
__C89_NAMELESS struct {
|
|
UINT32 LastFpEip;
|
|
UINT16 LastFpCs;
|
|
UINT16 Reserved2;
|
|
};
|
|
};
|
|
};
|
|
WHV_UINT128 AsUINT128;
|
|
} WHV_X64_FP_CONTROL_STATUS_REGISTER;
|
|
|
|
typedef union WHV_X64_XMM_CONTROL_STATUS_REGISTER {
|
|
__C89_NAMELESS struct {
|
|
__C89_NAMELESS union {
|
|
UINT64 LastFpRdp;
|
|
__C89_NAMELESS struct {
|
|
UINT32 LastFpDp;
|
|
UINT16 LastFpDs;
|
|
UINT16 Reserved;
|
|
};
|
|
};
|
|
UINT32 XmmStatusControl;
|
|
UINT32 XmmStatusControlMask;
|
|
};
|
|
WHV_UINT128 AsUINT128;
|
|
} WHV_X64_XMM_CONTROL_STATUS_REGISTER;
|
|
|
|
typedef struct WHV_X64_SEGMENT_REGISTER {
|
|
UINT64 Base;
|
|
UINT32 Limit;
|
|
UINT16 Selector;
|
|
__C89_NAMELESS union {
|
|
__C89_NAMELESS struct {
|
|
UINT16 SegmentType:4;
|
|
UINT16 NonSystemSegment:1;
|
|
UINT16 DescriptorPrivilegeLevel:2;
|
|
UINT16 Present:1;
|
|
UINT16 Reserved:4;
|
|
UINT16 Available:1;
|
|
UINT16 Long:1;
|
|
UINT16 Default:1;
|
|
UINT16 Granularity:1;
|
|
};
|
|
UINT16 Attributes;
|
|
};
|
|
} WHV_X64_SEGMENT_REGISTER;
|
|
|
|
typedef struct WHV_X64_TABLE_REGISTER {
|
|
UINT16 Pad[3];
|
|
UINT16 Limit;
|
|
UINT64 Base;
|
|
} WHV_X64_TABLE_REGISTER;
|
|
|
|
typedef union WHV_X64_INTERRUPT_STATE_REGISTER {
|
|
__C89_NAMELESS struct {
|
|
UINT64 InterruptShadow:1;
|
|
UINT64 NmiMasked:1;
|
|
UINT64 Reserved:62;
|
|
};
|
|
UINT64 AsUINT64;
|
|
} WHV_X64_INTERRUPT_STATE_REGISTER;
|
|
|
|
typedef union WHV_X64_PENDING_INTERRUPTION_REGISTER {
|
|
__C89_NAMELESS struct {
|
|
UINT32 InterruptionPending:1;
|
|
UINT32 InterruptionType:3;
|
|
UINT32 DeliverErrorCode:1;
|
|
UINT32 InstructionLength:4;
|
|
UINT32 NestedEvent:1;
|
|
UINT32 Reserved:6;
|
|
UINT32 InterruptionVector:16;
|
|
UINT32 ErrorCode;
|
|
};
|
|
UINT64 AsUINT64;
|
|
} WHV_X64_PENDING_INTERRUPTION_REGISTER;
|
|
|
|
C_ASSERT(sizeof(WHV_X64_PENDING_INTERRUPTION_REGISTER) == sizeof(UINT64));
|
|
|
|
typedef union WHV_X64_DELIVERABILITY_NOTIFICATIONS_REGISTER {
|
|
__C89_NAMELESS struct {
|
|
UINT64 NmiNotification:1;
|
|
UINT64 InterruptNotification:1;
|
|
UINT64 InterruptPriority:4;
|
|
UINT64 Reserved:58;
|
|
};
|
|
UINT64 AsUINT64;
|
|
} WHV_X64_DELIVERABILITY_NOTIFICATIONS_REGISTER;
|
|
|
|
C_ASSERT(sizeof(WHV_X64_DELIVERABILITY_NOTIFICATIONS_REGISTER) == sizeof(UINT64));
|
|
|
|
|
|
typedef enum WHV_X64_PENDING_EVENT_TYPE {
|
|
WHvX64PendingEventException = 0,
|
|
WHvX64PendingEventExtInt = 5
|
|
} WHV_X64_PENDING_EVENT_TYPE;
|
|
|
|
typedef union WHV_X64_PENDING_EXCEPTION_EVENT {
|
|
__C89_NAMELESS struct {
|
|
UINT32 EventPending : 1;
|
|
UINT32 EventType : 3;
|
|
UINT32 Reserved0 : 4;
|
|
UINT32 DeliverErrorCode : 1;
|
|
UINT32 Reserved1 : 7;
|
|
UINT32 Vector : 16;
|
|
UINT32 ErrorCode;
|
|
UINT64 ExceptionParameter;
|
|
};
|
|
WHV_UINT128 AsUINT128;
|
|
} WHV_X64_PENDING_EXCEPTION_EVENT;
|
|
|
|
C_ASSERT(sizeof(WHV_X64_PENDING_EXCEPTION_EVENT) == sizeof(WHV_UINT128));
|
|
|
|
typedef union WHV_X64_PENDING_EXT_INT_EVENT {
|
|
__C89_NAMELESS struct {
|
|
UINT64 EventPending : 1;
|
|
UINT64 EventType : 3;
|
|
UINT64 Reserved0 : 4;
|
|
UINT64 Vector : 8;
|
|
UINT64 Reserved1 : 48;
|
|
UINT64 Reserved2;
|
|
};
|
|
WHV_UINT128 AsUINT128;
|
|
} WHV_X64_PENDING_EXT_INT_EVENT;
|
|
|
|
C_ASSERT(sizeof(WHV_X64_PENDING_EXT_INT_EVENT) == sizeof(WHV_UINT128));
|
|
|
|
typedef union WHV_INTERNAL_ACTIVITY_REGISTER {
|
|
__C89_NAMELESS struct {
|
|
UINT64 StartupSuspend : 1;
|
|
UINT64 HaltSuspend : 1;
|
|
UINT64 IdleSuspend : 1;
|
|
UINT64 Reserved :61;
|
|
};
|
|
UINT64 AsUINT64;
|
|
} WHV_INTERNAL_ACTIVITY_REGISTER;
|
|
|
|
C_ASSERT(sizeof(WHV_INTERNAL_ACTIVITY_REGISTER) == sizeof(UINT64));
|
|
|
|
typedef union WHV_X64_PENDING_DEBUG_EXCEPTION {
|
|
UINT64 AsUINT64;
|
|
__C89_NAMELESS struct {
|
|
UINT64 Breakpoint0 : 1;
|
|
UINT64 Breakpoint1 : 1;
|
|
UINT64 Breakpoint2 : 1;
|
|
UINT64 Breakpoint3 : 1;
|
|
UINT64 SingleStep : 1;
|
|
UINT64 Reserved0 : 59;
|
|
};
|
|
} WHV_X64_PENDING_DEBUG_EXCEPTION;
|
|
|
|
C_ASSERT(sizeof(WHV_X64_PENDING_DEBUG_EXCEPTION) == sizeof(UINT64));
|
|
|
|
typedef union WHV_REGISTER_VALUE {
|
|
WHV_UINT128 Reg128;
|
|
UINT64 Reg64;
|
|
UINT32 Reg32;
|
|
UINT16 Reg16;
|
|
UINT8 Reg8;
|
|
WHV_X64_FP_REGISTER Fp;
|
|
WHV_X64_FP_CONTROL_STATUS_REGISTER FpControlStatus;
|
|
WHV_X64_XMM_CONTROL_STATUS_REGISTER XmmControlStatus;
|
|
WHV_X64_SEGMENT_REGISTER Segment;
|
|
WHV_X64_TABLE_REGISTER Table;
|
|
WHV_X64_INTERRUPT_STATE_REGISTER InterruptState;
|
|
WHV_X64_PENDING_INTERRUPTION_REGISTER PendingInterruption;
|
|
WHV_X64_DELIVERABILITY_NOTIFICATIONS_REGISTER DeliverabilityNotifications;
|
|
WHV_X64_PENDING_EXCEPTION_EVENT ExceptionEvent;
|
|
WHV_X64_PENDING_EXT_INT_EVENT ExtIntEvent;
|
|
WHV_INTERNAL_ACTIVITY_REGISTER InternalActivity;
|
|
WHV_X64_PENDING_DEBUG_EXCEPTION PendingDebugException;
|
|
} WHV_REGISTER_VALUE;
|
|
|
|
typedef enum WHV_RUN_VP_EXIT_REASON {
|
|
WHvRunVpExitReasonNone = 0x00000000,
|
|
WHvRunVpExitReasonMemoryAccess = 0x00000001,
|
|
WHvRunVpExitReasonX64IoPortAccess = 0x00000002,
|
|
WHvRunVpExitReasonUnrecoverableException = 0x00000004,
|
|
WHvRunVpExitReasonInvalidVpRegisterValue = 0x00000005,
|
|
WHvRunVpExitReasonUnsupportedFeature = 0x00000006,
|
|
WHvRunVpExitReasonX64InterruptWindow = 0x00000007,
|
|
WHvRunVpExitReasonX64Halt = 0x00000008,
|
|
WHvRunVpExitReasonX64ApicEoi = 0x00000009,
|
|
WHvRunVpExitReasonX64MsrAccess = 0x00001000,
|
|
WHvRunVpExitReasonX64Cpuid = 0x00001001,
|
|
WHvRunVpExitReasonException = 0x00001002,
|
|
WHvRunVpExitReasonX64Rdtsc = 0x00001003,
|
|
WHvRunVpExitReasonX64ApicSmiTrap = 0x00001004,
|
|
WHvRunVpExitReasonHypercall = 0x00001005,
|
|
WHvRunVpExitReasonX64ApicInitSipiTrap = 0x00001006,
|
|
WHvRunVpExitReasonCanceled = 0x00002001
|
|
} WHV_RUN_VP_EXIT_REASON;
|
|
|
|
typedef union WHV_X64_VP_EXECUTION_STATE {
|
|
__C89_NAMELESS struct {
|
|
UINT16 Cpl : 2;
|
|
UINT16 Cr0Pe : 1;
|
|
UINT16 Cr0Am : 1;
|
|
UINT16 EferLma : 1;
|
|
UINT16 DebugActive : 1;
|
|
UINT16 InterruptionPending : 1;
|
|
UINT16 Reserved0 : 5;
|
|
UINT16 InterruptShadow : 1;
|
|
UINT16 Reserved1 : 3;
|
|
};
|
|
UINT16 AsUINT16;
|
|
} WHV_X64_VP_EXECUTION_STATE;
|
|
|
|
C_ASSERT(sizeof(WHV_X64_VP_EXECUTION_STATE) == sizeof(UINT16));
|
|
|
|
typedef struct WHV_VP_EXIT_CONTEXT {
|
|
WHV_X64_VP_EXECUTION_STATE ExecutionState;
|
|
UINT8 InstructionLength : 4;
|
|
UINT8 Cr8 : 4;
|
|
UINT8 Reserved;
|
|
UINT32 Reserved2;
|
|
WHV_X64_SEGMENT_REGISTER Cs;
|
|
UINT64 Rip;
|
|
UINT64 Rflags;
|
|
} WHV_VP_EXIT_CONTEXT;
|
|
|
|
typedef enum WHV_MEMORY_ACCESS_TYPE {
|
|
WHvMemoryAccessRead = 0,
|
|
WHvMemoryAccessWrite = 1,
|
|
WHvMemoryAccessExecute = 2
|
|
} WHV_MEMORY_ACCESS_TYPE;
|
|
|
|
typedef union WHV_MEMORY_ACCESS_INFO {
|
|
__C89_NAMELESS struct {
|
|
UINT32 AccessType : 2;
|
|
UINT32 GpaUnmapped : 1;
|
|
UINT32 GvaValid : 1;
|
|
UINT32 Reserved : 28;
|
|
};
|
|
UINT32 AsUINT32;
|
|
} WHV_MEMORY_ACCESS_INFO;
|
|
|
|
typedef struct WHV_MEMORY_ACCESS_CONTEXT {
|
|
UINT8 InstructionByteCount;
|
|
UINT8 Reserved[3];
|
|
UINT8 InstructionBytes[16];
|
|
WHV_MEMORY_ACCESS_INFO AccessInfo;
|
|
WHV_GUEST_PHYSICAL_ADDRESS Gpa;
|
|
WHV_GUEST_VIRTUAL_ADDRESS Gva;
|
|
} WHV_MEMORY_ACCESS_CONTEXT;
|
|
|
|
typedef union WHV_X64_IO_PORT_ACCESS_INFO {
|
|
__C89_NAMELESS struct {
|
|
UINT32 IsWrite : 1;
|
|
UINT32 AccessSize: 3;
|
|
UINT32 StringOp : 1;
|
|
UINT32 RepPrefix : 1;
|
|
UINT32 Reserved : 26;
|
|
};
|
|
UINT32 AsUINT32;
|
|
} WHV_X64_IO_PORT_ACCESS_INFO;
|
|
|
|
C_ASSERT(sizeof(WHV_X64_IO_PORT_ACCESS_INFO) == sizeof(UINT32));
|
|
|
|
typedef struct WHV_X64_IO_PORT_ACCESS_CONTEXT {
|
|
UINT8 InstructionByteCount;
|
|
UINT8 Reserved[3];
|
|
UINT8 InstructionBytes[16];
|
|
WHV_X64_IO_PORT_ACCESS_INFO AccessInfo;
|
|
UINT16 PortNumber;
|
|
UINT16 Reserved2[3];
|
|
UINT64 Rax;
|
|
UINT64 Rcx;
|
|
UINT64 Rsi;
|
|
UINT64 Rdi;
|
|
WHV_X64_SEGMENT_REGISTER Ds;
|
|
WHV_X64_SEGMENT_REGISTER Es;
|
|
} WHV_X64_IO_PORT_ACCESS_CONTEXT;
|
|
|
|
typedef union WHV_X64_MSR_ACCESS_INFO {
|
|
__C89_NAMELESS struct {
|
|
UINT32 IsWrite : 1;
|
|
UINT32 Reserved : 31;
|
|
};
|
|
UINT32 AsUINT32;
|
|
} WHV_X64_MSR_ACCESS_INFO;
|
|
|
|
C_ASSERT(sizeof(WHV_X64_MSR_ACCESS_INFO) == sizeof(UINT32));
|
|
|
|
typedef struct WHV_X64_MSR_ACCESS_CONTEXT {
|
|
WHV_X64_MSR_ACCESS_INFO AccessInfo;
|
|
UINT32 MsrNumber;
|
|
UINT64 Rax;
|
|
UINT64 Rdx;
|
|
} WHV_X64_MSR_ACCESS_CONTEXT;
|
|
|
|
typedef struct WHV_X64_CPUID_ACCESS_CONTEXT {
|
|
UINT64 Rax;
|
|
UINT64 Rcx;
|
|
UINT64 Rdx;
|
|
UINT64 Rbx;
|
|
UINT64 DefaultResultRax;
|
|
UINT64 DefaultResultRcx;
|
|
UINT64 DefaultResultRdx;
|
|
UINT64 DefaultResultRbx;
|
|
} WHV_X64_CPUID_ACCESS_CONTEXT;
|
|
|
|
typedef union WHV_VP_EXCEPTION_INFO {
|
|
__C89_NAMELESS struct {
|
|
UINT32 ErrorCodeValid : 1;
|
|
UINT32 SoftwareException : 1;
|
|
UINT32 Reserved : 30;
|
|
};
|
|
UINT32 AsUINT32;
|
|
} WHV_VP_EXCEPTION_INFO;
|
|
|
|
C_ASSERT(sizeof(WHV_VP_EXCEPTION_INFO) == sizeof(UINT32));
|
|
|
|
typedef struct WHV_VP_EXCEPTION_CONTEXT {
|
|
UINT8 InstructionByteCount;
|
|
UINT8 Reserved[3];
|
|
UINT8 InstructionBytes[16];
|
|
WHV_VP_EXCEPTION_INFO ExceptionInfo;
|
|
UINT8 ExceptionType;
|
|
UINT8 Reserved2[3];
|
|
UINT32 ErrorCode;
|
|
UINT64 ExceptionParameter;
|
|
} WHV_VP_EXCEPTION_CONTEXT;
|
|
|
|
typedef enum WHV_X64_UNSUPPORTED_FEATURE_CODE {
|
|
WHvUnsupportedFeatureIntercept = 1,
|
|
WHvUnsupportedFeatureTaskSwitchTss = 2
|
|
} WHV_X64_UNSUPPORTED_FEATURE_CODE;
|
|
|
|
typedef struct WHV_X64_UNSUPPORTED_FEATURE_CONTEXT {
|
|
WHV_X64_UNSUPPORTED_FEATURE_CODE FeatureCode;
|
|
UINT32 Reserved;
|
|
UINT64 FeatureParameter;
|
|
} WHV_X64_UNSUPPORTED_FEATURE_CONTEXT;
|
|
|
|
typedef enum WHV_RUN_VP_CANCEL_REASON {
|
|
WhvRunVpCancelReasonUser = 0
|
|
} WHV_RUN_VP_CANCEL_REASON;
|
|
|
|
typedef struct WHV_RUN_VP_CANCELED_CONTEXT {
|
|
WHV_RUN_VP_CANCEL_REASON CancelReason;
|
|
} WHV_RUN_VP_CANCELED_CONTEXT;
|
|
|
|
typedef enum WHV_X64_PENDING_INTERRUPTION_TYPE {
|
|
WHvX64PendingInterrupt = 0,
|
|
WHvX64PendingNmi = 2,
|
|
WHvX64PendingException = 3
|
|
} WHV_X64_PENDING_INTERRUPTION_TYPE, *PWHV_X64_PENDING_INTERRUPTION_TYPE;
|
|
|
|
typedef struct WHV_X64_INTERRUPTION_DELIVERABLE_CONTEXT {
|
|
WHV_X64_PENDING_INTERRUPTION_TYPE DeliverableType;
|
|
} WHV_X64_INTERRUPTION_DELIVERABLE_CONTEXT, *PWHV_X64_INTERRUPTION_DELIVERABLE_CONTEXT;
|
|
|
|
typedef struct WHV_X64_APIC_EOI_CONTEXT {
|
|
UINT32 InterruptVector;
|
|
} WHV_X64_APIC_EOI_CONTEXT;
|
|
|
|
typedef union WHV_X64_RDTSC_INFO {
|
|
__C89_NAMELESS struct {
|
|
UINT64 IsRdtscp : 1;
|
|
UINT64 Reserved : 63;
|
|
};
|
|
UINT64 AsUINT64;
|
|
} WHV_X64_RDTSC_INFO;
|
|
|
|
typedef struct WHV_X64_RDTSC_CONTEXT {
|
|
UINT64 TscAux;
|
|
UINT64 VirtualOffset;
|
|
UINT64 Tsc;
|
|
UINT64 ReferenceTime;
|
|
WHV_X64_RDTSC_INFO RdtscInfo;
|
|
} WHV_X64_RDTSC_CONTEXT;
|
|
|
|
typedef struct WHV_X64_APIC_SMI_CONTEXT {
|
|
UINT64 ApicIcr;
|
|
} WHV_X64_APIC_SMI_CONTEXT;
|
|
|
|
#define WHV_HYPERCALL_CONTEXT_MAX_XMM_REGISTERS 6
|
|
|
|
typedef struct _WHV_HYPERCALL_CONTEXT {
|
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UINT64 Rax;
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UINT64 Rbx;
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UINT64 Rcx;
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UINT64 Rdx;
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UINT64 R8;
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UINT64 Rsi;
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UINT64 Rdi;
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UINT64 Reserved0;
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WHV_UINT128 XmmRegisters[WHV_HYPERCALL_CONTEXT_MAX_XMM_REGISTERS];
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UINT64 Reserved1[2];
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} WHV_HYPERCALL_CONTEXT, *PWHV_HYPERCALL_CONTEXT;
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typedef struct WHV_X64_APIC_INIT_SIPI_CONTEXT {
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UINT64 ApicIcr;
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} WHV_X64_APIC_INIT_SIPI_CONTEXT;
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typedef struct WHV_RUN_VP_EXIT_CONTEXT {
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WHV_RUN_VP_EXIT_REASON ExitReason;
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UINT32 Reserved;
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WHV_VP_EXIT_CONTEXT VpContext;
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__C89_NAMELESS union {
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WHV_MEMORY_ACCESS_CONTEXT MemoryAccess;
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WHV_X64_IO_PORT_ACCESS_CONTEXT IoPortAccess;
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WHV_X64_MSR_ACCESS_CONTEXT MsrAccess;
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WHV_X64_CPUID_ACCESS_CONTEXT CpuidAccess;
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WHV_VP_EXCEPTION_CONTEXT VpException;
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WHV_X64_INTERRUPTION_DELIVERABLE_CONTEXT InterruptWindow;
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WHV_X64_UNSUPPORTED_FEATURE_CONTEXT UnsupportedFeature;
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WHV_RUN_VP_CANCELED_CONTEXT CancelReason;
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WHV_X64_APIC_EOI_CONTEXT ApicEoi;
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WHV_X64_RDTSC_CONTEXT ReadTsc;
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WHV_X64_APIC_SMI_CONTEXT ApicSmi;
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WHV_HYPERCALL_CONTEXT Hypercall;
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WHV_X64_APIC_INIT_SIPI_CONTEXT ApicInitSipi;
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};
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} WHV_RUN_VP_EXIT_CONTEXT;
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typedef enum WHV_INTERRUPT_TYPE {
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WHvX64InterruptTypeFixed = 0,
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WHvX64InterruptTypeLowestPriority = 1,
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WHvX64InterruptTypeNmi = 4,
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WHvX64InterruptTypeInit = 5,
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WHvX64InterruptTypeSipi = 6,
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WHvX64InterruptTypeLocalInt1 = 9
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} WHV_INTERRUPT_TYPE;
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typedef enum WHV_INTERRUPT_DESTINATION_MODE {
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WHvX64InterruptDestinationModePhysical,
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WHvX64InterruptDestinationModeLogical
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} WHV_INTERRUPT_DESTINATION_MODE;
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typedef enum WHV_INTERRUPT_TRIGGER_MODE {
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WHvX64InterruptTriggerModeEdge,
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WHvX64InterruptTriggerModeLevel
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} WHV_INTERRUPT_TRIGGER_MODE;
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typedef struct WHV_INTERRUPT_CONTROL {
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UINT64 Type : 8;
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UINT64 DestinationMode : 4;
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UINT64 TriggerMode : 4;
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UINT64 Reserved : 48;
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UINT32 Destination;
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UINT32 Vector;
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} WHV_INTERRUPT_CONTROL;
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typedef struct WHV_DOORBELL_MATCH_DATA {
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WHV_GUEST_PHYSICAL_ADDRESS GuestAddress;
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UINT64 Value;
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UINT32 Length;
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UINT32 MatchOnValue : 1;
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UINT32 MatchOnLength : 1;
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UINT32 Reserved : 30;
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} WHV_DOORBELL_MATCH_DATA;
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typedef enum WHV_PARTITION_COUNTER_SET {
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WHvPartitionCounterSetMemory
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} WHV_PARTITION_COUNTER_SET;
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typedef struct WHV_PARTITION_MEMORY_COUNTERS {
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UINT64 Mapped4KPageCount;
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UINT64 Mapped2MPageCount;
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UINT64 Mapped1GPageCount;
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} WHV_PARTITION_MEMORY_COUNTERS;
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typedef enum WHV_PROCESSOR_COUNTER_SET {
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WHvProcessorCounterSetRuntime,
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WHvProcessorCounterSetIntercepts,
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WHvProcessorCounterSetEvents,
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WHvProcessorCounterSetApic
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} WHV_PROCESSOR_COUNTER_SET;
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typedef struct WHV_PROCESSOR_RUNTIME_COUNTERS {
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UINT64 TotalRuntime100ns;
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UINT64 HypervisorRuntime100ns;
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} WHV_PROCESSOR_RUNTIME_COUNTERS;
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typedef struct WHV_PROCESSOR_INTERCEPT_COUNTER {
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UINT64 Count;
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UINT64 Time100ns;
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} WHV_PROCESSOR_INTERCEPT_COUNTER;
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typedef struct WHV_PROCESSOR_INTERCEPT_COUNTERS {
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WHV_PROCESSOR_INTERCEPT_COUNTER PageInvalidations;
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WHV_PROCESSOR_INTERCEPT_COUNTER ControlRegisterAccesses;
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WHV_PROCESSOR_INTERCEPT_COUNTER IoInstructions;
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WHV_PROCESSOR_INTERCEPT_COUNTER HaltInstructions;
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WHV_PROCESSOR_INTERCEPT_COUNTER CpuidInstructions;
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WHV_PROCESSOR_INTERCEPT_COUNTER MsrAccesses;
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WHV_PROCESSOR_INTERCEPT_COUNTER OtherIntercepts;
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WHV_PROCESSOR_INTERCEPT_COUNTER PendingInterrupts;
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WHV_PROCESSOR_INTERCEPT_COUNTER EmulatedInstructions;
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WHV_PROCESSOR_INTERCEPT_COUNTER DebugRegisterAccesses;
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WHV_PROCESSOR_INTERCEPT_COUNTER PageFaultIntercepts;
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} WHV_PROCESSOR_ACTIVITY_COUNTERS;
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typedef struct WHV_PROCESSOR_EVENT_COUNTERS {
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UINT64 PageFaultCount;
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UINT64 ExceptionCount;
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UINT64 InterruptCount;
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} WHV_PROCESSOR_GUEST_EVENT_COUNTERS;
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typedef struct WHV_PROCESSOR_APIC_COUNTERS {
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UINT64 MmioAccessCount;
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UINT64 EoiAccessCount;
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UINT64 TprAccessCount;
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UINT64 SentIpiCount;
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UINT64 SelfIpiCount;
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} WHV_PROCESSOR_APIC_COUNTERS;
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#endif /* _WINHVAPIDEFS_H_ */
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