Timon Kruiper 56c059077c stage2: add initial impl of control flow in LLVM backend ...

The following TZIR instrutions have been implemented in the backend:
- all cmp operators (lt, lte, gt, gte, eq, neq)
- block
- br
- condbr

The following LLVMIR is generated for a simple assert function:
```
define void @assert(i1 %0) {
Entry:
  %1 = alloca i1, align 1
  store i1 %0, i1* %1, align 1
  %2 = load i1, i1* %1, align 1
  %3 = xor i1 %2, true
  br i1 %3, label %Then, label %Else

Then:                                             ; preds = %Entry
  call void @llvm.debugtrap()
  unreachable

Else:                                             ; preds = %Entry
  br label %Block

Block:                                            ; preds = %Else
  ret void
}
```

See tests for more examples.

2021-01-08 19:30:52 +01:00

..

aarch64.zig

stage2: add aarch64 stage2 tests

2021-01-03 23:20:09 +01:00

arm.zig

stage2 ARM: Add simple tests for conditional branching

2021-01-01 12:22:17 +01:00

cbe.zig

stage2: C backend: support unused Decls

2021-01-06 16:47:09 -07:00

llvm.zig

stage2: add initial impl of control flow in LLVM backend

2021-01-08 19:30:52 +01:00

spu-ii.zig

fix regressed stage2 test harness

2020-09-21 21:14:01 -07:00

test.zig

Merge pull request #7700 from FireFox317/more-stage2-stuff-llvm

2021-01-06 16:06:32 -08:00