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The goal is to minimize as much as possible how much logic is inside flush(). So let's start by moving out obvious stuff. This data can be preformatted before flush().
330 lines
11 KiB
Zig
330 lines
11 KiB
Zig
//! SPIR-V Spec documentation: https://www.khronos.org/registry/spir-v/specs/unified1/SPIRV.html
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//! According to above documentation, a SPIR-V module has the following logical layout:
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//! Header.
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//! OpCapability instructions.
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//! OpExtension instructions.
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//! OpExtInstImport instructions.
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//! A single OpMemoryModel instruction.
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//! All entry points, declared with OpEntryPoint instructions.
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//! All execution-mode declarators; OpExecutionMode and OpExecutionModeId instructions.
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//! Debug instructions:
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//! - First, OpString, OpSourceExtension, OpSource, OpSourceContinued (no forward references).
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//! - OpName and OpMemberName instructions.
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//! - OpModuleProcessed instructions.
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//! All annotation (decoration) instructions.
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//! All type declaration instructions, constant instructions, global variable declarations, (preferably) OpUndef instructions.
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//! All function declarations without a body (extern functions presumably).
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//! All regular functions.
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// Because SPIR-V requires re-compilation anyway, and so hot swapping will not work
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// anyway, we simply generate all the code in flushModule. This keeps
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// things considerably simpler.
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const SpirV = @This();
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const std = @import("std");
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const Allocator = std.mem.Allocator;
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const assert = std.debug.assert;
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const log = std.log.scoped(.link);
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const Path = std.Build.Cache.Path;
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const Zcu = @import("../Zcu.zig");
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const InternPool = @import("../InternPool.zig");
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const Compilation = @import("../Compilation.zig");
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const link = @import("../link.zig");
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const codegen = @import("../codegen/spirv.zig");
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const trace = @import("../tracy.zig").trace;
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const build_options = @import("build_options");
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const Air = @import("../Air.zig");
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const Liveness = @import("../Liveness.zig");
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const Type = @import("../Type.zig");
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const Value = @import("../Value.zig");
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const SpvModule = @import("../codegen/spirv/Module.zig");
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const Section = @import("../codegen/spirv/Section.zig");
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const spec = @import("../codegen/spirv/spec.zig");
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const IdResult = spec.IdResult;
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const Word = spec.Word;
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const BinaryModule = @import("SpirV/BinaryModule.zig");
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base: link.File,
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object: codegen.Object,
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pub fn createEmpty(
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arena: Allocator,
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comp: *Compilation,
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emit: Path,
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options: link.File.OpenOptions,
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) !*SpirV {
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const gpa = comp.gpa;
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const target = comp.root_mod.resolved_target.result;
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const self = try arena.create(SpirV);
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self.* = .{
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.base = .{
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.tag = .spirv,
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.comp = comp,
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.emit = emit,
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.gc_sections = options.gc_sections orelse false,
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.print_gc_sections = options.print_gc_sections,
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.stack_size = options.stack_size orelse 0,
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.allow_shlib_undefined = options.allow_shlib_undefined orelse false,
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.file = null,
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.disable_lld_caching = options.disable_lld_caching,
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.build_id = options.build_id,
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},
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.object = codegen.Object.init(gpa),
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};
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errdefer self.deinit();
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switch (target.cpu.arch) {
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.spirv, .spirv32, .spirv64 => {},
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else => unreachable, // Caught by Compilation.Config.resolve.
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}
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switch (target.os.tag) {
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.opencl, .opengl, .vulkan => {},
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else => unreachable, // Caught by Compilation.Config.resolve.
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}
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return self;
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}
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pub fn open(
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arena: Allocator,
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comp: *Compilation,
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emit: Path,
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options: link.File.OpenOptions,
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) !*SpirV {
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const target = comp.root_mod.resolved_target.result;
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const use_lld = build_options.have_llvm and comp.config.use_lld;
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const use_llvm = comp.config.use_llvm;
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assert(!use_llvm); // Caught by Compilation.Config.resolve.
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assert(!use_lld); // Caught by Compilation.Config.resolve.
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assert(target.ofmt == .spirv); // Caught by Compilation.Config.resolve.
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const spirv = try createEmpty(arena, comp, emit, options);
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errdefer spirv.base.destroy();
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// TODO: read the file and keep valid parts instead of truncating
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const file = try emit.root_dir.handle.createFile(emit.sub_path, .{
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.truncate = true,
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.read = true,
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});
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spirv.base.file = file;
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return spirv;
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}
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pub fn deinit(self: *SpirV) void {
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self.object.deinit();
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}
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pub fn updateFunc(self: *SpirV, pt: Zcu.PerThread, func_index: InternPool.Index, air: Air, liveness: Liveness) !void {
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if (build_options.skip_non_native) {
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@panic("Attempted to compile for architecture that was disabled by build configuration");
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}
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const ip = &pt.zcu.intern_pool;
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const func = pt.zcu.funcInfo(func_index);
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log.debug("lowering function {}", .{ip.getNav(func.owner_nav).name.fmt(ip)});
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try self.object.updateFunc(pt, func_index, air, liveness);
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}
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pub fn updateNav(self: *SpirV, pt: Zcu.PerThread, nav: InternPool.Nav.Index) !void {
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if (build_options.skip_non_native) {
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@panic("Attempted to compile for architecture that was disabled by build configuration");
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}
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const ip = &pt.zcu.intern_pool;
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log.debug("lowering declaration {}", .{ip.getNav(nav).name.fmt(ip)});
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try self.object.updateNav(pt, nav);
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}
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pub fn updateExports(
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self: *SpirV,
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pt: Zcu.PerThread,
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exported: Zcu.Exported,
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export_indices: []const u32,
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) !void {
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const zcu = pt.zcu;
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const ip = &zcu.intern_pool;
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const nav_index = switch (exported) {
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.nav => |nav| nav,
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.uav => |uav| {
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_ = uav;
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@panic("TODO: implement SpirV linker code for exporting a constant value");
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},
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};
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const nav_ty = ip.getNav(nav_index).typeOf(ip);
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if (ip.isFunctionType(nav_ty)) {
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const target = zcu.getTarget();
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const spv_decl_index = try self.object.resolveNav(zcu, nav_index);
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const execution_model = switch (Type.fromInterned(nav_ty).fnCallingConvention(zcu)) {
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.Vertex => spec.ExecutionModel.Vertex,
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.Fragment => spec.ExecutionModel.Fragment,
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.Kernel => spec.ExecutionModel.Kernel,
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.C => return, // TODO: What to do here?
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else => unreachable,
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};
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const is_vulkan = target.os.tag == .vulkan;
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if ((!is_vulkan and execution_model == .Kernel) or
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(is_vulkan and (execution_model == .Fragment or execution_model == .Vertex)))
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{
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for (export_indices) |export_idx| {
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const exp = zcu.all_exports.items[export_idx];
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try self.object.spv.declareEntryPoint(
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spv_decl_index,
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exp.opts.name.toSlice(ip),
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execution_model,
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);
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}
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}
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}
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// TODO: Export regular functions, variables, etc using Linkage attributes.
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}
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pub fn freeDecl(self: *SpirV, decl_index: InternPool.DeclIndex) void {
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_ = self;
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_ = decl_index;
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}
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pub fn flush(self: *SpirV, arena: Allocator, tid: Zcu.PerThread.Id, prog_node: std.Progress.Node) link.File.FlushError!void {
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return self.flushModule(arena, tid, prog_node);
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}
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pub fn flushModule(self: *SpirV, arena: Allocator, tid: Zcu.PerThread.Id, prog_node: std.Progress.Node) link.File.FlushError!void {
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if (build_options.skip_non_native) {
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@panic("Attempted to compile for architecture that was disabled by build configuration");
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}
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const tracy = trace(@src());
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defer tracy.end();
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const sub_prog_node = prog_node.start("Flush Module", 0);
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defer sub_prog_node.end();
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const spv = &self.object.spv;
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const comp = self.base.comp;
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const gpa = comp.gpa;
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const target = comp.getTarget();
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_ = tid;
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try writeCapabilities(spv, target);
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try writeMemoryModel(spv, target);
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// We need to export the list of error names somewhere so that we can pretty-print them in the
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// executor. This is not really an important thing though, so we can just dump it in any old
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// nonsemantic instruction. For now, just put it in OpSourceExtension with a special name.
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var error_info = std.ArrayList(u8).init(self.object.gpa);
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defer error_info.deinit();
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try error_info.appendSlice("zig_errors:");
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const ip = &self.base.comp.zcu.?.intern_pool;
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for (ip.global_error_set.getNamesFromMainThread()) |name| {
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// Errors can contain pretty much any character - to encode them in a string we must escape
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// them somehow. Easiest here is to use some established scheme, one which also preseves the
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// name if it contains no strange characters is nice for debugging. URI encoding fits the bill.
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// We're using : as separator, which is a reserved character.
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try error_info.append(':');
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try std.Uri.Component.percentEncode(
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error_info.writer(),
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name.toSlice(ip),
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struct {
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fn isValidChar(c: u8) bool {
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return switch (c) {
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0, '%', ':' => false,
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else => true,
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};
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}
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}.isValidChar,
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);
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}
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try spv.sections.debug_strings.emit(gpa, .OpSourceExtension, .{
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.extension = error_info.items,
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});
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const module = try spv.finalize(arena, target);
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errdefer arena.free(module);
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const linked_module = self.linkModule(arena, module, sub_prog_node) catch |err| switch (err) {
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error.OutOfMemory => return error.OutOfMemory,
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else => |other| {
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log.err("error while linking: {s}\n", .{@errorName(other)});
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return error.FlushFailure;
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},
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};
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try self.base.file.?.writeAll(std.mem.sliceAsBytes(linked_module));
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}
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fn linkModule(self: *SpirV, a: Allocator, module: []Word, progress: std.Progress.Node) ![]Word {
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_ = self;
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const lower_invocation_globals = @import("SpirV/lower_invocation_globals.zig");
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const prune_unused = @import("SpirV/prune_unused.zig");
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const dedup = @import("SpirV/deduplicate.zig");
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var parser = try BinaryModule.Parser.init(a);
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defer parser.deinit();
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var binary = try parser.parse(module);
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try lower_invocation_globals.run(&parser, &binary, progress);
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try prune_unused.run(&parser, &binary, progress);
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try dedup.run(&parser, &binary, progress);
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return binary.finalize(a);
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}
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fn writeCapabilities(spv: *SpvModule, target: std.Target) !void {
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const gpa = spv.gpa;
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// TODO: Integrate with a hypothetical feature system
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const caps: []const spec.Capability = switch (target.os.tag) {
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.opencl => &.{ .Kernel, .Addresses, .Int8, .Int16, .Int64, .Float64, .Float16, .Vector16, .GenericPointer },
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.opengl => &.{.Shader},
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.vulkan => &.{ .Shader, .VariablePointersStorageBuffer, .Int8, .Int16, .Int64, .Float64, .Float16 },
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else => unreachable, // TODO
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};
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for (caps) |cap| {
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try spv.sections.capabilities.emit(gpa, .OpCapability, .{
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.capability = cap,
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});
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}
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}
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fn writeMemoryModel(spv: *SpvModule, target: std.Target) !void {
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const gpa = spv.gpa;
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const addressing_model = switch (target.os.tag) {
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.opencl => switch (target.cpu.arch) {
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.spirv32 => spec.AddressingModel.Physical32,
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.spirv64 => spec.AddressingModel.Physical64,
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else => unreachable, // TODO
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},
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.opengl, .vulkan => spec.AddressingModel.Logical,
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else => unreachable, // TODO
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};
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const memory_model: spec.MemoryModel = switch (target.os.tag) {
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.opencl => .OpenCL,
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.opengl => .GLSL450,
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.vulkan => .GLSL450,
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else => unreachable,
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};
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try spv.sections.memory_model.emit(gpa, .OpMemoryModel, .{
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.addressing_model = addressing_model,
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.memory_model = memory_model,
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});
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}
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