mirror of
https://github.com/ziglang/zig.git
synced 2025-12-06 06:13:07 +00:00
409 lines
13 KiB
C
409 lines
13 KiB
C
/*
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* Copyright (c) 2015 Andrew Kelley
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*
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* This file is part of zig, which is MIT licensed.
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* See http://opensource.org/licenses/MIT
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*/
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#ifndef ZIG_ZIG_LLVM_HPP
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#define ZIG_ZIG_LLVM_HPP
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#include <stdbool.h>
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#include <stddef.h>
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#include <llvm-c/Core.h>
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#include <llvm-c/Analysis.h>
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#include <llvm-c/Target.h>
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#include <llvm-c/TargetMachine.h>
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#ifdef __cplusplus
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#define ZIG_EXTERN_C extern "C"
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#else
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#define ZIG_EXTERN_C
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#endif
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// ATTENTION: If you modify this file, be sure to update the corresponding
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// extern function declarations in the self-hosted compiler.
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enum ZigLLVMCoverageType {
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ZigLLVMCoverageType_None = 0,
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ZigLLVMCoverageType_Function,
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ZigLLVMCoverageType_BB,
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ZigLLVMCoverageType_Edge
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};
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struct ZigLLVMCoverageOptions {
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ZigLLVMCoverageType CoverageType;
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bool IndirectCalls;
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bool TraceBB;
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bool TraceCmp;
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bool TraceDiv;
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bool TraceGep;
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bool Use8bitCounters;
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bool TracePC;
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bool TracePCGuard;
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bool Inline8bitCounters;
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bool InlineBoolFlag;
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bool PCTable;
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bool NoPrune;
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bool StackDepth;
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bool TraceLoads;
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bool TraceStores;
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bool CollectControlFlow;
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};
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struct ZigLLVMEmitOptions {
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bool is_debug;
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bool is_small;
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bool time_report;
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bool tsan;
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bool sancov;
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bool lto;
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bool allow_fast_isel;
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const char *asm_filename;
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const char *bin_filename;
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const char *llvm_ir_filename;
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const char *bitcode_filename;
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ZigLLVMCoverageOptions coverage;
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};
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ZIG_EXTERN_C bool ZigLLVMTargetMachineEmitToFile(LLVMTargetMachineRef targ_machine_ref, LLVMModuleRef module_ref,
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char **error_message, const struct ZigLLVMEmitOptions *options);
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enum ZigLLVMABIType {
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ZigLLVMABITypeDefault, // Target-specific (either soft or hard depending on triple, etc).
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ZigLLVMABITypeSoft, // Soft float.
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ZigLLVMABITypeHard // Hard float.
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};
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ZIG_EXTERN_C LLVMTargetMachineRef ZigLLVMCreateTargetMachine(LLVMTargetRef T, const char *Triple,
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const char *CPU, const char *Features, LLVMCodeGenOptLevel Level, LLVMRelocMode Reloc,
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LLVMCodeModel CodeModel, bool function_sections, bool data_sections, enum ZigLLVMABIType float_abi,
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const char *abi_name);
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ZIG_EXTERN_C void ZigLLVMSetOptBisectLimit(LLVMContextRef context_ref, int limit);
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ZIG_EXTERN_C void ZigLLVMEnableBrokenDebugInfoCheck(LLVMContextRef context_ref);
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ZIG_EXTERN_C bool ZigLLVMGetBrokenDebugInfo(LLVMContextRef context_ref);
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enum ZigLLVMTailCallKind {
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ZigLLVMTailCallKindNone,
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ZigLLVMTailCallKindTail,
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ZigLLVMTailCallKindMustTail,
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ZigLLVMTailCallKindNoTail,
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};
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enum ZigLLVM_CallingConv {
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ZigLLVM_C = 0,
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ZigLLVM_Fast = 8,
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ZigLLVM_Cold = 9,
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ZigLLVM_GHC = 10,
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ZigLLVM_HiPE = 11,
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ZigLLVM_AnyReg = 13,
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ZigLLVM_PreserveMost = 14,
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ZigLLVM_PreserveAll = 15,
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ZigLLVM_Swift = 16,
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ZigLLVM_CXX_FAST_TLS = 17,
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ZigLLVM_Tail = 18,
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ZigLLVM_CFGuard_Check = 19,
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ZigLLVM_SwiftTail = 20,
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ZigLLVM_FirstTargetCC = 64,
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ZigLLVM_X86_StdCall = 64,
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ZigLLVM_X86_FastCall = 65,
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ZigLLVM_ARM_APCS = 66,
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ZigLLVM_ARM_AAPCS = 67,
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ZigLLVM_ARM_AAPCS_VFP = 68,
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ZigLLVM_MSP430_INTR = 69,
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ZigLLVM_X86_ThisCall = 70,
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ZigLLVM_PTX_Kernel = 71,
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ZigLLVM_PTX_Device = 72,
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ZigLLVM_SPIR_FUNC = 75,
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ZigLLVM_SPIR_KERNEL = 76,
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ZigLLVM_Intel_OCL_BI = 77,
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ZigLLVM_X86_64_SysV = 78,
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ZigLLVM_Win64 = 79,
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ZigLLVM_X86_VectorCall = 80,
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ZigLLVM_DUMMY_HHVM = 81,
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ZigLLVM_DUMMY_HHVM_C = 82,
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ZigLLVM_X86_INTR = 83,
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ZigLLVM_AVR_INTR = 84,
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ZigLLVM_AVR_SIGNAL = 85,
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ZigLLVM_AVR_BUILTIN = 86,
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ZigLLVM_AMDGPU_VS = 87,
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ZigLLVM_AMDGPU_GS = 88,
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ZigLLVM_AMDGPU_PS = 89,
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ZigLLVM_AMDGPU_CS = 90,
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ZigLLVM_AMDGPU_KERNEL = 91,
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ZigLLVM_X86_RegCall = 92,
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ZigLLVM_AMDGPU_HS = 93,
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ZigLLVM_MSP430_BUILTIN = 94,
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ZigLLVM_AMDGPU_LS = 95,
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ZigLLVM_AMDGPU_ES = 96,
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ZigLLVM_AArch64_VectorCall = 97,
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ZigLLVM_AArch64_SVE_VectorCall = 98,
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ZigLLVM_WASM_EmscriptenInvoke = 99,
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ZigLLVM_AMDGPU_Gfx = 100,
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ZigLLVM_M68k_INTR = 101,
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ZigLLVM_AArch64_SME_ABI_Support_Routines_PreserveMost_From_X0 = 102,
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ZigLLVM_AArch64_SME_ABI_Support_Routines_PreserveMost_From_X2 = 103,
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ZigLLVM_AMDGPU_CS_Chain = 104,
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ZigLLVM_AMDGPU_CS_ChainPreserve = 105,
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ZigLLVM_M68k_RTD = 106,
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ZigLLVM_GRAAL = 107,
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ZigLLVM_ARM64EC_Thunk_X64 = 108,
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ZigLLVM_ARM64EC_Thunk_Native = 109,
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ZigLLVM_MaxID = 1023,
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};
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ZIG_EXTERN_C void ZigLLVMParseCommandLineOptions(size_t argc, const char *const *argv);
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// synchronize with llvm/include/ADT/Triple.h::ArchType
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// synchronize with std.Target.Cpu.Arch
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// synchronize with codegen/llvm/bindings.zig::ArchType
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enum ZigLLVM_ArchType {
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ZigLLVM_UnknownArch,
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ZigLLVM_arm, // ARM (little endian): arm, armv.*, xscale
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ZigLLVM_armeb, // ARM (big endian): armeb
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ZigLLVM_aarch64, // AArch64 (little endian): aarch64
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ZigLLVM_aarch64_be, // AArch64 (big endian): aarch64_be
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ZigLLVM_aarch64_32, // AArch64 (little endian) ILP32: aarch64_32
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ZigLLVM_arc, // ARC: Synopsys ARC
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ZigLLVM_avr, // AVR: Atmel AVR microcontroller
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ZigLLVM_bpfel, // eBPF or extended BPF or 64-bit BPF (little endian)
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ZigLLVM_bpfeb, // eBPF or extended BPF or 64-bit BPF (big endian)
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ZigLLVM_csky, // CSKY: csky
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ZigLLVM_dxil, // DXIL 32-bit DirectX bytecode
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ZigLLVM_hexagon, // Hexagon: hexagon
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ZigLLVM_loongarch32, // LoongArch (32-bit): loongarch32
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ZigLLVM_loongarch64, // LoongArch (64-bit): loongarch64
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ZigLLVM_m68k, // M68k: Motorola 680x0 family
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ZigLLVM_mips, // MIPS: mips, mipsallegrex, mipsr6
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ZigLLVM_mipsel, // MIPSEL: mipsel, mipsallegrexe, mipsr6el
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ZigLLVM_mips64, // MIPS64: mips64, mips64r6, mipsn32, mipsn32r6
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ZigLLVM_mips64el, // MIPS64EL: mips64el, mips64r6el, mipsn32el, mipsn32r6el
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ZigLLVM_msp430, // MSP430: msp430
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ZigLLVM_ppc, // PPC: powerpc
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ZigLLVM_ppcle, // PPCLE: powerpc (little endian)
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ZigLLVM_ppc64, // PPC64: powerpc64, ppu
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ZigLLVM_ppc64le, // PPC64LE: powerpc64le
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ZigLLVM_r600, // R600: AMD GPUs HD2XXX - HD6XXX
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ZigLLVM_amdgcn, // AMDGCN: AMD GCN GPUs
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ZigLLVM_riscv32, // RISC-V (32-bit): riscv32
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ZigLLVM_riscv64, // RISC-V (64-bit): riscv64
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ZigLLVM_sparc, // Sparc: sparc
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ZigLLVM_sparcv9, // Sparcv9: Sparcv9
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ZigLLVM_sparcel, // Sparc: (endianness = little). NB: 'Sparcle' is a CPU variant
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ZigLLVM_systemz, // SystemZ: s390x
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ZigLLVM_tce, // TCE (http://tce.cs.tut.fi/): tce
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ZigLLVM_tcele, // TCE little endian (http://tce.cs.tut.fi/): tcele
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ZigLLVM_thumb, // Thumb (little endian): thumb, thumbv.*
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ZigLLVM_thumbeb, // Thumb (big endian): thumbeb
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ZigLLVM_x86, // X86: i[3-9]86
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ZigLLVM_x86_64, // X86-64: amd64, x86_64
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ZigLLVM_xcore, // XCore: xcore
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ZigLLVM_xtensa, // Tensilica: Xtensa
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ZigLLVM_nvptx, // NVPTX: 32-bit
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ZigLLVM_nvptx64, // NVPTX: 64-bit
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ZigLLVM_le32, // le32: generic little-endian 32-bit CPU (PNaCl)
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ZigLLVM_le64, // le64: generic little-endian 64-bit CPU (PNaCl)
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ZigLLVM_amdil, // AMDIL
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ZigLLVM_amdil64, // AMDIL with 64-bit pointers
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ZigLLVM_hsail, // AMD HSAIL
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ZigLLVM_hsail64, // AMD HSAIL with 64-bit pointers
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ZigLLVM_spir, // SPIR: standard portable IR for OpenCL 32-bit version
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ZigLLVM_spir64, // SPIR: standard portable IR for OpenCL 64-bit version
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ZigLLVM_spirv, // SPIR-V with logical memory layout.
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ZigLLVM_spirv32, // SPIR-V with 32-bit pointers
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ZigLLVM_spirv64, // SPIR-V with 64-bit pointers
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ZigLLVM_kalimba, // Kalimba: generic kalimba
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ZigLLVM_shave, // SHAVE: Movidius vector VLIW processors
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ZigLLVM_lanai, // Lanai: Lanai 32-bit
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ZigLLVM_wasm32, // WebAssembly with 32-bit pointers
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ZigLLVM_wasm64, // WebAssembly with 64-bit pointers
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ZigLLVM_renderscript32, // 32-bit RenderScript
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ZigLLVM_renderscript64, // 64-bit RenderScript
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ZigLLVM_ve, // NEC SX-Aurora Vector Engine
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ZigLLVM_LastArchType = ZigLLVM_ve
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};
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enum ZigLLVM_VendorType {
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ZigLLVM_UnknownVendor,
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ZigLLVM_Apple,
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ZigLLVM_PC,
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ZigLLVM_SCEI,
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ZigLLVM_Freescale,
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ZigLLVM_IBM,
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ZigLLVM_ImaginationTechnologies,
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ZigLLVM_MipsTechnologies,
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ZigLLVM_NVIDIA,
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ZigLLVM_CSR,
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ZigLLVM_AMD,
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ZigLLVM_Mesa,
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ZigLLVM_SUSE,
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ZigLLVM_OpenEmbedded,
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ZigLLVM_LastVendorType = ZigLLVM_OpenEmbedded
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};
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// synchronize with llvm/include/ADT/Triple.h::OsType
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// synchronize with std.Target.Os.Tag
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// synchronize with codegen/llvm/bindings.zig::OsType
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enum ZigLLVM_OSType {
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ZigLLVM_UnknownOS,
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ZigLLVM_Darwin,
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ZigLLVM_DragonFly,
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ZigLLVM_FreeBSD,
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ZigLLVM_Fuchsia,
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ZigLLVM_IOS,
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ZigLLVM_KFreeBSD,
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ZigLLVM_Linux,
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ZigLLVM_Lv2, // PS3
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ZigLLVM_MacOSX,
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ZigLLVM_NetBSD,
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ZigLLVM_OpenBSD,
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ZigLLVM_Solaris,
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ZigLLVM_UEFI,
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ZigLLVM_Win32,
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ZigLLVM_ZOS,
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ZigLLVM_Haiku,
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ZigLLVM_RTEMS,
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ZigLLVM_NaCl, // Native Client
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ZigLLVM_AIX,
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ZigLLVM_CUDA, // NVIDIA CUDA
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ZigLLVM_NVCL, // NVIDIA OpenCL
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ZigLLVM_AMDHSA, // AMD HSA Runtime
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ZigLLVM_PS4,
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ZigLLVM_PS5,
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ZigLLVM_ELFIAMCU,
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ZigLLVM_TvOS, // Apple tvOS
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ZigLLVM_WatchOS, // Apple watchOS
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ZigLLVM_BridgeOS, // Apple bridgeOS
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ZigLLVM_DriverKit, // Apple DriverKit
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ZigLLVM_XROS, // Apple XROS
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ZigLLVM_Mesa3D,
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ZigLLVM_AMDPAL, // AMD PAL Runtime
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ZigLLVM_HermitCore, // HermitCore Unikernel/Multikernel
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ZigLLVM_Hurd, // GNU/Hurd
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ZigLLVM_WASI, // Experimental WebAssembly OS
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ZigLLVM_Emscripten,
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ZigLLVM_ShaderModel, // DirectX ShaderModel
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ZigLLVM_LiteOS,
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ZigLLVM_Serenity,
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ZigLLVM_Vulkan, // Vulkan SPIR-V
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ZigLLVM_LastOSType = ZigLLVM_Vulkan
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};
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// Synchronize with target.cpp::abi_list
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enum ZigLLVM_EnvironmentType {
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ZigLLVM_UnknownEnvironment,
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ZigLLVM_GNU,
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ZigLLVM_GNUABIN32,
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ZigLLVM_GNUABI64,
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ZigLLVM_GNUEABI,
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ZigLLVM_GNUEABIHF,
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ZigLLVM_GNUF32,
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ZigLLVM_GNUF64,
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ZigLLVM_GNUSF,
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ZigLLVM_GNUX32,
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ZigLLVM_GNUILP32,
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ZigLLVM_CODE16,
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ZigLLVM_EABI,
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ZigLLVM_EABIHF,
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ZigLLVM_Android,
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ZigLLVM_Musl,
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ZigLLVM_MuslEABI,
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ZigLLVM_MuslEABIHF,
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ZigLLVM_MuslX32,
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ZigLLVM_MSVC,
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ZigLLVM_Itanium,
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ZigLLVM_Cygnus,
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ZigLLVM_CoreCLR,
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ZigLLVM_Simulator, // Simulator variants of other systems, e.g., Apple's iOS
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ZigLLVM_MacABI, // Mac Catalyst variant of Apple's iOS deployment target.
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ZigLLVM_Pixel,
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ZigLLVM_Vertex,
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ZigLLVM_Geometry,
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ZigLLVM_Hull,
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ZigLLVM_Domain,
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ZigLLVM_Compute,
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ZigLLVM_Library,
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ZigLLVM_RayGeneration,
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ZigLLVM_Intersection,
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ZigLLVM_AnyHit,
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ZigLLVM_ClosestHit,
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ZigLLVM_Miss,
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ZigLLVM_Callable,
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ZigLLVM_Mesh,
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ZigLLVM_Amplification,
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ZigLLVM_OpenCL,
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ZigLLVM_OpenHOS,
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ZigLLVM_PAuthTest,
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ZigLLVM_LastEnvironmentType = ZigLLVM_PAuthTest
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};
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enum ZigLLVM_ObjectFormatType {
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ZigLLVM_UnknownObjectFormat,
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ZigLLVM_COFF,
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ZigLLVM_DXContainer,
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ZigLLVM_ELF,
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ZigLLVM_GOFF,
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ZigLLVM_MachO,
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ZigLLVM_SPIRV,
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ZigLLVM_Wasm,
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ZigLLVM_XCOFF,
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};
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#define ZigLLVM_DIFlags_Zero 0U
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#define ZigLLVM_DIFlags_Private 1U
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#define ZigLLVM_DIFlags_Protected 2U
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#define ZigLLVM_DIFlags_Public 3U
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#define ZigLLVM_DIFlags_FwdDecl (1U << 2)
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#define ZigLLVM_DIFlags_AppleBlock (1U << 3)
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#define ZigLLVM_DIFlags_BlockByrefStruct (1U << 4)
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#define ZigLLVM_DIFlags_Virtual (1U << 5)
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#define ZigLLVM_DIFlags_Artificial (1U << 6)
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#define ZigLLVM_DIFlags_Explicit (1U << 7)
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#define ZigLLVM_DIFlags_Prototyped (1U << 8)
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#define ZigLLVM_DIFlags_ObjcClassComplete (1U << 9)
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#define ZigLLVM_DIFlags_ObjectPointer (1U << 10)
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#define ZigLLVM_DIFlags_Vector (1U << 11)
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#define ZigLLVM_DIFlags_StaticMember (1U << 12)
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#define ZigLLVM_DIFlags_LValueReference (1U << 13)
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#define ZigLLVM_DIFlags_RValueReference (1U << 14)
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#define ZigLLVM_DIFlags_Reserved (1U << 15)
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#define ZigLLVM_DIFlags_SingleInheritance (1U << 16)
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#define ZigLLVM_DIFlags_MultipleInheritance (2 << 16)
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#define ZigLLVM_DIFlags_VirtualInheritance (3 << 16)
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#define ZigLLVM_DIFlags_IntroducedVirtual (1U << 18)
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#define ZigLLVM_DIFlags_BitField (1U << 19)
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#define ZigLLVM_DIFlags_NoReturn (1U << 20)
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#define ZigLLVM_DIFlags_TypePassByValue (1U << 22)
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#define ZigLLVM_DIFlags_TypePassByReference (1U << 23)
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#define ZigLLVM_DIFlags_EnumClass (1U << 24)
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#define ZigLLVM_DIFlags_Thunk (1U << 25)
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#define ZigLLVM_DIFlags_NonTrivial (1U << 26)
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#define ZigLLVM_DIFlags_BigEndian (1U << 27)
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#define ZigLLVM_DIFlags_LittleEndian (1U << 28)
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#define ZigLLVM_DIFlags_AllCallsDescribed (1U << 29)
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ZIG_EXTERN_C bool ZigLLDLinkCOFF(int argc, const char **argv, bool can_exit_early, bool disable_output);
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ZIG_EXTERN_C bool ZigLLDLinkELF(int argc, const char **argv, bool can_exit_early, bool disable_output);
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ZIG_EXTERN_C bool ZigLLDLinkWasm(int argc, const char **argv, bool can_exit_early, bool disable_output);
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ZIG_EXTERN_C bool ZigLLVMWriteArchive(const char *archive_name, const char **file_names, size_t file_name_count,
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enum ZigLLVM_OSType os_type);
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ZIG_EXTERN_C bool ZigLLVMWriteImportLibrary(const char *def_path, const enum ZigLLVM_ArchType arch,
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const char *output_lib_path, bool kill_at);
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#endif
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