zig/lib/std/target/feature/MipsFeature.zig
2020-01-19 20:53:15 -05:00

239 lines
9.0 KiB
Zig

const FeatureInfo = @import("std").target.feature.FeatureInfo;
pub const MipsFeature = enum {
Abs2008,
Crc,
Cnmips,
Dsp,
Dspr2,
Dspr3,
Eva,
Fp64,
Fpxx,
Ginv,
Gp64,
LongCalls,
Msa,
Mt,
Nomadd4,
Micromips,
Mips1,
Mips2,
Mips3,
Mips3_32,
Mips3_32r2,
Mips4,
Mips4_32,
Mips4_32r2,
Mips5,
Mips5_32r2,
Mips16,
Mips32,
Mips32r2,
Mips32r3,
Mips32r5,
Mips32r6,
Mips64,
Mips64r2,
Mips64r3,
Mips64r5,
Mips64r6,
Nan2008,
Noabicalls,
Nooddspreg,
Ptr64,
SingleFloat,
SoftFloat,
Sym32,
UseIndirectJumpHazard,
UseTccInDiv,
Vfpu,
Virt,
Xgot,
P5600,
pub fn getInfo(self: @This()) FeatureInfo {
return feature_infos[@enumToInt(self)];
}
pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) {
FeatureInfo(@This()).create(.Abs2008, "abs2008", "Disable IEEE 754-2008 abs.fmt mode", "abs2008"),
FeatureInfo(@This()).create(.Crc, "crc", "Mips R6 CRC ASE", "crc"),
FeatureInfo(@This()).createWithSubfeatures(.Cnmips, "cnmips", "Octeon cnMIPS Support", "cnmips", &[_]@This() {
.Mips3_32,
.Fp64,
.Mips4_32r2,
.Mips3_32r2,
.Mips1,
.Mips4_32,
.Gp64,
.Mips5_32r2,
}),
FeatureInfo(@This()).create(.Dsp, "dsp", "Mips DSP ASE", "dsp"),
FeatureInfo(@This()).createWithSubfeatures(.Dspr2, "dspr2", "Mips DSP-R2 ASE", "dspr2", &[_]@This() {
.Dsp,
}),
FeatureInfo(@This()).createWithSubfeatures(.Dspr3, "dspr3", "Mips DSP-R3 ASE", "dspr3", &[_]@This() {
.Dsp,
}),
FeatureInfo(@This()).create(.Eva, "eva", "Mips EVA ASE", "eva"),
FeatureInfo(@This()).create(.Fp64, "fp64", "Support 64-bit FP registers", "fp64"),
FeatureInfo(@This()).create(.Fpxx, "fpxx", "Support for FPXX", "fpxx"),
FeatureInfo(@This()).create(.Ginv, "ginv", "Mips Global Invalidate ASE", "ginv"),
FeatureInfo(@This()).create(.Gp64, "gp64", "General Purpose Registers are 64-bit wide", "gp64"),
FeatureInfo(@This()).create(.LongCalls, "long-calls", "Disable use of the jal instruction", "long-calls"),
FeatureInfo(@This()).create(.Msa, "msa", "Mips MSA ASE", "msa"),
FeatureInfo(@This()).create(.Mt, "mt", "Mips MT ASE", "mt"),
FeatureInfo(@This()).create(.Nomadd4, "nomadd4", "Disable 4-operand madd.fmt and related instructions", "nomadd4"),
FeatureInfo(@This()).create(.Micromips, "micromips", "microMips mode", "micromips"),
FeatureInfo(@This()).create(.Mips1, "mips1", "Mips I ISA Support [highly experimental]", "mips1"),
FeatureInfo(@This()).createWithSubfeatures(.Mips2, "mips2", "Mips II ISA Support [highly experimental]", "mips2", &[_]@This() {
.Mips1,
}),
FeatureInfo(@This()).createWithSubfeatures(.Mips3, "mips3", "MIPS III ISA Support [highly experimental]", "mips3", &[_]@This() {
.Mips3_32,
.Fp64,
.Mips3_32r2,
.Mips1,
.Gp64,
}),
FeatureInfo(@This()).create(.Mips3_32, "mips3_32", "Subset of MIPS-III that is also in MIPS32 [highly experimental]", "mips3_32"),
FeatureInfo(@This()).create(.Mips3_32r2, "mips3_32r2", "Subset of MIPS-III that is also in MIPS32r2 [highly experimental]", "mips3_32r2"),
FeatureInfo(@This()).createWithSubfeatures(.Mips4, "mips4", "MIPS IV ISA Support", "mips4", &[_]@This() {
.Mips3_32,
.Fp64,
.Mips4_32r2,
.Mips3_32r2,
.Mips1,
.Mips4_32,
.Gp64,
}),
FeatureInfo(@This()).create(.Mips4_32, "mips4_32", "Subset of MIPS-IV that is also in MIPS32 [highly experimental]", "mips4_32"),
FeatureInfo(@This()).create(.Mips4_32r2, "mips4_32r2", "Subset of MIPS-IV that is also in MIPS32r2 [highly experimental]", "mips4_32r2"),
FeatureInfo(@This()).createWithSubfeatures(.Mips5, "mips5", "MIPS V ISA Support [highly experimental]", "mips5", &[_]@This() {
.Mips3_32,
.Fp64,
.Mips4_32r2,
.Mips3_32r2,
.Mips1,
.Mips4_32,
.Gp64,
.Mips5_32r2,
}),
FeatureInfo(@This()).create(.Mips5_32r2, "mips5_32r2", "Subset of MIPS-V that is also in MIPS32r2 [highly experimental]", "mips5_32r2"),
FeatureInfo(@This()).create(.Mips16, "mips16", "Mips16 mode", "mips16"),
FeatureInfo(@This()).createWithSubfeatures(.Mips32, "mips32", "Mips32 ISA Support", "mips32", &[_]@This() {
.Mips3_32,
.Mips4_32,
.Mips1,
}),
FeatureInfo(@This()).createWithSubfeatures(.Mips32r2, "mips32r2", "Mips32r2 ISA Support", "mips32r2", &[_]@This() {
.Mips3_32,
.Mips4_32r2,
.Mips3_32r2,
.Mips1,
.Mips4_32,
.Mips5_32r2,
}),
FeatureInfo(@This()).createWithSubfeatures(.Mips32r3, "mips32r3", "Mips32r3 ISA Support", "mips32r3", &[_]@This() {
.Mips3_32,
.Mips4_32r2,
.Mips3_32r2,
.Mips1,
.Mips4_32,
.Mips5_32r2,
}),
FeatureInfo(@This()).createWithSubfeatures(.Mips32r5, "mips32r5", "Mips32r5 ISA Support", "mips32r5", &[_]@This() {
.Mips3_32,
.Mips4_32r2,
.Mips3_32r2,
.Mips1,
.Mips4_32,
.Mips5_32r2,
}),
FeatureInfo(@This()).createWithSubfeatures(.Mips32r6, "mips32r6", "Mips32r6 ISA Support [experimental]", "mips32r6", &[_]@This() {
.Mips3_32,
.Fp64,
.Mips4_32r2,
.Abs2008,
.Mips3_32r2,
.Mips1,
.Mips4_32,
.Nan2008,
.Mips5_32r2,
}),
FeatureInfo(@This()).createWithSubfeatures(.Mips64, "mips64", "Mips64 ISA Support", "mips64", &[_]@This() {
.Mips3_32,
.Fp64,
.Mips4_32r2,
.Mips3_32r2,
.Mips1,
.Mips4_32,
.Gp64,
.Mips5_32r2,
}),
FeatureInfo(@This()).createWithSubfeatures(.Mips64r2, "mips64r2", "Mips64r2 ISA Support", "mips64r2", &[_]@This() {
.Mips3_32,
.Fp64,
.Mips4_32r2,
.Mips3_32r2,
.Mips1,
.Mips4_32,
.Gp64,
.Mips5_32r2,
}),
FeatureInfo(@This()).createWithSubfeatures(.Mips64r3, "mips64r3", "Mips64r3 ISA Support", "mips64r3", &[_]@This() {
.Mips3_32,
.Fp64,
.Mips4_32r2,
.Mips3_32r2,
.Mips1,
.Mips4_32,
.Gp64,
.Mips5_32r2,
}),
FeatureInfo(@This()).createWithSubfeatures(.Mips64r5, "mips64r5", "Mips64r5 ISA Support", "mips64r5", &[_]@This() {
.Mips3_32,
.Fp64,
.Mips4_32r2,
.Mips3_32r2,
.Mips1,
.Mips4_32,
.Gp64,
.Mips5_32r2,
}),
FeatureInfo(@This()).createWithSubfeatures(.Mips64r6, "mips64r6", "Mips64r6 ISA Support [experimental]", "mips64r6", &[_]@This() {
.Mips3_32,
.Fp64,
.Mips4_32r2,
.Abs2008,
.Mips3_32r2,
.Mips1,
.Mips4_32,
.Nan2008,
.Gp64,
.Mips5_32r2,
}),
FeatureInfo(@This()).create(.Nan2008, "nan2008", "IEEE 754-2008 NaN encoding", "nan2008"),
FeatureInfo(@This()).create(.Noabicalls, "noabicalls", "Disable SVR4-style position-independent code", "noabicalls"),
FeatureInfo(@This()).create(.Nooddspreg, "nooddspreg", "Disable odd numbered single-precision registers", "nooddspreg"),
FeatureInfo(@This()).create(.Ptr64, "ptr64", "Pointers are 64-bit wide", "ptr64"),
FeatureInfo(@This()).create(.SingleFloat, "single-float", "Only supports single precision float", "single-float"),
FeatureInfo(@This()).create(.SoftFloat, "soft-float", "Does not support floating point instructions", "soft-float"),
FeatureInfo(@This()).create(.Sym32, "sym32", "Symbols are 32 bit on Mips64", "sym32"),
FeatureInfo(@This()).create(.UseIndirectJumpHazard, "use-indirect-jump-hazard", "Use indirect jump guards to prevent certain speculation based attacks", "use-indirect-jump-hazard"),
FeatureInfo(@This()).create(.UseTccInDiv, "use-tcc-in-div", "Force the assembler to use trapping", "use-tcc-in-div"),
FeatureInfo(@This()).create(.Vfpu, "vfpu", "Enable vector FPU instructions", "vfpu"),
FeatureInfo(@This()).create(.Virt, "virt", "Mips Virtualization ASE", "virt"),
FeatureInfo(@This()).create(.Xgot, "xgot", "Assume 32-bit GOT", "xgot"),
FeatureInfo(@This()).createWithSubfeatures(.P5600, "p5600", "The P5600 Processor", "p5600", &[_]@This() {
.Mips3_32,
.Mips4_32r2,
.Mips3_32r2,
.Mips1,
.Mips4_32,
.Mips5_32r2,
}),
};
};