zig/lib/std/target/cpu/PowerPcCpu.zig
2020-01-19 20:53:15 -05:00

452 lines
10 KiB
Zig

const feature = @import("std").target.feature;
const CpuInfo = @import("std").target.cpu.CpuInfo;
pub const PowerPcCpu = enum {
440,
450,
601,
602,
603,
E603,
Ev603,
604,
E604,
620,
7400,
7450,
750,
970,
A2,
A2q,
E500,
E500mc,
E5500,
G3,
G4,
G4+,
G5,
Generic,
Ppc,
Ppc32,
Ppc64,
Ppc64le,
Pwr3,
Pwr4,
Pwr5,
Pwr5x,
Pwr6,
Pwr6x,
Pwr7,
Pwr8,
Pwr9,
pub fn getInfo(self: @This()) CpuInfo {
return cpu_infos[@enumToInt(self)];
}
pub const FeatureType = feature.PowerPcFeature;
const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) {
CpuInfo(@This()).create(.440, "440", &[_]FeatureType {
.Icbt,
.Booke,
.HardFloat,
.Fres,
.Frsqrte,
.Isel,
.Msync,
},
CpuInfo(@This()).create(.450, "450", &[_]FeatureType {
.Icbt,
.Booke,
.HardFloat,
.Fres,
.Frsqrte,
.Isel,
.Msync,
},
CpuInfo(@This()).create(.601, "601", &[_]FeatureType {
.HardFloat,
.Fpu,
},
CpuInfo(@This()).create(.602, "602", &[_]FeatureType {
.HardFloat,
.Fpu,
},
CpuInfo(@This()).create(.603, "603", &[_]FeatureType {
.HardFloat,
.Fres,
.Frsqrte,
},
CpuInfo(@This()).create(.E603, "603e", &[_]FeatureType {
.HardFloat,
.Fres,
.Frsqrte,
},
CpuInfo(@This()).create(.Ev603, "603ev", &[_]FeatureType {
.HardFloat,
.Fres,
.Frsqrte,
},
CpuInfo(@This()).create(.604, "604", &[_]FeatureType {
.HardFloat,
.Fres,
.Frsqrte,
},
CpuInfo(@This()).create(.E604, "604e", &[_]FeatureType {
.HardFloat,
.Fres,
.Frsqrte,
},
CpuInfo(@This()).create(.620, "620", &[_]FeatureType {
.HardFloat,
.Fres,
.Frsqrte,
},
CpuInfo(@This()).create(.7400, "7400", &[_]FeatureType {
.HardFloat,
.Altivec,
.Fres,
.Frsqrte,
},
CpuInfo(@This()).create(.7450, "7450", &[_]FeatureType {
.HardFloat,
.Altivec,
.Fres,
.Frsqrte,
},
CpuInfo(@This()).create(.750, "750", &[_]FeatureType {
.HardFloat,
.Fres,
.Frsqrte,
},
CpuInfo(@This()).create(.970, "970", &[_]FeatureType {
.Bit64,
.HardFloat,
.Altivec,
.Fres,
.Frsqrte,
.Fsqrt,
.Mfocrf,
.Stfiwx,
},
CpuInfo(@This()).create(.A2, "a2", &[_]FeatureType {
.Bit64,
.Icbt,
.Booke,
.Cmpb,
.HardFloat,
.Fcpsgn,
.Fpcvt,
.Fprnd,
.Fre,
.Fres,
.Frsqrte,
.Frsqrtes,
.Fsqrt,
.Isel,
.Ldbrx,
.Lfiwax,
.Mfocrf,
.Recipprec,
.Stfiwx,
.SlowPopcntd,
},
CpuInfo(@This()).create(.A2q, "a2q", &[_]FeatureType {
.Bit64,
.Icbt,
.Booke,
.Cmpb,
.HardFloat,
.Fcpsgn,
.Fpcvt,
.Fprnd,
.Fre,
.Fres,
.Frsqrte,
.Frsqrtes,
.Fsqrt,
.Isel,
.Ldbrx,
.Lfiwax,
.Mfocrf,
.Qpx,
.Recipprec,
.Stfiwx,
.SlowPopcntd,
},
CpuInfo(@This()).create(.E500, "e500", &[_]FeatureType {
.Icbt,
.Booke,
.Isel,
},
CpuInfo(@This()).create(.E500mc, "e500mc", &[_]FeatureType {
.Icbt,
.Booke,
.Isel,
.HardFloat,
.Stfiwx,
},
CpuInfo(@This()).create(.E5500, "e5500", &[_]FeatureType {
.Bit64,
.Icbt,
.Booke,
.Isel,
.Mfocrf,
.HardFloat,
.Stfiwx,
},
CpuInfo(@This()).create(.G3, "g3", &[_]FeatureType {
.HardFloat,
.Fres,
.Frsqrte,
},
CpuInfo(@This()).create(.G4, "g4", &[_]FeatureType {
.HardFloat,
.Altivec,
.Fres,
.Frsqrte,
},
CpuInfo(@This()).create(.G4+, "g4+", &[_]FeatureType {
.HardFloat,
.Altivec,
.Fres,
.Frsqrte,
},
CpuInfo(@This()).create(.G5, "g5", &[_]FeatureType {
.Bit64,
.HardFloat,
.Altivec,
.Fres,
.Frsqrte,
.Fsqrt,
.Mfocrf,
.Stfiwx,
},
CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType {
.HardFloat,
},
CpuInfo(@This()).create(.Ppc, "ppc", &[_]FeatureType {
.HardFloat,
},
CpuInfo(@This()).create(.Ppc32, "ppc32", &[_]FeatureType {
.HardFloat,
},
CpuInfo(@This()).create(.Ppc64, "ppc64", &[_]FeatureType {
.Bit64,
.HardFloat,
.Altivec,
.Fres,
.Frsqrte,
.Fsqrt,
.Mfocrf,
.Stfiwx,
},
CpuInfo(@This()).create(.Ppc64le, "ppc64le", &[_]FeatureType {
.Bit64,
.HardFloat,
.Altivec,
.Bpermd,
.Cmpb,
.DirectMove,
.Extdiv,
.Fcpsgn,
.Fpcvt,
.Fprnd,
.Fre,
.Fres,
.Frsqrte,
.Frsqrtes,
.Fsqrt,
.Htm,
.Icbt,
.Isel,
.Ldbrx,
.Lfiwax,
.Mfocrf,
.Power8Altivec,
.Crypto,
.Power8Vector,
.Popcntd,
.PartwordAtomics,
.Recipprec,
.Stfiwx,
.TwoConstNr,
.Vsx,
},
CpuInfo(@This()).create(.Pwr3, "pwr3", &[_]FeatureType {
.Bit64,
.HardFloat,
.Altivec,
.Fres,
.Frsqrte,
.Mfocrf,
.Stfiwx,
},
CpuInfo(@This()).create(.Pwr4, "pwr4", &[_]FeatureType {
.Bit64,
.HardFloat,
.Altivec,
.Fres,
.Frsqrte,
.Fsqrt,
.Mfocrf,
.Stfiwx,
},
CpuInfo(@This()).create(.Pwr5, "pwr5", &[_]FeatureType {
.Bit64,
.HardFloat,
.Altivec,
.Fre,
.Fres,
.Frsqrte,
.Frsqrtes,
.Fsqrt,
.Mfocrf,
.Stfiwx,
},
CpuInfo(@This()).create(.Pwr5x, "pwr5x", &[_]FeatureType {
.Bit64,
.HardFloat,
.Altivec,
.Fprnd,
.Fre,
.Fres,
.Frsqrte,
.Frsqrtes,
.Fsqrt,
.Mfocrf,
.Stfiwx,
},
CpuInfo(@This()).create(.Pwr6, "pwr6", &[_]FeatureType {
.Bit64,
.HardFloat,
.Altivec,
.Cmpb,
.Fcpsgn,
.Fprnd,
.Fre,
.Fres,
.Frsqrte,
.Frsqrtes,
.Fsqrt,
.Lfiwax,
.Mfocrf,
.Recipprec,
.Stfiwx,
},
CpuInfo(@This()).create(.Pwr6x, "pwr6x", &[_]FeatureType {
.Bit64,
.HardFloat,
.Altivec,
.Cmpb,
.Fcpsgn,
.Fprnd,
.Fre,
.Fres,
.Frsqrte,
.Frsqrtes,
.Fsqrt,
.Lfiwax,
.Mfocrf,
.Recipprec,
.Stfiwx,
},
CpuInfo(@This()).create(.Pwr7, "pwr7", &[_]FeatureType {
.Bit64,
.HardFloat,
.Altivec,
.Bpermd,
.Cmpb,
.Extdiv,
.Fcpsgn,
.Fpcvt,
.Fprnd,
.Fre,
.Fres,
.Frsqrte,
.Frsqrtes,
.Fsqrt,
.Isel,
.Ldbrx,
.Lfiwax,
.Mfocrf,
.Popcntd,
.Recipprec,
.Stfiwx,
.TwoConstNr,
.Vsx,
},
CpuInfo(@This()).create(.Pwr8, "pwr8", &[_]FeatureType {
.Bit64,
.HardFloat,
.Altivec,
.Bpermd,
.Cmpb,
.DirectMove,
.Extdiv,
.Fcpsgn,
.Fpcvt,
.Fprnd,
.Fre,
.Fres,
.Frsqrte,
.Frsqrtes,
.Fsqrt,
.Htm,
.Icbt,
.Isel,
.Ldbrx,
.Lfiwax,
.Mfocrf,
.Power8Altivec,
.Crypto,
.Power8Vector,
.Popcntd,
.PartwordAtomics,
.Recipprec,
.Stfiwx,
.TwoConstNr,
.Vsx,
},
CpuInfo(@This()).create(.Pwr9, "pwr9", &[_]FeatureType {
.Bit64,
.HardFloat,
.Altivec,
.Bpermd,
.Cmpb,
.DirectMove,
.Extdiv,
.Fcpsgn,
.Fpcvt,
.Fprnd,
.Fre,
.Fres,
.Frsqrte,
.Frsqrtes,
.Fsqrt,
.Htm,
.Icbt,
.IsaV30Instructions,
.Isel,
.Ldbrx,
.Lfiwax,
.Mfocrf,
.Power8Altivec,
.Crypto,
.Power8Vector,
.Power9Altivec,
.Power9Vector,
.Popcntd,
.PpcPostraSched,
.PpcPreraSched,
.PartwordAtomics,
.Recipprec,
.Stfiwx,
.TwoConstNr,
.Vsx,
.VectorsUseTwoUnits,
},
};
};