mirror of
https://github.com/ziglang/zig.git
synced 2025-12-06 14:23:09 +00:00
795e7c64d5
The goals of this branch are to: * compile faster when using the wasm linker and backend * enable saving compiler state by directly copying in-memory linker state to disk. * more efficient compiler memory utilization * introduce integer type safety to wasm linker code * generate better WebAssembly code * fully participate in incremental compilation * do as much work as possible outside of flush(), while continuing to do linker garbage collection. * avoid unnecessary heap allocations * avoid unnecessary indirect function calls In order to accomplish this goals, this removes the ZigObject abstraction, as well as Symbol and Atom. These abstractions resulted in overly generic code, doing unnecessary work, and needless complications that simply go away by creating a better in-memory data model and emitting more things lazily. For example, this makes wasm codegen emit MIR which is then lowered to wasm code during linking, with optimal function indexes etc, or relocations are emitted if outputting an object. Previously, this would always emit relocations, which are fully unnecessary when emitting an executable, and required all function calls to use the maximum size LEB encoding. This branch introduces the concept of the "prelink" phase which occurs after all object files have been parsed, but before any Zcu updates are sent to the linker. This allows the linker to fully parse all objects into a compact memory model, which is guaranteed to be complete when Zcu code is generated. This commit is not a complete implementation of all these goals; it is not even passing semantic analysis.
666 lines
17 KiB
Zig
666 lines
17 KiB
Zig
///! Contains all constants and types representing the wasm
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///! binary format, as specified by:
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///! https://webassembly.github.io/spec/core/
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const std = @import("std.zig");
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const testing = std.testing;
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/// Wasm instruction opcodes
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///
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/// All instructions are defined as per spec:
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/// https://webassembly.github.io/spec/core/appendix/index-instructions.html
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pub const Opcode = enum(u8) {
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@"unreachable" = 0x00,
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nop = 0x01,
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block = 0x02,
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loop = 0x03,
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@"if" = 0x04,
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@"else" = 0x05,
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end = 0x0B,
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br = 0x0C,
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br_if = 0x0D,
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br_table = 0x0E,
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@"return" = 0x0F,
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call = 0x10,
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call_indirect = 0x11,
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drop = 0x1A,
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select = 0x1B,
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local_get = 0x20,
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local_set = 0x21,
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local_tee = 0x22,
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global_get = 0x23,
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global_set = 0x24,
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i32_load = 0x28,
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i64_load = 0x29,
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f32_load = 0x2A,
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f64_load = 0x2B,
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i32_load8_s = 0x2C,
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i32_load8_u = 0x2D,
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i32_load16_s = 0x2E,
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i32_load16_u = 0x2F,
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i64_load8_s = 0x30,
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i64_load8_u = 0x31,
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i64_load16_s = 0x32,
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i64_load16_u = 0x33,
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i64_load32_s = 0x34,
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i64_load32_u = 0x35,
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i32_store = 0x36,
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i64_store = 0x37,
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f32_store = 0x38,
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f64_store = 0x39,
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i32_store8 = 0x3A,
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i32_store16 = 0x3B,
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i64_store8 = 0x3C,
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i64_store16 = 0x3D,
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i64_store32 = 0x3E,
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memory_size = 0x3F,
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memory_grow = 0x40,
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i32_const = 0x41,
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i64_const = 0x42,
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f32_const = 0x43,
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f64_const = 0x44,
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i32_eqz = 0x45,
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i32_eq = 0x46,
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i32_ne = 0x47,
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i32_lt_s = 0x48,
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i32_lt_u = 0x49,
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i32_gt_s = 0x4A,
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i32_gt_u = 0x4B,
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i32_le_s = 0x4C,
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i32_le_u = 0x4D,
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i32_ge_s = 0x4E,
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i32_ge_u = 0x4F,
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i64_eqz = 0x50,
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i64_eq = 0x51,
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i64_ne = 0x52,
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i64_lt_s = 0x53,
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i64_lt_u = 0x54,
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i64_gt_s = 0x55,
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i64_gt_u = 0x56,
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i64_le_s = 0x57,
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i64_le_u = 0x58,
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i64_ge_s = 0x59,
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i64_ge_u = 0x5A,
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f32_eq = 0x5B,
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f32_ne = 0x5C,
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f32_lt = 0x5D,
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f32_gt = 0x5E,
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f32_le = 0x5F,
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f32_ge = 0x60,
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f64_eq = 0x61,
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f64_ne = 0x62,
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f64_lt = 0x63,
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f64_gt = 0x64,
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f64_le = 0x65,
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f64_ge = 0x66,
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i32_clz = 0x67,
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i32_ctz = 0x68,
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i32_popcnt = 0x69,
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i32_add = 0x6A,
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i32_sub = 0x6B,
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i32_mul = 0x6C,
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i32_div_s = 0x6D,
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i32_div_u = 0x6E,
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i32_rem_s = 0x6F,
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i32_rem_u = 0x70,
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i32_and = 0x71,
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i32_or = 0x72,
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i32_xor = 0x73,
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i32_shl = 0x74,
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i32_shr_s = 0x75,
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i32_shr_u = 0x76,
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i32_rotl = 0x77,
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i32_rotr = 0x78,
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i64_clz = 0x79,
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i64_ctz = 0x7A,
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i64_popcnt = 0x7B,
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i64_add = 0x7C,
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i64_sub = 0x7D,
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i64_mul = 0x7E,
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i64_div_s = 0x7F,
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i64_div_u = 0x80,
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i64_rem_s = 0x81,
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i64_rem_u = 0x82,
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i64_and = 0x83,
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i64_or = 0x84,
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i64_xor = 0x85,
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i64_shl = 0x86,
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i64_shr_s = 0x87,
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i64_shr_u = 0x88,
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i64_rotl = 0x89,
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i64_rotr = 0x8A,
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f32_abs = 0x8B,
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f32_neg = 0x8C,
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f32_ceil = 0x8D,
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f32_floor = 0x8E,
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f32_trunc = 0x8F,
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f32_nearest = 0x90,
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f32_sqrt = 0x91,
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f32_add = 0x92,
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f32_sub = 0x93,
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f32_mul = 0x94,
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f32_div = 0x95,
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f32_min = 0x96,
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f32_max = 0x97,
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f32_copysign = 0x98,
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f64_abs = 0x99,
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f64_neg = 0x9A,
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f64_ceil = 0x9B,
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f64_floor = 0x9C,
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f64_trunc = 0x9D,
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f64_nearest = 0x9E,
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f64_sqrt = 0x9F,
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f64_add = 0xA0,
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f64_sub = 0xA1,
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f64_mul = 0xA2,
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f64_div = 0xA3,
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f64_min = 0xA4,
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f64_max = 0xA5,
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f64_copysign = 0xA6,
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i32_wrap_i64 = 0xA7,
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i32_trunc_f32_s = 0xA8,
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i32_trunc_f32_u = 0xA9,
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i32_trunc_f64_s = 0xAA,
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i32_trunc_f64_u = 0xAB,
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i64_extend_i32_s = 0xAC,
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i64_extend_i32_u = 0xAD,
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i64_trunc_f32_s = 0xAE,
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i64_trunc_f32_u = 0xAF,
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i64_trunc_f64_s = 0xB0,
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i64_trunc_f64_u = 0xB1,
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f32_convert_i32_s = 0xB2,
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f32_convert_i32_u = 0xB3,
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f32_convert_i64_s = 0xB4,
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f32_convert_i64_u = 0xB5,
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f32_demote_f64 = 0xB6,
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f64_convert_i32_s = 0xB7,
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f64_convert_i32_u = 0xB8,
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f64_convert_i64_s = 0xB9,
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f64_convert_i64_u = 0xBA,
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f64_promote_f32 = 0xBB,
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i32_reinterpret_f32 = 0xBC,
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i64_reinterpret_f64 = 0xBD,
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f32_reinterpret_i32 = 0xBE,
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f64_reinterpret_i64 = 0xBF,
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i32_extend8_s = 0xC0,
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i32_extend16_s = 0xC1,
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i64_extend8_s = 0xC2,
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i64_extend16_s = 0xC3,
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i64_extend32_s = 0xC4,
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misc_prefix = 0xFC,
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simd_prefix = 0xFD,
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atomics_prefix = 0xFE,
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_,
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};
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/// Opcodes that require a prefix `0xFC`.
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/// Each opcode represents a varuint32, meaning
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/// they are encoded as leb128 in binary.
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pub const MiscOpcode = enum(u32) {
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i32_trunc_sat_f32_s = 0x00,
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i32_trunc_sat_f32_u = 0x01,
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i32_trunc_sat_f64_s = 0x02,
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i32_trunc_sat_f64_u = 0x03,
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i64_trunc_sat_f32_s = 0x04,
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i64_trunc_sat_f32_u = 0x05,
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i64_trunc_sat_f64_s = 0x06,
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i64_trunc_sat_f64_u = 0x07,
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memory_init = 0x08,
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data_drop = 0x09,
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memory_copy = 0x0A,
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memory_fill = 0x0B,
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table_init = 0x0C,
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elem_drop = 0x0D,
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table_copy = 0x0E,
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table_grow = 0x0F,
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table_size = 0x10,
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table_fill = 0x11,
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_,
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};
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/// Simd opcodes that require a prefix `0xFD`.
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/// Each opcode represents a varuint32, meaning
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/// they are encoded as leb128 in binary.
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pub const SimdOpcode = enum(u32) {
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v128_load = 0x00,
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v128_load8x8_s = 0x01,
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v128_load8x8_u = 0x02,
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v128_load16x4_s = 0x03,
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v128_load16x4_u = 0x04,
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v128_load32x2_s = 0x05,
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v128_load32x2_u = 0x06,
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v128_load8_splat = 0x07,
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v128_load16_splat = 0x08,
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v128_load32_splat = 0x09,
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v128_load64_splat = 0x0A,
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v128_store = 0x0B,
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v128_const = 0x0C,
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i8x16_shuffle = 0x0D,
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i8x16_swizzle = 0x0E,
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i8x16_splat = 0x0F,
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i16x8_splat = 0x10,
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i32x4_splat = 0x11,
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i64x2_splat = 0x12,
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f32x4_splat = 0x13,
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f64x2_splat = 0x14,
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i8x16_extract_lane_s = 0x15,
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i8x16_extract_lane_u = 0x16,
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i8x16_replace_lane = 0x17,
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i16x8_extract_lane_s = 0x18,
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i16x8_extract_lane_u = 0x19,
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i16x8_replace_lane = 0x1A,
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i32x4_extract_lane = 0x1B,
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i32x4_replace_lane = 0x1C,
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i64x2_extract_lane = 0x1D,
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i64x2_replace_lane = 0x1E,
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f32x4_extract_lane = 0x1F,
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f32x4_replace_lane = 0x20,
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f64x2_extract_lane = 0x21,
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f64x2_replace_lane = 0x22,
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i8x16_eq = 0x23,
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i16x8_eq = 0x2D,
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i32x4_eq = 0x37,
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i8x16_ne = 0x24,
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i16x8_ne = 0x2E,
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i32x4_ne = 0x38,
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i8x16_lt_s = 0x25,
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i16x8_lt_s = 0x2F,
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i32x4_lt_s = 0x39,
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i8x16_lt_u = 0x26,
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i16x8_lt_u = 0x30,
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i32x4_lt_u = 0x3A,
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i8x16_gt_s = 0x27,
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i16x8_gt_s = 0x31,
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i32x4_gt_s = 0x3B,
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i8x16_gt_u = 0x28,
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i16x8_gt_u = 0x32,
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i32x4_gt_u = 0x3C,
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i8x16_le_s = 0x29,
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i16x8_le_s = 0x33,
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i32x4_le_s = 0x3D,
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i8x16_le_u = 0x2A,
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i16x8_le_u = 0x34,
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i32x4_le_u = 0x3E,
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i8x16_ge_s = 0x2B,
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i16x8_ge_s = 0x35,
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i32x4_ge_s = 0x3F,
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i8x16_ge_u = 0x2C,
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i16x8_ge_u = 0x36,
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i32x4_ge_u = 0x40,
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f32x4_eq = 0x41,
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f64x2_eq = 0x47,
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f32x4_ne = 0x42,
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f64x2_ne = 0x48,
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f32x4_lt = 0x43,
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f64x2_lt = 0x49,
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f32x4_gt = 0x44,
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f64x2_gt = 0x4A,
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f32x4_le = 0x45,
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f64x2_le = 0x4B,
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f32x4_ge = 0x46,
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f64x2_ge = 0x4C,
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v128_not = 0x4D,
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v128_and = 0x4E,
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v128_andnot = 0x4F,
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v128_or = 0x50,
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v128_xor = 0x51,
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v128_bitselect = 0x52,
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v128_any_true = 0x53,
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v128_load8_lane = 0x54,
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v128_load16_lane = 0x55,
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v128_load32_lane = 0x56,
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v128_load64_lane = 0x57,
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v128_store8_lane = 0x58,
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v128_store16_lane = 0x59,
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v128_store32_lane = 0x5A,
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v128_store64_lane = 0x5B,
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v128_load32_zero = 0x5C,
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v128_load64_zero = 0x5D,
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f32x4_demote_f64x2_zero = 0x5E,
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f64x2_promote_low_f32x4 = 0x5F,
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i8x16_abs = 0x60,
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i16x8_abs = 0x80,
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i32x4_abs = 0xA0,
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i64x2_abs = 0xC0,
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i8x16_neg = 0x61,
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i16x8_neg = 0x81,
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i32x4_neg = 0xA1,
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i64x2_neg = 0xC1,
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i8x16_popcnt = 0x62,
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i16x8_q15mulr_sat_s = 0x82,
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i8x16_all_true = 0x63,
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i16x8_all_true = 0x83,
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i32x4_all_true = 0xA3,
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i64x2_all_true = 0xC3,
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i8x16_bitmask = 0x64,
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i16x8_bitmask = 0x84,
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i32x4_bitmask = 0xA4,
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i64x2_bitmask = 0xC4,
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i8x16_narrow_i16x8_s = 0x65,
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i16x8_narrow_i32x4_s = 0x85,
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i8x16_narrow_i16x8_u = 0x66,
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i16x8_narrow_i32x4_u = 0x86,
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f32x4_ceil = 0x67,
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i16x8_extend_low_i8x16_s = 0x87,
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i32x4_extend_low_i16x8_s = 0xA7,
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i64x2_extend_low_i32x4_s = 0xC7,
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f32x4_floor = 0x68,
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i16x8_extend_high_i8x16_s = 0x88,
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i32x4_extend_high_i16x8_s = 0xA8,
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i64x2_extend_high_i32x4_s = 0xC8,
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f32x4_trunc = 0x69,
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i16x8_extend_low_i8x16_u = 0x89,
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i32x4_extend_low_i16x8_u = 0xA9,
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i64x2_extend_low_i32x4_u = 0xC9,
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f32x4_nearest = 0x6A,
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i16x8_extend_high_i8x16_u = 0x8A,
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i32x4_extend_high_i16x8_u = 0xAA,
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i64x2_extend_high_i32x4_u = 0xCA,
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i8x16_shl = 0x6B,
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i16x8_shl = 0x8B,
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i32x4_shl = 0xAB,
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i64x2_shl = 0xCB,
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i8x16_shr_s = 0x6C,
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i16x8_shr_s = 0x8C,
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i32x4_shr_s = 0xAC,
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i64x2_shr_s = 0xCC,
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i8x16_shr_u = 0x6D,
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i16x8_shr_u = 0x8D,
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i32x4_shr_u = 0xAD,
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i64x2_shr_u = 0xCD,
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i8x16_add = 0x6E,
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i16x8_add = 0x8E,
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i32x4_add = 0xAE,
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i64x2_add = 0xCE,
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i8x16_add_sat_s = 0x6F,
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i16x8_add_sat_s = 0x8F,
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i8x16_add_sat_u = 0x70,
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i16x8_add_sat_u = 0x90,
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i8x16_sub = 0x71,
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i16x8_sub = 0x91,
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i32x4_sub = 0xB1,
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i64x2_sub = 0xD1,
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i8x16_sub_sat_s = 0x72,
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i16x8_sub_sat_s = 0x92,
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i8x16_sub_sat_u = 0x73,
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i16x8_sub_sat_u = 0x93,
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f64x2_ceil = 0x74,
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f64x2_nearest = 0x94,
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f64x2_floor = 0x75,
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i16x8_mul = 0x95,
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i32x4_mul = 0xB5,
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i64x2_mul = 0xD5,
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i8x16_min_s = 0x76,
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i16x8_min_s = 0x96,
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i32x4_min_s = 0xB6,
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i64x2_eq = 0xD6,
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i8x16_min_u = 0x77,
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i16x8_min_u = 0x97,
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i32x4_min_u = 0xB7,
|
|
i64x2_ne = 0xD7,
|
|
i8x16_max_s = 0x78,
|
|
i16x8_max_s = 0x98,
|
|
i32x4_max_s = 0xB8,
|
|
i64x2_lt_s = 0xD8,
|
|
i8x16_max_u = 0x79,
|
|
i16x8_max_u = 0x99,
|
|
i32x4_max_u = 0xB9,
|
|
i64x2_gt_s = 0xD9,
|
|
f64x2_trunc = 0x7A,
|
|
i32x4_dot_i16x8_s = 0xBA,
|
|
i64x2_le_s = 0xDA,
|
|
i8x16_avgr_u = 0x7B,
|
|
i16x8_avgr_u = 0x9B,
|
|
i64x2_ge_s = 0xDB,
|
|
i16x8_extadd_pairwise_i8x16_s = 0x7C,
|
|
i16x8_extmul_low_i8x16_s = 0x9C,
|
|
i32x4_extmul_low_i16x8_s = 0xBC,
|
|
i64x2_extmul_low_i32x4_s = 0xDC,
|
|
i16x8_extadd_pairwise_i8x16_u = 0x7D,
|
|
i16x8_extmul_high_i8x16_s = 0x9D,
|
|
i32x4_extmul_high_i16x8_s = 0xBD,
|
|
i64x2_extmul_high_i32x4_s = 0xDD,
|
|
i32x4_extadd_pairwise_i16x8_s = 0x7E,
|
|
i16x8_extmul_low_i8x16_u = 0x9E,
|
|
i32x4_extmul_low_i16x8_u = 0xBE,
|
|
i64x2_extmul_low_i32x4_u = 0xDE,
|
|
i32x4_extadd_pairwise_i16x8_u = 0x7F,
|
|
i16x8_extmul_high_i8x16_u = 0x9F,
|
|
i32x4_extmul_high_i16x8_u = 0xBF,
|
|
i64x2_extmul_high_i32x4_u = 0xDF,
|
|
f32x4_abs = 0xE0,
|
|
f64x2_abs = 0xEC,
|
|
f32x4_neg = 0xE1,
|
|
f64x2_neg = 0xED,
|
|
f32x4_sqrt = 0xE3,
|
|
f64x2_sqrt = 0xEF,
|
|
f32x4_add = 0xE4,
|
|
f64x2_add = 0xF0,
|
|
f32x4_sub = 0xE5,
|
|
f64x2_sub = 0xF1,
|
|
f32x4_mul = 0xE6,
|
|
f64x2_mul = 0xF2,
|
|
f32x4_div = 0xE7,
|
|
f64x2_div = 0xF3,
|
|
f32x4_min = 0xE8,
|
|
f64x2_min = 0xF4,
|
|
f32x4_max = 0xE9,
|
|
f64x2_max = 0xF5,
|
|
f32x4_pmin = 0xEA,
|
|
f64x2_pmin = 0xF6,
|
|
f32x4_pmax = 0xEB,
|
|
f64x2_pmax = 0xF7,
|
|
i32x4_trunc_sat_f32x4_s = 0xF8,
|
|
i32x4_trunc_sat_f32x4_u = 0xF9,
|
|
f32x4_convert_i32x4_s = 0xFA,
|
|
f32x4_convert_i32x4_u = 0xFB,
|
|
i32x4_trunc_sat_f64x2_s_zero = 0xFC,
|
|
i32x4_trunc_sat_f64x2_u_zero = 0xFD,
|
|
f64x2_convert_low_i32x4_s = 0xFE,
|
|
f64x2_convert_low_i32x4_u = 0xFF,
|
|
|
|
// relaxed-simd opcodes
|
|
i8x16_relaxed_swizzle = 0x100,
|
|
i32x4_relaxed_trunc_f32x4_s = 0x101,
|
|
i32x4_relaxed_trunc_f32x4_u = 0x102,
|
|
i32x4_relaxed_trunc_f64x2_s_zero = 0x103,
|
|
i32x4_relaxed_trunc_f64x2_u_zero = 0x104,
|
|
f32x4_relaxed_madd = 0x105,
|
|
f32x4_relaxed_nmadd = 0x106,
|
|
f64x2_relaxed_madd = 0x107,
|
|
f64x2_relaxed_nmadd = 0x108,
|
|
i8x16_relaxed_laneselect = 0x109,
|
|
i16x8_relaxed_laneselect = 0x10a,
|
|
i32x4_relaxed_laneselect = 0x10b,
|
|
i64x2_relaxed_laneselect = 0x10c,
|
|
f32x4_relaxed_min = 0x10d,
|
|
f32x4_relaxed_max = 0x10e,
|
|
f64x2_relaxed_min = 0x10f,
|
|
f64x2_relaxed_max = 0x110,
|
|
i16x8_relaxed_q15mulr_s = 0x111,
|
|
i16x8_relaxed_dot_i8x16_i7x16_s = 0x112,
|
|
i32x4_relaxed_dot_i8x16_i7x16_add_s = 0x113,
|
|
f32x4_relaxed_dot_bf16x8_add_f32x4 = 0x114,
|
|
};
|
|
|
|
/// Atomic opcodes that require a prefix `0xFE`.
|
|
/// Each opcode represents a varuint32, meaning
|
|
/// they are encoded as leb128 in binary.
|
|
pub const AtomicsOpcode = enum(u32) {
|
|
memory_atomic_notify = 0x00,
|
|
memory_atomic_wait32 = 0x01,
|
|
memory_atomic_wait64 = 0x02,
|
|
atomic_fence = 0x03,
|
|
i32_atomic_load = 0x10,
|
|
i64_atomic_load = 0x11,
|
|
i32_atomic_load8_u = 0x12,
|
|
i32_atomic_load16_u = 0x13,
|
|
i64_atomic_load8_u = 0x14,
|
|
i64_atomic_load16_u = 0x15,
|
|
i64_atomic_load32_u = 0x16,
|
|
i32_atomic_store = 0x17,
|
|
i64_atomic_store = 0x18,
|
|
i32_atomic_store8 = 0x19,
|
|
i32_atomic_store16 = 0x1A,
|
|
i64_atomic_store8 = 0x1B,
|
|
i64_atomic_store16 = 0x1C,
|
|
i64_atomic_store32 = 0x1D,
|
|
i32_atomic_rmw_add = 0x1E,
|
|
i64_atomic_rmw_add = 0x1F,
|
|
i32_atomic_rmw8_add_u = 0x20,
|
|
i32_atomic_rmw16_add_u = 0x21,
|
|
i64_atomic_rmw8_add_u = 0x22,
|
|
i64_atomic_rmw16_add_u = 0x23,
|
|
i64_atomic_rmw32_add_u = 0x24,
|
|
i32_atomic_rmw_sub = 0x25,
|
|
i64_atomic_rmw_sub = 0x26,
|
|
i32_atomic_rmw8_sub_u = 0x27A,
|
|
i32_atomic_rmw16_sub_u = 0x28A,
|
|
i64_atomic_rmw8_sub_u = 0x29A,
|
|
i64_atomic_rmw16_sub_u = 0x2A,
|
|
i64_atomic_rmw32_sub_u = 0x2B,
|
|
i32_atomic_rmw_and = 0x2C,
|
|
i64_atomic_rmw_and = 0x2D,
|
|
i32_atomic_rmw8_and_u = 0x2E,
|
|
i32_atomic_rmw16_and_u = 0x2F,
|
|
i64_atomic_rmw8_and_u = 0x30,
|
|
i64_atomic_rmw16_and_u = 0x31,
|
|
i64_atomic_rmw32_and_u = 0x32,
|
|
i32_atomic_rmw_or = 0x33,
|
|
i64_atomic_rmw_or = 0x34,
|
|
i32_atomic_rmw8_or_u = 0x35,
|
|
i32_atomic_rmw16_or_u = 0x36,
|
|
i64_atomic_rmw8_or_u = 0x37,
|
|
i64_atomic_rmw16_or_u = 0x38,
|
|
i64_atomic_rmw32_or_u = 0x39,
|
|
i32_atomic_rmw_xor = 0x3A,
|
|
i64_atomic_rmw_xor = 0x3B,
|
|
i32_atomic_rmw8_xor_u = 0x3C,
|
|
i32_atomic_rmw16_xor_u = 0x3D,
|
|
i64_atomic_rmw8_xor_u = 0x3E,
|
|
i64_atomic_rmw16_xor_u = 0x3F,
|
|
i64_atomic_rmw32_xor_u = 0x40,
|
|
i32_atomic_rmw_xchg = 0x41,
|
|
i64_atomic_rmw_xchg = 0x42,
|
|
i32_atomic_rmw8_xchg_u = 0x43,
|
|
i32_atomic_rmw16_xchg_u = 0x44,
|
|
i64_atomic_rmw8_xchg_u = 0x45,
|
|
i64_atomic_rmw16_xchg_u = 0x46,
|
|
i64_atomic_rmw32_xchg_u = 0x47,
|
|
|
|
i32_atomic_rmw_cmpxchg = 0x48,
|
|
i64_atomic_rmw_cmpxchg = 0x49,
|
|
i32_atomic_rmw8_cmpxchg_u = 0x4A,
|
|
i32_atomic_rmw16_cmpxchg_u = 0x4B,
|
|
i64_atomic_rmw8_cmpxchg_u = 0x4C,
|
|
i64_atomic_rmw16_cmpxchg_u = 0x4D,
|
|
i64_atomic_rmw32_cmpxchg_u = 0x4E,
|
|
};
|
|
|
|
/// Enum representing all Wasm value types as per spec:
|
|
/// https://webassembly.github.io/spec/core/binary/types.html
|
|
pub const Valtype = enum(u8) {
|
|
i32 = 0x7F,
|
|
i64 = 0x7E,
|
|
f32 = 0x7D,
|
|
f64 = 0x7C,
|
|
v128 = 0x7B,
|
|
};
|
|
|
|
/// Reference types, where the funcref references to a function regardless of its type
|
|
/// and ref references an object from the embedder.
|
|
pub const RefType = enum(u8) {
|
|
funcref = 0x70,
|
|
externref = 0x6F,
|
|
};
|
|
|
|
/// Limits classify the size range of resizeable storage associated with memory types and table types.
|
|
pub const Limits = struct {
|
|
flags: Flags,
|
|
min: u32,
|
|
max: u32,
|
|
|
|
pub const Flags = packed struct(u8) {
|
|
has_max: bool,
|
|
is_shared: bool,
|
|
reserved: u6 = 0,
|
|
};
|
|
};
|
|
|
|
/// Initialization expressions are used to set the initial value on an object
|
|
/// when a wasm module is being loaded.
|
|
pub const InitExpression = union(enum) {
|
|
i32_const: i32,
|
|
i64_const: i64,
|
|
f32_const: f32,
|
|
f64_const: f64,
|
|
global_get: u32,
|
|
};
|
|
|
|
/// Describes the layout of the memory where `min` represents
|
|
/// the minimal amount of pages, and the optional `max` represents
|
|
/// the max pages. When `null` will allow the host to determine the
|
|
/// amount of pages.
|
|
pub const Memory = struct {
|
|
limits: Limits,
|
|
};
|
|
|
|
/// Wasm module sections as per spec:
|
|
/// https://webassembly.github.io/spec/core/binary/modules.html
|
|
pub const Section = enum(u8) {
|
|
custom,
|
|
type,
|
|
import,
|
|
function,
|
|
table,
|
|
memory,
|
|
global,
|
|
@"export",
|
|
start,
|
|
element,
|
|
code,
|
|
data,
|
|
data_count,
|
|
_,
|
|
};
|
|
|
|
/// The kind of the type when importing or exporting to/from the host environment.
|
|
/// https://webassembly.github.io/spec/core/syntax/modules.html
|
|
pub const ExternalKind = enum(u8) {
|
|
function,
|
|
table,
|
|
memory,
|
|
global,
|
|
};
|
|
|
|
/// Defines the enum values for each subsection id for the "Names" custom section
|
|
/// as described by:
|
|
/// https://webassembly.github.io/spec/core/appendix/custom.html?highlight=name#name-section
|
|
pub const NameSubsection = enum(u8) {
|
|
module,
|
|
function,
|
|
local,
|
|
label,
|
|
type,
|
|
table,
|
|
memory,
|
|
global,
|
|
elem_segment,
|
|
data_segment,
|
|
};
|
|
|
|
// type constants
|
|
pub const element_type: u8 = 0x70;
|
|
pub const function_type: u8 = 0x60;
|
|
pub const result_type: u8 = 0x40;
|
|
|
|
/// Represents a block which will not return a value
|
|
pub const block_empty: u8 = 0x40;
|
|
|
|
// binary constants
|
|
pub const magic = [_]u8{ 0x00, 0x61, 0x73, 0x6D }; // \0asm
|
|
pub const version = [_]u8{ 0x01, 0x00, 0x00, 0x00 }; // version 1 (MVP)
|
|
|
|
// Each wasm page size is 64kB
|
|
pub const page_size = 64 * 1024;
|