mlugg 6a87e42c2e
AstGen: fix latent bug causing incorrect elision of dbg_stmt instructions
Thanks to jacobly0 for figuring this out. The chain of events causing
the failure this triggered is as follows.

* As of a recent commit, certain bodies no longer emit a redundant
  `block`, meaning there are more likely to be "interesting"
  instructions (i.e. not blocks) at the end of parent GenZir scopes.

* When emitting the first `dbg_stmt` in such a body, the elision logic
  incorrectly looks at a tag from an instruction in an enclosing scope.

* The tag of this instruction may be `undefined`, meaning that in unsafe
  builds it may be incorrectly identified as a `dbg_stmt` instruction.

* This instruction from another body is clobbered rather than emitting
  an actual `dbg_stmt` instruction. Note that this does not produce
  invalid ZIR, since the creator of the undefined instruction replaces
  the previously-undefined payload later.
2024-03-01 23:54:31 +00:00
..
2024-02-12 05:25:07 +01:00
2023-12-20 13:17:15 +02:00
2024-01-20 00:21:34 +00:00
2023-09-19 09:37:31 -07:00
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