mirror of
https://github.com/ziglang/zig.git
synced 2025-12-06 06:13:07 +00:00
344 lines
14 KiB
Zig
344 lines
14 KiB
Zig
const std = @import("std");
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const builtin = @import("builtin");
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const arch = builtin.cpu.arch;
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const linkage: std.builtin.GlobalLinkage = if (builtin.is_test) .Internal else .Weak;
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// This parameter is true iff the target architecture supports the bare minimum
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// to implement the atomic load/store intrinsics.
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// Some architectures support atomic load/stores but no CAS, but we ignore this
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// detail to keep the export logic clean and because we need some kind of CAS to
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// implement the spinlocks.
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const supports_atomic_ops = switch (arch) {
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.msp430, .avr => false,
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.arm, .armeb, .thumb, .thumbeb =>
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// The ARM v6m ISA has no ldrex/strex and so it's impossible to do CAS
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// operations (unless we're targeting Linux, the kernel provides a way to
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// perform CAS operations).
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// XXX: The Linux code path is not implemented yet.
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!std.Target.arm.featureSetHas(builtin.cpu.features, .has_v6m),
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else => true,
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};
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// The size (in bytes) of the biggest object that the architecture can
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// load/store atomically.
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// Objects bigger than this threshold require the use of a lock.
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const largest_atomic_size = switch (arch) {
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// XXX: On x86/x86_64 we could check the presence of cmpxchg8b/cmpxchg16b
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// and set this parameter accordingly.
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else => @sizeOf(usize),
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};
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const cache_line_size = 64;
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const SpinlockTable = struct {
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// Allocate ~4096 bytes of memory for the spinlock table
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const max_spinlocks = 64;
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const Spinlock = struct {
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// Prevent false sharing by providing enough padding between two
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// consecutive spinlock elements
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v: enum(usize) { Unlocked = 0, Locked } align(cache_line_size) = .Unlocked,
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fn acquire(self: *@This()) void {
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while (true) {
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switch (@atomicRmw(@TypeOf(self.v), &self.v, .Xchg, .Locked, .Acquire)) {
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.Unlocked => break,
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.Locked => {},
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}
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}
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}
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fn release(self: *@This()) void {
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@atomicStore(@TypeOf(self.v), &self.v, .Unlocked, .Release);
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}
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};
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list: [max_spinlocks]Spinlock = [_]Spinlock{.{}} ** max_spinlocks,
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// The spinlock table behaves as a really simple hash table, mapping
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// addresses to spinlocks. The mapping is not unique but that's only a
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// performance problem as the lock will be contended by more than a pair of
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// threads.
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fn get(self: *@This(), address: usize) *Spinlock {
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var sl = &self.list[(address >> 3) % max_spinlocks];
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sl.acquire();
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return sl;
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}
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};
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var spinlocks: SpinlockTable = SpinlockTable{};
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// The following builtins do not respect the specified memory model and instead
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// uses seq_cst, the strongest one, for simplicity sake.
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// Generic version of GCC atomic builtin functions.
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// Those work on any object no matter the pointer alignment nor its size.
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fn __atomic_load(size: u32, src: [*]u8, dest: [*]u8, model: i32) callconv(.C) void {
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_ = model;
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var sl = spinlocks.get(@ptrToInt(src));
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defer sl.release();
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@memcpy(dest, src, size);
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}
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fn __atomic_store(size: u32, dest: [*]u8, src: [*]u8, model: i32) callconv(.C) void {
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_ = model;
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var sl = spinlocks.get(@ptrToInt(dest));
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defer sl.release();
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@memcpy(dest, src, size);
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}
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fn __atomic_exchange(size: u32, ptr: [*]u8, val: [*]u8, old: [*]u8, model: i32) callconv(.C) void {
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_ = model;
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var sl = spinlocks.get(@ptrToInt(ptr));
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defer sl.release();
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@memcpy(old, ptr, size);
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@memcpy(ptr, val, size);
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}
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fn __atomic_compare_exchange(
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size: u32,
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ptr: [*]u8,
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expected: [*]u8,
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desired: [*]u8,
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success: i32,
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failure: i32,
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) callconv(.C) i32 {
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_ = success;
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_ = failure;
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var sl = spinlocks.get(@ptrToInt(ptr));
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defer sl.release();
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for (ptr[0..size]) |b, i| {
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if (expected[i] != b) break;
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} else {
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// The two objects, ptr and expected, are equal
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@memcpy(ptr, desired, size);
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return 1;
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}
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@memcpy(expected, ptr, size);
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return 0;
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}
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comptime {
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if (supports_atomic_ops) {
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@export(__atomic_load, .{ .name = "__atomic_load", .linkage = linkage });
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@export(__atomic_store, .{ .name = "__atomic_store", .linkage = linkage });
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@export(__atomic_exchange, .{ .name = "__atomic_exchange", .linkage = linkage });
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@export(__atomic_compare_exchange, .{ .name = "__atomic_compare_exchange", .linkage = linkage });
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}
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}
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// Specialized versions of the GCC atomic builtin functions.
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// LLVM emits those iff the object size is known and the pointers are correctly
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// aligned.
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fn atomicLoadFn(comptime T: type) fn (*T, i32) callconv(.C) T {
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return struct {
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fn atomic_load_N(src: *T, model: i32) callconv(.C) T {
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_ = model;
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if (@sizeOf(T) > largest_atomic_size) {
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var sl = spinlocks.get(@ptrToInt(src));
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defer sl.release();
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return src.*;
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} else {
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return @atomicLoad(T, src, .SeqCst);
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}
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}
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}.atomic_load_N;
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}
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comptime {
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if (supports_atomic_ops) {
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const atomicLoad_u8 = atomicLoadFn(u8);
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const atomicLoad_u16 = atomicLoadFn(u16);
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const atomicLoad_u32 = atomicLoadFn(u32);
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const atomicLoad_u64 = atomicLoadFn(u64);
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@export(atomicLoad_u8, .{ .name = "__atomic_load_1", .linkage = linkage });
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@export(atomicLoad_u16, .{ .name = "__atomic_load_2", .linkage = linkage });
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@export(atomicLoad_u32, .{ .name = "__atomic_load_4", .linkage = linkage });
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@export(atomicLoad_u64, .{ .name = "__atomic_load_8", .linkage = linkage });
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}
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}
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fn atomicStoreFn(comptime T: type) fn (*T, T, i32) callconv(.C) void {
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return struct {
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fn atomic_store_N(dst: *T, value: T, model: i32) callconv(.C) void {
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_ = model;
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if (@sizeOf(T) > largest_atomic_size) {
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var sl = spinlocks.get(@ptrToInt(dst));
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defer sl.release();
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dst.* = value;
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} else {
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@atomicStore(T, dst, value, .SeqCst);
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}
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}
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}.atomic_store_N;
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}
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comptime {
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if (supports_atomic_ops) {
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const atomicStore_u8 = atomicStoreFn(u8);
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const atomicStore_u16 = atomicStoreFn(u16);
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const atomicStore_u32 = atomicStoreFn(u32);
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const atomicStore_u64 = atomicStoreFn(u64);
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@export(atomicStore_u8, .{ .name = "__atomic_store_1", .linkage = linkage });
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@export(atomicStore_u16, .{ .name = "__atomic_store_2", .linkage = linkage });
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@export(atomicStore_u32, .{ .name = "__atomic_store_4", .linkage = linkage });
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@export(atomicStore_u64, .{ .name = "__atomic_store_8", .linkage = linkage });
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}
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}
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fn atomicExchangeFn(comptime T: type) fn (*T, T, i32) callconv(.C) T {
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return struct {
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fn atomic_exchange_N(ptr: *T, val: T, model: i32) callconv(.C) T {
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_ = model;
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if (@sizeOf(T) > largest_atomic_size) {
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var sl = spinlocks.get(@ptrToInt(ptr));
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defer sl.release();
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const value = ptr.*;
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ptr.* = val;
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return value;
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} else {
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return @atomicRmw(T, ptr, .Xchg, val, .SeqCst);
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}
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}
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}.atomic_exchange_N;
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}
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comptime {
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if (supports_atomic_ops) {
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const atomicExchange_u8 = atomicExchangeFn(u8);
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const atomicExchange_u16 = atomicExchangeFn(u16);
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const atomicExchange_u32 = atomicExchangeFn(u32);
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const atomicExchange_u64 = atomicExchangeFn(u64);
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@export(atomicExchange_u8, .{ .name = "__atomic_exchange_1", .linkage = linkage });
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@export(atomicExchange_u16, .{ .name = "__atomic_exchange_2", .linkage = linkage });
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@export(atomicExchange_u32, .{ .name = "__atomic_exchange_4", .linkage = linkage });
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@export(atomicExchange_u64, .{ .name = "__atomic_exchange_8", .linkage = linkage });
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}
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}
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fn atomicCompareExchangeFn(comptime T: type) fn (*T, *T, T, i32, i32) callconv(.C) i32 {
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return struct {
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fn atomic_compare_exchange_N(ptr: *T, expected: *T, desired: T, success: i32, failure: i32) callconv(.C) i32 {
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_ = success;
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_ = failure;
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if (@sizeOf(T) > largest_atomic_size) {
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var sl = spinlocks.get(@ptrToInt(ptr));
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defer sl.release();
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const value = ptr.*;
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if (value == expected.*) {
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ptr.* = desired;
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return 1;
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}
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expected.* = value;
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return 0;
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} else {
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if (@cmpxchgStrong(T, ptr, expected.*, desired, .SeqCst, .SeqCst)) |old_value| {
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expected.* = old_value;
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return 0;
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}
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return 1;
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}
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}
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}.atomic_compare_exchange_N;
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}
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comptime {
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if (supports_atomic_ops) {
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const atomicCompareExchange_u8 = atomicCompareExchangeFn(u8);
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const atomicCompareExchange_u16 = atomicCompareExchangeFn(u16);
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const atomicCompareExchange_u32 = atomicCompareExchangeFn(u32);
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const atomicCompareExchange_u64 = atomicCompareExchangeFn(u64);
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@export(atomicCompareExchange_u8, .{ .name = "__atomic_compare_exchange_1", .linkage = linkage });
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@export(atomicCompareExchange_u16, .{ .name = "__atomic_compare_exchange_2", .linkage = linkage });
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@export(atomicCompareExchange_u32, .{ .name = "__atomic_compare_exchange_4", .linkage = linkage });
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@export(atomicCompareExchange_u64, .{ .name = "__atomic_compare_exchange_8", .linkage = linkage });
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}
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}
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fn fetchFn(comptime T: type, comptime op: std.builtin.AtomicRmwOp) fn (*T, T, i32) callconv(.C) T {
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return struct {
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pub fn fetch_op_N(ptr: *T, val: T, model: i32) callconv(.C) T {
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_ = model;
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if (@sizeOf(T) > largest_atomic_size) {
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var sl = spinlocks.get(@ptrToInt(ptr));
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defer sl.release();
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const value = ptr.*;
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ptr.* = switch (op) {
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.Add => value +% val,
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.Sub => value -% val,
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.And => value & val,
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.Nand => ~(value & val),
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.Or => value | val,
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.Xor => value ^ val,
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else => @compileError("unsupported atomic op"),
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};
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return value;
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}
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return @atomicRmw(T, ptr, op, val, .SeqCst);
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}
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}.fetch_op_N;
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}
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comptime {
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if (supports_atomic_ops) {
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const fetch_add_u8 = fetchFn(u8, .Add);
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const fetch_add_u16 = fetchFn(u16, .Add);
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const fetch_add_u32 = fetchFn(u32, .Add);
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const fetch_add_u64 = fetchFn(u64, .Add);
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@export(fetch_add_u8, .{ .name = "__atomic_fetch_add_1", .linkage = linkage });
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@export(fetch_add_u16, .{ .name = "__atomic_fetch_add_2", .linkage = linkage });
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@export(fetch_add_u32, .{ .name = "__atomic_fetch_add_4", .linkage = linkage });
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@export(fetch_add_u64, .{ .name = "__atomic_fetch_add_8", .linkage = linkage });
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const fetch_sub_u8 = fetchFn(u8, .Sub);
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const fetch_sub_u16 = fetchFn(u16, .Sub);
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const fetch_sub_u32 = fetchFn(u32, .Sub);
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const fetch_sub_u64 = fetchFn(u64, .Sub);
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@export(fetch_sub_u8, .{ .name = "__atomic_fetch_sub_1", .linkage = linkage });
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@export(fetch_sub_u16, .{ .name = "__atomic_fetch_sub_2", .linkage = linkage });
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@export(fetch_sub_u32, .{ .name = "__atomic_fetch_sub_4", .linkage = linkage });
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@export(fetch_sub_u64, .{ .name = "__atomic_fetch_sub_8", .linkage = linkage });
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const fetch_and_u8 = fetchFn(u8, .And);
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const fetch_and_u16 = fetchFn(u16, .And);
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const fetch_and_u32 = fetchFn(u32, .And);
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const fetch_and_u64 = fetchFn(u64, .And);
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@export(fetch_and_u8, .{ .name = "__atomic_fetch_and_1", .linkage = linkage });
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@export(fetch_and_u16, .{ .name = "__atomic_fetch_and_2", .linkage = linkage });
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@export(fetch_and_u32, .{ .name = "__atomic_fetch_and_4", .linkage = linkage });
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@export(fetch_and_u64, .{ .name = "__atomic_fetch_and_8", .linkage = linkage });
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const fetch_or_u8 = fetchFn(u8, .Or);
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const fetch_or_u16 = fetchFn(u16, .Or);
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const fetch_or_u32 = fetchFn(u32, .Or);
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const fetch_or_u64 = fetchFn(u64, .Or);
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@export(fetch_or_u8, .{ .name = "__atomic_fetch_or_1", .linkage = linkage });
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@export(fetch_or_u16, .{ .name = "__atomic_fetch_or_2", .linkage = linkage });
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@export(fetch_or_u32, .{ .name = "__atomic_fetch_or_4", .linkage = linkage });
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@export(fetch_or_u64, .{ .name = "__atomic_fetch_or_8", .linkage = linkage });
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const fetch_xor_u8 = fetchFn(u8, .Xor);
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const fetch_xor_u16 = fetchFn(u16, .Xor);
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const fetch_xor_u32 = fetchFn(u32, .Xor);
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const fetch_xor_u64 = fetchFn(u64, .Xor);
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@export(fetch_xor_u8, .{ .name = "__atomic_fetch_xor_1", .linkage = linkage });
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@export(fetch_xor_u16, .{ .name = "__atomic_fetch_xor_2", .linkage = linkage });
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@export(fetch_xor_u32, .{ .name = "__atomic_fetch_xor_4", .linkage = linkage });
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@export(fetch_xor_u64, .{ .name = "__atomic_fetch_xor_8", .linkage = linkage });
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const fetch_nand_u8 = fetchFn(u8, .Nand);
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const fetch_nand_u16 = fetchFn(u16, .Nand);
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const fetch_nand_u32 = fetchFn(u32, .Nand);
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const fetch_nand_u64 = fetchFn(u64, .Nand);
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@export(fetch_nand_u8, .{ .name = "__atomic_fetch_nand_1", .linkage = linkage });
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@export(fetch_nand_u16, .{ .name = "__atomic_fetch_nand_2", .linkage = linkage });
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@export(fetch_nand_u32, .{ .name = "__atomic_fetch_nand_4", .linkage = linkage });
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@export(fetch_nand_u64, .{ .name = "__atomic_fetch_nand_8", .linkage = linkage });
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}
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}
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