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553cb3ed46
sys/param.h was manually adjusted to not define __NetBSD_Version__ since it will be defined by the compiler.
286 lines
9.0 KiB
C
Vendored
286 lines
9.0 KiB
C
Vendored
/* $NetBSD: pmap.h,v 1.77 2022/10/26 07:35:19 skrll Exp $ */
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/*
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* Copyright (c) 1992, 1993
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* The Regents of the University of California. All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* Ralph Campbell.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)pmap.h 8.1 (Berkeley) 6/10/93
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*/
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/*
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* Copyright (c) 1987 Carnegie-Mellon University
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*
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* This code is derived from software contributed to Berkeley by
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* Ralph Campbell.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)pmap.h 8.1 (Berkeley) 6/10/93
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*/
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#ifndef _MIPS_PMAP_H_
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#define _MIPS_PMAP_H_
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#ifdef _KERNEL_OPT
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#include "opt_multiprocessor.h"
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#include "opt_uvmhist.h"
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#include "opt_cputype.h"
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#endif
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#include <sys/evcnt.h>
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#include <sys/kcpuset.h>
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#include <sys/kernhist.h>
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#ifndef __BSD_PTENTRY_T__
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#define __BSD_PTENTRY_T__
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typedef uint32_t pt_entry_t;
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#define PRIxPTE PRIx32
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#endif /* __BSD_PTENTRY_T__ */
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#define KERNEL_PID 0
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#if defined(__PMAP_PRIVATE)
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struct vm_page_md;
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#include <mips/locore.h>
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#include <mips/cache.h>
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#define PMAP_VIRTUAL_CACHE_ALIASES
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#define PMAP_INVALID_SEGTAB_ADDRESS ((pmap_segtab_t *)NULL)
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#define PMAP_TLB_NEED_SHOOTDOWN 1
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#define PMAP_TLB_FLUSH_ASID_ON_RESET false
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#if UPAGES > 1
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#define PMAP_TLB_WIRED_UPAGES MIPS3_TLB_WIRED_UPAGES
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#endif
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#define pmap_md_tlb_asid_max() (MIPS_TLB_NUM_PIDS - 1)
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#ifdef MULTIPROCESSOR
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#define PMAP_NO_PV_UNCACHED
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#endif
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/*
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* We need the pmap_segtab's to be aligned on MIPS*R2 so we can use the
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* EXT/INS instructions on their addresses.
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*/
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#if (MIPS32R2 + MIPS64R2 + MIPS64R2_RMIXL) > 0
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#define PMAP_SEGTAB_ALIGN __aligned(sizeof(void *)*NSEGPG) __section(".data1")
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#endif
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#include <uvm/uvm_physseg.h>
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void pmap_md_init(void);
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void pmap_md_icache_sync_all(void);
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void pmap_md_icache_sync_range_index(vaddr_t, vsize_t);
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void pmap_md_page_syncicache(struct vm_page_md *, const kcpuset_t *);
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bool pmap_md_vca_add(struct vm_page_md *, vaddr_t, pt_entry_t *);
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void pmap_md_vca_clean(struct vm_page_md *, int);
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void pmap_md_vca_remove(struct vm_page *, vaddr_t, bool, bool);
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bool pmap_md_ok_to_steal_p(const uvm_physseg_t, size_t);
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bool pmap_md_tlb_check_entry(void *, vaddr_t, tlb_asid_t, pt_entry_t);
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static inline bool
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pmap_md_virtual_cache_aliasing_p(void)
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{
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return MIPS_CACHE_VIRTUAL_ALIAS;
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}
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static inline vsize_t
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pmap_md_cache_prefer_mask(void)
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{
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return MIPS_HAS_R4K_MMU ? mips_cache_info.mci_cache_prefer_mask : 0;
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}
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static inline void
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pmap_md_xtab_activate(struct pmap *pm, struct lwp *l)
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{
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/* nothing */
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}
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static inline void
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pmap_md_xtab_deactivate(struct pmap *pm)
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{
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/* nothing */
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}
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#endif /* __PMAP_PRIVATE */
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// these use register_t so we can pass XKPHYS addresses to them on N32
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bool pmap_md_direct_mapped_vaddr_p(register_t);
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paddr_t pmap_md_direct_mapped_vaddr_to_paddr(register_t);
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bool pmap_md_io_vaddr_p(vaddr_t);
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/*
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* Alternate mapping hooks for pool pages. Avoids thrashing the TLB.
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*/
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vaddr_t pmap_md_map_poolpage(paddr_t, size_t);
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paddr_t pmap_md_unmap_poolpage(vaddr_t, size_t);
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struct vm_page *pmap_md_alloc_poolpage(int);
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/*
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* Other hooks for the pool allocator.
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*/
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paddr_t pmap_md_pool_vtophys(vaddr_t);
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vaddr_t pmap_md_pool_phystov(paddr_t);
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#define POOL_VTOPHYS(va) pmap_md_pool_vtophys((vaddr_t)va)
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#define POOL_PHYSTOV(pa) pmap_md_pool_phystov((paddr_t)pa)
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#define pmap_md_direct_map_paddr(pa) pmap_md_pool_phystov((paddr_t)pa)
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struct tlbmask {
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vaddr_t tlb_hi;
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#ifdef __mips_o32
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uint32_t tlb_lo0;
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uint32_t tlb_lo1;
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#else
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uint64_t tlb_lo0;
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uint64_t tlb_lo1;
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#endif
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uint32_t tlb_mask;
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};
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#ifdef _LP64
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#define PMAP_SEGTABSIZE NSEGPG
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#else
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#define PMAP_SEGTABSIZE (1 << (31 - SEGSHIFT))
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#endif
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#include <uvm/uvm_pmap.h>
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#include <uvm/pmap/vmpagemd.h>
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#include <uvm/pmap/pmap.h>
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#include <uvm/pmap/pmap_pvt.h>
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#include <uvm/pmap/pmap_tlb.h>
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#include <uvm/pmap/pmap_synci.h>
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#ifdef _KERNEL
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/*
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* Select CCA to use for unmanaged pages.
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*/
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#define PMAP_CCA_FOR_PA(pa) CCA_UNCACHED /* uncached */
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#if defined(_MIPS_PADDR_T_64BIT) || defined(_LP64)
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#define PGC_NOCACHE 0x4000000000000000ULL
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#define PGC_PREFETCH 0x2000000000000000ULL
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#endif
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#if defined(__PMAP_PRIVATE)
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#include <mips/pte.h>
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#endif
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/*
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* The user address space is 2Gb (0x0 - 0x80000000).
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* User programs are laid out in memory as follows:
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* address
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* USRTEXT 0x00001000
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* USRDATA USRTEXT + text_size
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* USRSTACK 0x7FFFFFFF
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*
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* The user address space is mapped using a two level structure where
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* virtual address bits 30..22 are used to index into a segment table which
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* points to a page worth of PTEs (4096 page can hold 1024 PTEs).
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* Bits 21..12 are then used to index a PTE which describes a page within
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* a segment.
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*
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* The wired entries in the TLB will contain the following:
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* 0-1 (UPAGES) for curproc user struct and kernel stack.
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*
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* Note: The kernel doesn't use the same data structures as user programs.
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* All the PTE entries are stored in a single array in Sysmap which is
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* dynamically allocated at boot time.
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*/
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#define pmap_phys_address(x) mips_ptob(x)
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/*
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* Bootstrap the system enough to run with virtual memory.
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*/
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void pmap_bootstrap(void);
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void pmap_md_alloc_ephemeral_address_space(struct cpu_info *);
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void pmap_procwr(struct proc *, vaddr_t, size_t);
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#define PMAP_NEED_PROCWR
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/*
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* pmap_prefer() helps reduce virtual-coherency exceptions in
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* the virtually-indexed cache on mips3 CPUs.
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*/
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#ifdef MIPS3_PLUS
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#define PMAP_PREFER(pa, va, sz, td) pmap_prefer((pa), (va), (sz), (td))
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void pmap_prefer(vaddr_t, vaddr_t *, vsize_t, int);
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#endif /* MIPS3_PLUS */
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#define PMAP_ENABLE_PMAP_KMPAGE /* enable the PMAP_KMPAGE flag */
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#ifdef MIPS64_SB1
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/* uncached accesses are bad; all accesses should be cached (and coherent) */
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#undef PMAP_PAGEIDLEZERO
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#define PMAP_PAGEIDLEZERO(pa) (pmap_zero_page(pa), true)
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int sbmips_cca_for_pa(paddr_t);
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#undef PMAP_CCA_FOR_PA
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#define PMAP_CCA_FOR_PA(pa) sbmips_cca_for_pa(pa)
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#endif
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#ifdef __HAVE_PMAP_PV_TRACK
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struct pmap_page {
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struct vm_page_md pp_md;
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};
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#define PMAP_PAGE_TO_MD(ppage) (&((ppage)->pp_md))
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#endif
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#endif /* _KERNEL */
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#endif /* _MIPS_PMAP_H_ */ |