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sys/param.h was manually adjusted to not define __NetBSD_Version__ since it will be defined by the compiler.
75 lines
3.2 KiB
C
Vendored
75 lines
3.2 KiB
C
Vendored
/* $NetBSD: pte.h,v 1.7 2022/08/20 23:19:09 riastradh Exp $ */
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/*
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* Copyright (c) 2010 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Christoph Egger.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _X86_PTE_H
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#define _X86_PTE_H
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#ifndef _MACHINE_PTE_H_X86
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#error Use machine/pte.h, not x86/pte.h directly.
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#endif
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/* Cacheability bits when we are using PAT */
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#define PGC_WB 0 /* The default */
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#define PGC_WC PTE_PWT /* WT and CD is WC */
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#define PGC_UCMINUS PTE_PCD /* UC but mtrr can override */
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#define PGC_UC (PTE_PWT | PTE_PCD) /* hard UC */
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/*
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* #PF exception bits
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*/
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#define PGEX_P 0x0001 /* the page was present */
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#define PGEX_W 0x0002 /* exception during a write cycle */
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#define PGEX_U 0x0004 /* exception while in user mode */
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#define PGEX_RSVD 0x0008 /* a reserved bit was set in the page tables */
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#define PGEX_I 0x0010 /* exception during instruction fetch */
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#define PGEX_PK 0x0020 /* access disallowed by protection key */
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#define PGEX_SGX 0x8000 /* violation of sgx-specific access rights */
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/*
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* pl*_pi: index in the ptp page for a pde mapping a VA.
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* (pl*_i below is the index in the virtual array of all pdes per level)
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*/
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#define pl1_pi(VA) (((VA_SIGN_POS(VA)) & L1_MASK) >> L1_SHIFT)
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#define pl2_pi(VA) (((VA_SIGN_POS(VA)) & L2_MASK) >> L2_SHIFT)
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#define pl3_pi(VA) (((VA_SIGN_POS(VA)) & L3_MASK) >> L3_SHIFT)
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#define pl4_pi(VA) (((VA_SIGN_POS(VA)) & L4_MASK) >> L4_SHIFT)
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#define pl_pi(va, lvl) \
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(((VA_SIGN_POS(va)) & ptp_masks[(lvl)-1]) >> ptp_shifts[(lvl)-1])
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/*
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* pl*_i: generate index into pde/pte arrays in virtual space
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*/
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#define pl1_i(VA) (((VA_SIGN_POS(VA)) & L1_FRAME) >> L1_SHIFT)
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#define pl2_i(VA) (((VA_SIGN_POS(VA)) & L2_FRAME) >> L2_SHIFT)
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#define pl3_i(VA) (((VA_SIGN_POS(VA)) & L3_FRAME) >> L3_SHIFT)
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#define pl4_i(VA) (((VA_SIGN_POS(VA)) & L4_FRAME) >> L4_SHIFT)
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#endif /* _X86_PTE_H */ |