mirror of
https://github.com/ziglang/zig.git
synced 2025-12-07 23:03:08 +00:00
d17f492017
* Breaking language change: inline assembly must use string literal
syntax. This is in preparation for inline assembly improvements that
involve more integration with the Zig language. This means we cannot
rely on text substitution.
* Liveness: properly handle inline assembly and function calls with
more than 3 operands.
- More than 35 operands is not yet supported. This is a low priority
to implement.
- This required implementation in codegen.zig as well.
* Liveness: fix bug causing incorrect tomb bits.
* Sema: enable switch expressions that are evaluated at compile-time.
- Runtime switch instructions still need to be reworked in this
branch. There was a TODO left here (by me) with a suggestion to do
some bigger changes as part of the AIR memory reworking. Now that
time has come and I plan to honor the suggestion in a future commit
before merging this branch.
* AIR printing: fix missing ')' on alive instructions.
We're back to "hello world" working for the x86_64 backend.
577 lines
23 KiB
Zig
577 lines
23 KiB
Zig
// SPDX-License-Identifier: MIT
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// Copyright (c) 2015-2021 Zig Contributors
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// This file is part of [zig](https://ziglang.org/), which is MIT licensed.
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// The MIT license requires this copyright notice to be included in all copies
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// and substantial portions of the software.
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const std = @import("../std.zig");
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const testing = std.testing;
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const target = std.Target.current;
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const Ordering = std.atomic.Ordering;
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pub fn Atomic(comptime T: type) type {
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return extern struct {
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value: T,
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const Self = @This();
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pub fn init(value: T) Self {
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return .{ .value = value };
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}
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/// Non-atomically load from the atomic value without synchronization.
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/// Care must be taken to avoid data-races when interacting with other atomic operations.
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pub fn loadUnchecked(self: Self) T {
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return self.value;
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}
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/// Non-atomically store to the atomic value without synchronization.
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/// Care must be taken to avoid data-races when interacting with other atomic operations.
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pub fn storeUnchecked(self: *Self, value: T) void {
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self.value = value;
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}
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pub fn load(self: *const Self, comptime ordering: Ordering) T {
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return switch (ordering) {
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.AcqRel => @compileError(@tagName(ordering) ++ " implies " ++ @tagName(Ordering.Release) ++ " which is only allowed on atomic stores"),
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.Release => @compileError(@tagName(ordering) ++ " is only allowed on atomic stores"),
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else => @atomicLoad(T, &self.value, ordering),
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};
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}
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pub fn store(self: *Self, value: T, comptime ordering: Ordering) void {
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return switch (ordering) {
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.AcqRel => @compileError(@tagName(ordering) ++ " implies " ++ @tagName(Ordering.Acquire) ++ " which is only allowed on atomic loads"),
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.Acquire => @compileError(@tagName(ordering) ++ " is only allowed on atomic loads"),
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else => @atomicStore(T, &self.value, value, ordering),
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};
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}
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pub inline fn swap(self: *Self, value: T, comptime ordering: Ordering) T {
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return self.rmw(.Xchg, value, ordering);
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}
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pub inline fn compareAndSwap(
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self: *Self,
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compare: T,
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exchange: T,
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comptime success: Ordering,
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comptime failure: Ordering,
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) ?T {
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return self.cmpxchg(true, compare, exchange, success, failure);
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}
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pub inline fn tryCompareAndSwap(
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self: *Self,
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compare: T,
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exchange: T,
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comptime success: Ordering,
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comptime failure: Ordering,
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) ?T {
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return self.cmpxchg(false, compare, exchange, success, failure);
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}
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inline fn cmpxchg(
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self: *Self,
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comptime is_strong: bool,
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compare: T,
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exchange: T,
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comptime success: Ordering,
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comptime failure: Ordering,
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) ?T {
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if (success == .Unordered or failure == .Unordered) {
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@compileError(@tagName(Ordering.Unordered) ++ " is only allowed on atomic loads and stores");
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}
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comptime var success_is_stronger = switch (failure) {
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.SeqCst => success == .SeqCst,
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.AcqRel => @compileError(@tagName(failure) ++ " implies " ++ @tagName(Ordering.Release) ++ " which is only allowed on success"),
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.Acquire => success == .SeqCst or success == .AcqRel or success == .Acquire,
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.Release => @compileError(@tagName(failure) ++ " is only allowed on success"),
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.Monotonic => true,
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.Unordered => unreachable,
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};
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if (!success_is_stronger) {
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@compileError(@tagName(success) ++ " must be stronger than " ++ @tagName(failure));
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}
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return switch (is_strong) {
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true => @cmpxchgStrong(T, &self.value, compare, exchange, success, failure),
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false => @cmpxchgWeak(T, &self.value, compare, exchange, success, failure),
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};
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}
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inline fn rmw(
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self: *Self,
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comptime op: std.builtin.AtomicRmwOp,
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value: T,
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comptime ordering: Ordering,
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) T {
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return @atomicRmw(T, &self.value, op, value, ordering);
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}
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fn exportWhen(comptime condition: bool, comptime functions: type) type {
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return if (condition) functions else struct {};
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}
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pub usingnamespace exportWhen(std.meta.trait.isNumber(T), struct {
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pub inline fn fetchAdd(self: *Self, value: T, comptime ordering: Ordering) T {
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return self.rmw(.Add, value, ordering);
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}
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pub inline fn fetchSub(self: *Self, value: T, comptime ordering: Ordering) T {
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return self.rmw(.Sub, value, ordering);
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}
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pub inline fn fetchMin(self: *Self, value: T, comptime ordering: Ordering) T {
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return self.rmw(.Min, value, ordering);
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}
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pub inline fn fetchMax(self: *Self, value: T, comptime ordering: Ordering) T {
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return self.rmw(.Max, value, ordering);
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}
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});
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pub usingnamespace exportWhen(std.meta.trait.isIntegral(T), struct {
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pub inline fn fetchAnd(self: *Self, value: T, comptime ordering: Ordering) T {
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return self.rmw(.And, value, ordering);
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}
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pub inline fn fetchNand(self: *Self, value: T, comptime ordering: Ordering) T {
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return self.rmw(.Nand, value, ordering);
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}
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pub inline fn fetchOr(self: *Self, value: T, comptime ordering: Ordering) T {
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return self.rmw(.Or, value, ordering);
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}
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pub inline fn fetchXor(self: *Self, value: T, comptime ordering: Ordering) T {
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return self.rmw(.Xor, value, ordering);
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}
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const Bit = std.math.Log2Int(T);
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const BitRmwOp = enum {
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Set,
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Reset,
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Toggle,
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};
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pub inline fn bitSet(self: *Self, bit: Bit, comptime ordering: Ordering) u1 {
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return bitRmw(self, .Set, bit, ordering);
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}
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pub inline fn bitReset(self: *Self, bit: Bit, comptime ordering: Ordering) u1 {
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return bitRmw(self, .Reset, bit, ordering);
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}
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pub inline fn bitToggle(self: *Self, bit: Bit, comptime ordering: Ordering) u1 {
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return bitRmw(self, .Toggle, bit, ordering);
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}
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inline fn bitRmw(
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self: *Self,
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comptime op: BitRmwOp,
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bit: Bit,
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comptime ordering: Ordering,
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) u1 {
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// x86 supports dedicated bitwise instructions
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if (comptime target.cpu.arch.isX86() and @sizeOf(T) >= 2 and @sizeOf(T) <= 8) {
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const old_bit: u8 = switch (@sizeOf(T)) {
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2 => switch (op) {
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.Set => asm volatile ("lock btsw %[bit], %[ptr]"
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// LLVM doesn't support u1 flag register return values
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: [result] "={@ccc}" (-> u8)
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: [ptr] "*p" (&self.value),
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[bit] "X" (@as(T, bit))
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: "cc", "memory"
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),
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.Reset => asm volatile ("lock btrw %[bit], %[ptr]"
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// LLVM doesn't support u1 flag register return values
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: [result] "={@ccc}" (-> u8)
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: [ptr] "*p" (&self.value),
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[bit] "X" (@as(T, bit))
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: "cc", "memory"
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),
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.Toggle => asm volatile ("lock btcw %[bit], %[ptr]"
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// LLVM doesn't support u1 flag register return values
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: [result] "={@ccc}" (-> u8)
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: [ptr] "*p" (&self.value),
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[bit] "X" (@as(T, bit))
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: "cc", "memory"
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),
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},
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4 => switch (op) {
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.Set => asm volatile ("lock btsl %[bit], %[ptr]"
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// LLVM doesn't support u1 flag register return values
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: [result] "={@ccc}" (-> u8)
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: [ptr] "*p" (&self.value),
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[bit] "X" (@as(T, bit))
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: "cc", "memory"
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),
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.Reset => asm volatile ("lock btrl %[bit], %[ptr]"
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// LLVM doesn't support u1 flag register return values
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: [result] "={@ccc}" (-> u8)
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: [ptr] "*p" (&self.value),
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[bit] "X" (@as(T, bit))
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: "cc", "memory"
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),
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.Toggle => asm volatile ("lock btcl %[bit], %[ptr]"
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// LLVM doesn't support u1 flag register return values
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: [result] "={@ccc}" (-> u8)
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: [ptr] "*p" (&self.value),
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[bit] "X" (@as(T, bit))
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: "cc", "memory"
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),
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},
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8 => switch (op) {
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.Set => asm volatile ("lock btsq %[bit], %[ptr]"
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// LLVM doesn't support u1 flag register return values
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: [result] "={@ccc}" (-> u8)
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: [ptr] "*p" (&self.value),
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[bit] "X" (@as(T, bit))
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: "cc", "memory"
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),
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.Reset => asm volatile ("lock btrq %[bit], %[ptr]"
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// LLVM doesn't support u1 flag register return values
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: [result] "={@ccc}" (-> u8)
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: [ptr] "*p" (&self.value),
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[bit] "X" (@as(T, bit))
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: "cc", "memory"
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),
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.Toggle => asm volatile ("lock btcq %[bit], %[ptr]"
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// LLVM doesn't support u1 flag register return values
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: [result] "={@ccc}" (-> u8)
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: [ptr] "*p" (&self.value),
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[bit] "X" (@as(T, bit))
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: "cc", "memory"
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),
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},
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else => @compileError("Invalid atomic type " ++ @typeName(T)),
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};
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return @intCast(u1, old_bit);
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}
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const mask = @as(T, 1) << bit;
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const value = switch (op) {
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.Set => self.fetchOr(mask, ordering),
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.Reset => self.fetchAnd(~mask, ordering),
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.Toggle => self.fetchXor(mask, ordering),
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};
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return @boolToInt(value & mask != 0);
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}
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});
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};
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}
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fn atomicIntTypes() []const type {
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comptime var bytes = 1;
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comptime var types: []const type = &[_]type{};
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inline while (bytes <= @sizeOf(usize)) : (bytes *= 2) {
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types = types ++ &[_]type{std.meta.Int(.unsigned, bytes * 8)};
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}
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return types;
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}
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test "Atomic.loadUnchecked" {
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inline for (atomicIntTypes()) |Int| {
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var x = Atomic(Int).init(5);
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try testing.expectEqual(x.loadUnchecked(), 5);
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}
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}
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test "Atomic.storeUnchecked" {
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inline for (atomicIntTypes()) |Int| {
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_ = Int;
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var x = Atomic(usize).init(5);
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x.storeUnchecked(10);
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try testing.expectEqual(x.loadUnchecked(), 10);
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}
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}
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test "Atomic.load" {
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inline for (atomicIntTypes()) |Int| {
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inline for (.{ .Unordered, .Monotonic, .Acquire, .SeqCst }) |ordering| {
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var x = Atomic(Int).init(5);
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try testing.expectEqual(x.load(ordering), 5);
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}
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}
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}
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test "Atomic.store" {
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inline for (atomicIntTypes()) |Int| {
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inline for (.{ .Unordered, .Monotonic, .Release, .SeqCst }) |ordering| {
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_ = Int;
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var x = Atomic(usize).init(5);
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x.store(10, ordering);
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try testing.expectEqual(x.load(.SeqCst), 10);
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}
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}
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}
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const atomic_rmw_orderings = [_]Ordering{
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.Monotonic,
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.Acquire,
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.Release,
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.AcqRel,
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.SeqCst,
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};
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test "Atomic.swap" {
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inline for (atomic_rmw_orderings) |ordering| {
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var x = Atomic(usize).init(5);
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try testing.expectEqual(x.swap(10, ordering), 5);
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try testing.expectEqual(x.load(.SeqCst), 10);
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var y = Atomic(enum(usize) { a, b, c }).init(.c);
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try testing.expectEqual(y.swap(.a, ordering), .c);
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try testing.expectEqual(y.load(.SeqCst), .a);
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var z = Atomic(f32).init(5.0);
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try testing.expectEqual(z.swap(10.0, ordering), 5.0);
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try testing.expectEqual(z.load(.SeqCst), 10.0);
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var a = Atomic(bool).init(false);
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try testing.expectEqual(a.swap(true, ordering), false);
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try testing.expectEqual(a.load(.SeqCst), true);
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var b = Atomic(?*u8).init(null);
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try testing.expectEqual(b.swap(@intToPtr(?*u8, @alignOf(u8)), ordering), null);
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try testing.expectEqual(b.load(.SeqCst), @intToPtr(?*u8, @alignOf(u8)));
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}
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}
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const atomic_cmpxchg_orderings = [_][2]Ordering{
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.{ .Monotonic, .Monotonic },
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.{ .Acquire, .Monotonic },
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.{ .Acquire, .Acquire },
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.{ .Release, .Monotonic },
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// Although accepted by LLVM, acquire failure implies AcqRel success
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// .{ .Release, .Acquire },
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.{ .AcqRel, .Monotonic },
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.{ .AcqRel, .Acquire },
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.{ .SeqCst, .Monotonic },
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.{ .SeqCst, .Acquire },
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.{ .SeqCst, .SeqCst },
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};
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test "Atomic.compareAndSwap" {
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inline for (atomicIntTypes()) |Int| {
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inline for (atomic_cmpxchg_orderings) |ordering| {
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var x = Atomic(Int).init(0);
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try testing.expectEqual(x.compareAndSwap(1, 0, ordering[0], ordering[1]), 0);
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try testing.expectEqual(x.load(.SeqCst), 0);
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try testing.expectEqual(x.compareAndSwap(0, 1, ordering[0], ordering[1]), null);
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try testing.expectEqual(x.load(.SeqCst), 1);
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try testing.expectEqual(x.compareAndSwap(1, 0, ordering[0], ordering[1]), null);
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try testing.expectEqual(x.load(.SeqCst), 0);
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}
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}
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}
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test "Atomic.tryCompareAndSwap" {
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inline for (atomicIntTypes()) |Int| {
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inline for (atomic_cmpxchg_orderings) |ordering| {
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var x = Atomic(Int).init(0);
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try testing.expectEqual(x.tryCompareAndSwap(1, 0, ordering[0], ordering[1]), 0);
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try testing.expectEqual(x.load(.SeqCst), 0);
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while (x.tryCompareAndSwap(0, 1, ordering[0], ordering[1])) |_| {}
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try testing.expectEqual(x.load(.SeqCst), 1);
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while (x.tryCompareAndSwap(1, 0, ordering[0], ordering[1])) |_| {}
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try testing.expectEqual(x.load(.SeqCst), 0);
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}
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}
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}
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test "Atomic.fetchAdd" {
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inline for (atomicIntTypes()) |Int| {
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inline for (atomic_rmw_orderings) |ordering| {
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var x = Atomic(Int).init(5);
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try testing.expectEqual(x.fetchAdd(5, ordering), 5);
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try testing.expectEqual(x.load(.SeqCst), 10);
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try testing.expectEqual(x.fetchAdd(std.math.maxInt(Int), ordering), 10);
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try testing.expectEqual(x.load(.SeqCst), 9);
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}
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}
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}
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test "Atomic.fetchSub" {
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inline for (atomicIntTypes()) |Int| {
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inline for (atomic_rmw_orderings) |ordering| {
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var x = Atomic(Int).init(5);
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try testing.expectEqual(x.fetchSub(5, ordering), 5);
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try testing.expectEqual(x.load(.SeqCst), 0);
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try testing.expectEqual(x.fetchSub(1, ordering), 0);
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try testing.expectEqual(x.load(.SeqCst), std.math.maxInt(Int));
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}
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}
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}
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test "Atomic.fetchMin" {
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inline for (atomicIntTypes()) |Int| {
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inline for (atomic_rmw_orderings) |ordering| {
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var x = Atomic(Int).init(5);
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try testing.expectEqual(x.fetchMin(0, ordering), 5);
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try testing.expectEqual(x.load(.SeqCst), 0);
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try testing.expectEqual(x.fetchMin(10, ordering), 0);
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try testing.expectEqual(x.load(.SeqCst), 0);
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}
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}
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}
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test "Atomic.fetchMax" {
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inline for (atomicIntTypes()) |Int| {
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inline for (atomic_rmw_orderings) |ordering| {
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var x = Atomic(Int).init(5);
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try testing.expectEqual(x.fetchMax(10, ordering), 5);
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try testing.expectEqual(x.load(.SeqCst), 10);
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try testing.expectEqual(x.fetchMax(5, ordering), 10);
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try testing.expectEqual(x.load(.SeqCst), 10);
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}
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}
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}
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test "Atomic.fetchAnd" {
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inline for (atomicIntTypes()) |Int| {
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inline for (atomic_rmw_orderings) |ordering| {
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var x = Atomic(Int).init(0b11);
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try testing.expectEqual(x.fetchAnd(0b10, ordering), 0b11);
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try testing.expectEqual(x.load(.SeqCst), 0b10);
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try testing.expectEqual(x.fetchAnd(0b00, ordering), 0b10);
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try testing.expectEqual(x.load(.SeqCst), 0b00);
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}
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}
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}
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test "Atomic.fetchNand" {
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inline for (atomicIntTypes()) |Int| {
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inline for (atomic_rmw_orderings) |ordering| {
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var x = Atomic(Int).init(0b11);
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try testing.expectEqual(x.fetchNand(0b10, ordering), 0b11);
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try testing.expectEqual(x.load(.SeqCst), ~@as(Int, 0b10));
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try testing.expectEqual(x.fetchNand(0b00, ordering), ~@as(Int, 0b10));
|
|
try testing.expectEqual(x.load(.SeqCst), ~@as(Int, 0b00));
|
|
}
|
|
}
|
|
}
|
|
|
|
test "Atomic.fetchOr" {
|
|
inline for (atomicIntTypes()) |Int| {
|
|
inline for (atomic_rmw_orderings) |ordering| {
|
|
var x = Atomic(Int).init(0b11);
|
|
try testing.expectEqual(x.fetchOr(0b100, ordering), 0b11);
|
|
try testing.expectEqual(x.load(.SeqCst), 0b111);
|
|
try testing.expectEqual(x.fetchOr(0b010, ordering), 0b111);
|
|
try testing.expectEqual(x.load(.SeqCst), 0b111);
|
|
}
|
|
}
|
|
}
|
|
|
|
test "Atomic.fetchXor" {
|
|
inline for (atomicIntTypes()) |Int| {
|
|
inline for (atomic_rmw_orderings) |ordering| {
|
|
var x = Atomic(Int).init(0b11);
|
|
try testing.expectEqual(x.fetchXor(0b10, ordering), 0b11);
|
|
try testing.expectEqual(x.load(.SeqCst), 0b01);
|
|
try testing.expectEqual(x.fetchXor(0b01, ordering), 0b01);
|
|
try testing.expectEqual(x.load(.SeqCst), 0b00);
|
|
}
|
|
}
|
|
}
|
|
|
|
test "Atomic.bitSet" {
|
|
inline for (atomicIntTypes()) |Int| {
|
|
inline for (atomic_rmw_orderings) |ordering| {
|
|
var x = Atomic(Int).init(0);
|
|
const bit_array = @as([std.meta.bitCount(Int)]void, undefined);
|
|
|
|
for (bit_array) |_, bit_index| {
|
|
const bit = @intCast(std.math.Log2Int(Int), bit_index);
|
|
const mask = @as(Int, 1) << bit;
|
|
|
|
// setting the bit should change the bit
|
|
try testing.expect(x.load(.SeqCst) & mask == 0);
|
|
try testing.expectEqual(x.bitSet(bit, ordering), 0);
|
|
try testing.expect(x.load(.SeqCst) & mask != 0);
|
|
|
|
// setting it again shouldn't change the bit
|
|
try testing.expectEqual(x.bitSet(bit, ordering), 1);
|
|
try testing.expect(x.load(.SeqCst) & mask != 0);
|
|
|
|
// all the previous bits should have not changed (still be set)
|
|
for (bit_array[0..bit_index]) |_, prev_bit_index| {
|
|
const prev_bit = @intCast(std.math.Log2Int(Int), prev_bit_index);
|
|
const prev_mask = @as(Int, 1) << prev_bit;
|
|
try testing.expect(x.load(.SeqCst) & prev_mask != 0);
|
|
}
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
test "Atomic.bitReset" {
|
|
inline for (atomicIntTypes()) |Int| {
|
|
inline for (atomic_rmw_orderings) |ordering| {
|
|
var x = Atomic(Int).init(0);
|
|
const bit_array = @as([std.meta.bitCount(Int)]void, undefined);
|
|
|
|
for (bit_array) |_, bit_index| {
|
|
const bit = @intCast(std.math.Log2Int(Int), bit_index);
|
|
const mask = @as(Int, 1) << bit;
|
|
x.storeUnchecked(x.loadUnchecked() | mask);
|
|
|
|
// unsetting the bit should change the bit
|
|
try testing.expect(x.load(.SeqCst) & mask != 0);
|
|
try testing.expectEqual(x.bitReset(bit, ordering), 1);
|
|
try testing.expect(x.load(.SeqCst) & mask == 0);
|
|
|
|
// unsetting it again shouldn't change the bit
|
|
try testing.expectEqual(x.bitReset(bit, ordering), 0);
|
|
try testing.expect(x.load(.SeqCst) & mask == 0);
|
|
|
|
// all the previous bits should have not changed (still be reset)
|
|
for (bit_array[0..bit_index]) |_, prev_bit_index| {
|
|
const prev_bit = @intCast(std.math.Log2Int(Int), prev_bit_index);
|
|
const prev_mask = @as(Int, 1) << prev_bit;
|
|
try testing.expect(x.load(.SeqCst) & prev_mask == 0);
|
|
}
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
test "Atomic.bitToggle" {
|
|
inline for (atomicIntTypes()) |Int| {
|
|
inline for (atomic_rmw_orderings) |ordering| {
|
|
var x = Atomic(Int).init(0);
|
|
const bit_array = @as([std.meta.bitCount(Int)]void, undefined);
|
|
|
|
for (bit_array) |_, bit_index| {
|
|
const bit = @intCast(std.math.Log2Int(Int), bit_index);
|
|
const mask = @as(Int, 1) << bit;
|
|
|
|
// toggling the bit should change the bit
|
|
try testing.expect(x.load(.SeqCst) & mask == 0);
|
|
try testing.expectEqual(x.bitToggle(bit, ordering), 0);
|
|
try testing.expect(x.load(.SeqCst) & mask != 0);
|
|
|
|
// toggling it again *should* change the bit
|
|
try testing.expectEqual(x.bitToggle(bit, ordering), 1);
|
|
try testing.expect(x.load(.SeqCst) & mask == 0);
|
|
|
|
// all the previous bits should have not changed (still be toggled back)
|
|
for (bit_array[0..bit_index]) |_, prev_bit_index| {
|
|
const prev_bit = @intCast(std.math.Log2Int(Int), prev_bit_index);
|
|
const prev_mask = @as(Int, 1) << prev_bit;
|
|
try testing.expect(x.load(.SeqCst) & prev_mask == 0);
|
|
}
|
|
}
|
|
}
|
|
}
|
|
}
|