mirror of
https://github.com/ziglang/zig.git
synced 2025-12-25 07:33:08 +00:00
A simple `while(true) {}` loop generates the following LLVMIR:
```
define i32 @main() {
Entry:
br label %Loop
Loop: ; preds = %Loop, %Entry
br label %Loop
}
```
Also implement TZIR printing for loops and add a corresponding test.