Jakub Konka c7f774803a stage2: implement loading-storing via pointer (in register) ...

* load address (pointer) to a stack variable in a register via
  `lea` instruction
* store value on the stack via a pointer stored in a register via
  `mov [reg], imm` instruction
* the lowerings naturally are handled automatically by Mir -> Isel
  layer
* add initial (without safety) implementation of `.optional_payload`
* add matching stage2 test cases

2021-12-31 18:10:28 +01:00

..

aarch64.zig

stage2: clean up tests

2021-12-15 17:28:48 +01:00

arm.zig

stage2 ARM: implement struct_field_ptr and struct_field_val

2021-12-30 14:39:06 +01:00

cbe.zig

stage2: implement switching on unions

2021-10-19 20:22:47 -07:00

llvm.zig

Address Spaces: LLVM F segment address space test

2021-09-20 02:29:04 +02:00

plan9.zig

plan9: add test for std

2021-11-09 07:08:27 -05:00

riscv64.zig

stage2 RISCV64: implement basic function prologue and epilogue

2021-11-20 19:25:59 +01:00

wasm.zig

wasm: Update wasm stage2 test backend to use 'main'

2021-11-29 08:05:51 +01:00

x86_64.zig

stage2: implement loading-storing via pointer (in register)

2021-12-31 18:10:28 +01:00