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231 lines
8.6 KiB
C++
Vendored
231 lines
8.6 KiB
C++
Vendored
/*===------------- amxfp8intrin.h - AMX intrinsics -*- C++ -*----------------===
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*
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* Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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* See https://llvm.org/LICENSE.txt for license information.
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* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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*
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*===------------------------------------------------------------------------===
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*/
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#ifndef __IMMINTRIN_H
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#error "Never use <amxfp8intrin.h> directly; include <immintrin.h> instead."
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#endif /* __IMMINTRIN_H */
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#ifndef __AMXFP8INTRIN_H
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#define __AMXFP8INTRIN_H
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#ifdef __x86_64__
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#define __DEFAULT_FN_ATTRS_FP8 \
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__attribute__((__always_inline__, __nodebug__, __target__("amx-fp8")))
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static __inline__ _tile1024i __DEFAULT_FN_ATTRS_FP8
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_tile_dpbf8ps_internal(unsigned short m, unsigned short n, unsigned short k,
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_tile1024i dst, _tile1024i src1, _tile1024i src2) {
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return __builtin_ia32_tdpbf8ps_internal(m, n, k, dst, src1, src2);
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}
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/// Perform the dot product of a BF8 value \a src1 by a BF8 value \a src2
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/// accumulating into a Single Precision (FP32) source/dest \a dst.
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///
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/// \headerfile <immintrin.h>
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///
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/// \code
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/// void __tile_dpbf8ps (__tile1024i *dst, __tile1024i src1, __tile1024i src2)
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/// \endcode
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///
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/// \code{.operation}
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/// FOR m := 0 TO dst.rows - 1
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/// temp1[(dst.colsb / 4 - 1) : 0] = 0
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/// FOR k := 0 TO src1.colsb / 4 - 1
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/// FOR n := 0 TO dst.colsb / 4 - 1
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/// temp1[n] +=
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/// INT64(src1.row[m].float8[4*k+0]) * INT64(src2.row[k].float8[4*n+0])
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/// + INT64(src1.row[m].float8[4*k+1]) * INT64(src2.row[k].float8[4*n+1])
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/// + INT64(src1.row[m].float8[4*k+2]) * INT64(src2.row[k].float8[4*n+2])
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/// + INT64(src1.row[m].float8[4*k+3]) * INT64(src2.row[k].float8[4*n+3])
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/// ENDFOR
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/// ENDFOR
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/// FOR n := 0 TO dst.colsb / 4 - 1
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/// tmp.row[m].fp32[n] = dst.row[m].fp32[n] + FP32(temp1[n])
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/// ENDFOR
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/// write_row_and_zero(dst, m, tmp, dst.colsb)
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/// zero_upper_rows(dst, dst.rows)
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/// zero_tileconfig_start()
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/// \endcode
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///
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/// This intrinsic corresponds to the \c TDPBF8PS instruction.
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///
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/// \param dst
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/// The destination tile. Max size is 1024 Bytes.
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/// \param src1
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/// The 1st source tile. Max size is 1024 Bytes.
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/// \param src2
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/// The 2nd source tile. Max size is 1024 Bytes.
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__DEFAULT_FN_ATTRS_FP8 static void
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__tile_dpbf8ps(__tile1024i *dst, __tile1024i src1, __tile1024i src2) {
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dst->tile = _tile_dpbf8ps_internal(src1.row, src2.col, src1.col, dst->tile,
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src1.tile, src2.tile);
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}
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static __inline__ _tile1024i __DEFAULT_FN_ATTRS_FP8
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_tile_dpbhf8ps_internal(unsigned short m, unsigned short n, unsigned short k,
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_tile1024i dst, _tile1024i src1, _tile1024i src2) {
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return __builtin_ia32_tdpbhf8ps_internal(m, n, k, dst, src1, src2);
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}
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/// Perform the dot product of a BF8 value \a src1 by an HF8 value \a src2
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/// accumulating into a Single Precision (FP32) source/dest \a dst.
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///
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/// \headerfile <immintrin.h>
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///
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/// \code
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/// void __tile_dpbhf8ps (__tile1024i dst, __tile1024i src1, __tile1024i src2)
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/// \endcode
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///
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/// \code{.operation}
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/// FOR m := 0 TO dst.rows - 1
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/// temp1[(dst.colsb / 4 - 1) : 0] = 0
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/// FOR k := 0 TO src1.colsb / 4 - 1
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/// FOR n := 0 TO dst.colsb / 4 - 1
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/// temp1[n] +=
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/// INT64(src1.row[m].float8[4*k+0]) * INT64(src2.row[k].float8[4*n+0])
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/// + INT64(src1.row[m].float8[4*k+1]) * INT64(src2.row[k].float8[4*n+1])
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/// + INT64(src1.row[m].float8[4*k+2]) * INT64(src2.row[k].float8[4*n+2])
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/// + INT64(src1.row[m].float8[4*k+3]) * INT64(src2.row[k].float8[4*n+3])
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/// ENDFOR
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/// ENDFOR
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/// FOR n := 0 TO dst.colsb / 4 - 1
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/// tmp.row[m].fp32[n] = dst.row[m].fp32[n] + FP32(temp1[n])
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/// ENDFOR
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/// write_row_and_zero(dst, m, tmp, dst.colsb)
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/// zero_upper_rows(dst, dst.rows)
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/// zero_tileconfig_start()
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/// \endcode
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///
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/// This intrinsic corresponds to the \c TDPBHF8PS instruction.
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///
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/// \param dst
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/// The destination tile. Max size is 1024 Bytes.
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/// \param src1
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/// The 1st source tile. Max size is 1024 Bytes.
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/// \param src2
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/// The 2nd source tile. Max size is 1024 Bytes.
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__DEFAULT_FN_ATTRS_FP8 static void
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__tile_dpbhf8ps(__tile1024i *dst, __tile1024i src1, __tile1024i src2) {
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dst->tile = _tile_dpbhf8ps_internal(src1.row, src2.col, src1.col, dst->tile,
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src1.tile, src2.tile);
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}
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static __inline__ _tile1024i __DEFAULT_FN_ATTRS_FP8
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_tile_dphbf8ps_internal(unsigned short m, unsigned short n, unsigned short k,
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_tile1024i dst, _tile1024i src1, _tile1024i src2) {
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return __builtin_ia32_tdphbf8ps_internal(m, n, k, dst, src1, src2);
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}
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/// Perform the dot product of an HF8 value \a src1 by a BF8 value \a src2
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/// accumulating into a Single Precision (FP32) source/dest \a dst.
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///
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/// \headerfile <immintrin.h>
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///
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/// \code
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/// void __tile_dphbf8ps (__tile1024i dst, __tile1024i src1, __tile1024i src2)
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/// \endcode
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///
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/// \code{.operation}
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/// FOR m := 0 TO dst.rows - 1
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/// temp1[(dst.colsb / 4 - 1) : 0] = 0
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/// FOR k := 0 TO src1.colsb / 4 - 1
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/// FOR n := 0 TO dst.colsb / 4 - 1
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/// temp1[n] +=
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/// INT64(src1.row[m].float8[4*k+0]) * INT64(src2.row[k].float8[4*n+0])
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/// + INT64(src1.row[m].float8[4*k+1]) * INT64(src2.row[k].float8[4*n+1])
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/// + INT64(src1.row[m].float8[4*k+2]) * INT64(src2.row[k].float8[4*n+2])
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/// + INT64(src1.row[m].float8[4*k+3]) * INT64(src2.row[k].float8[4*n+3])
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/// ENDFOR
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/// ENDFOR
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/// FOR n := 0 TO dst.colsb / 4 - 1
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/// tmp.row[m].fp32[n] = dst.row[m].fp32[n] + FP32(temp1[n])
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/// ENDFOR
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/// write_row_and_zero(dst, m, tmp, dst.colsb)
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/// zero_upper_rows(dst, dst.rows)
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/// zero_tileconfig_start()
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/// \endcode
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///
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/// This intrinsic corresponds to the \c TDPHBF8PS instruction.
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///
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/// \param dst
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/// The destination tile. Max size is 1024 Bytes.
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/// \param src1
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/// The 1st source tile. Max size is 1024 Bytes.
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/// \param src2
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/// The 2nd source tile. Max size is 1024 Bytes.
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__DEFAULT_FN_ATTRS_FP8 static void
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__tile_dphbf8ps(__tile1024i *dst, __tile1024i src1, __tile1024i src2) {
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dst->tile = _tile_dphbf8ps_internal(src1.row, src2.col, src1.col, dst->tile,
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src1.tile, src2.tile);
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}
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static __inline__ _tile1024i __DEFAULT_FN_ATTRS_FP8
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_tile_dphf8ps_internal(unsigned short m, unsigned short n, unsigned short k,
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_tile1024i dst, _tile1024i src1, _tile1024i src2) {
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return __builtin_ia32_tdphf8ps_internal(m, n, k, dst, src1, src2);
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}
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/// Perform the dot product of an HF8 value \a src1 by an HF8 value \a src2
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/// accumulating into a Single Precision (FP32) source/dest \a dst.
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///
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/// \headerfile <immintrin.h>
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///
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/// \code
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/// void __tile_dphf8ps (__tile1024i dst, __tile1024i src1, __tile1024i src2)
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/// \endcode
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///
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/// \code{.operation}
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/// FOR m := 0 TO dst.rows - 1
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/// temp1[(dst.colsb / 4 - 1) : 0] = 0
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/// FOR k := 0 TO src1.colsb / 4 - 1
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/// FOR n := 0 TO dst.colsb / 4 - 1
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/// temp1[n] +=
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/// INT64(src1.row[m].float8[4*k+0]) * INT64(src2.row[k].float8[4*n+0])
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/// + INT64(src1.row[m].float8[4*k+1]) * INT64(src2.row[k].float8[4*n+1])
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/// + INT64(src1.row[m].float8[4*k+2]) * INT64(src2.row[k].float8[4*n+2])
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/// + INT64(src1.row[m].float8[4*k+3]) * INT64(src2.row[k].float8[4*n+3])
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/// ENDFOR
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/// ENDFOR
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/// FOR n := 0 TO dst.colsb / 4 - 1
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/// tmp.row[m].fp32[n] = dst.row[m].fp32[n] + FP32(temp1[n])
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/// ENDFOR
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/// write_row_and_zero(dst, m, tmp, dst.colsb)
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/// zero_upper_rows(dst, dst.rows)
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/// zero_tileconfig_start()
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/// \endcode
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///
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/// This intrinsic corresponds to the \c TDPHF8PS instruction.
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///
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/// \param dst
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/// The destination tile. Max size is 1024 Bytes.
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/// \param src1
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/// The 1st source tile. Max size is 1024 Bytes.
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/// \param src2
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/// The 2nd source tile. Max size is 1024 Bytes.
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__DEFAULT_FN_ATTRS_FP8 static void
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__tile_dphf8ps(__tile1024i *dst, __tile1024i src1, __tile1024i src2) {
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dst->tile = _tile_dphf8ps_internal(src1.row, src2.col, src1.col, dst->tile,
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src1.tile, src2.tile);
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}
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#define _tile_dpbf8ps(dst, src1, src2) \
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__builtin_ia32_tdpbf8ps((dst), (src1), (src2))
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#define _tile_dpbhf8ps(dst, src1, src2) \
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__builtin_ia32_tdpbhf8ps((dst), (src1), (src2))
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#define _tile_dphbf8ps(dst, src1, src2) \
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__builtin_ia32_tdphbf8ps((dst), (src1), (src2))
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#define _tile_dphf8ps(dst, src1, src2) \
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__builtin_ia32_tdphf8ps((dst), (src1), (src2))
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#undef __DEFAULT_FN_ATTRS_FP8
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#endif /* __x86_64__ */
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#endif /* __AMXFP8INTRIN_H */
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