Andrew Kelley 0bebb688fb stage2: change max int align from 8 to 16 for more ISAs
These targets now have a similar disagreement with LLVM about the
alignment of 128-bit integers as x86_64:
 * riscv64
 * powerpc64
 * powerpc64le
 * mips64
 * mips64el
 * sparcv9

See #2987
2022-05-04 19:11:02 -07:00
..
2022-01-30 21:27:52 +02:00
2020-10-31 12:21:49 +02:00