Frank Denis 0adc144f88 std/crypto: adjust aesni parallelism to CPU models
Intel keeps changing the latency & throughput of the aes* and clmul
instructions every time they release a new model.

Adjust `optimal_parallel_blocks` accordingly, keeping 8 as a safe
default for unknown data.
2020-10-28 21:44:00 +02:00
..
2020-10-28 10:36:19 +01:00
2020-09-11 20:02:41 -04:00
2020-10-26 17:41:29 +01:00
2020-10-26 17:41:29 +01:00
2020-10-28 10:36:19 +01:00
2020-09-04 05:15:03 +03:00
2020-09-11 20:02:41 -04:00
2020-10-19 15:15:43 +02:00
2020-10-07 04:34:09 -04:00
2020-10-26 15:40:48 -04:00
2020-09-04 22:49:14 +03:00
2020-09-22 05:12:21 -07:00