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553cb3ed46
sys/param.h was manually adjusted to not define __NetBSD_Version__ since it will be defined by the compiler.
125 lines
3.9 KiB
C
Vendored
125 lines
3.9 KiB
C
Vendored
/* $NetBSD: reg.h,v 1.10 2022/12/13 22:25:08 skrll Exp $ */
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/*-
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* Copyright (c) 2014 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Matt Thomas of 3am Software Foundry.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _RISCV_REG_H_
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#define _RISCV_REG_H_
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// x0 = 0
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// x1 = ra (return address) Caller
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// x2 = sp (stack pointer) Callee
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// x3 = gp (global pointer)
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// x4 = tp (thread pointer)
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// x5 - x7 = t0 - t2 (temporary) Caller
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// x8 = s0/fp (saved register / frame pointer) Callee
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// x9 = s1 (saved register) Callee
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// x10 - x11 = a0 - a1 (arguments/return values) Caller
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// x12 - x17 = a2 - a7 (arguments) Caller
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// x18 - x27 = s2 - s11 (saved registers) Callee
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// x28 - x31 = t3 - t6 (temporaries) Caller
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struct reg { // synced with register_t in <riscv/types.h>
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#ifdef _LP64
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__uint64_t r_reg[31]; /* x0 is always 0 */
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__uint64_t r_pc;
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#else
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__uint32_t r_reg[31]; /* x0 is always 0 */
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__uint32_t r_pc;
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#endif
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};
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#ifdef _LP64
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struct reg32 { // synced with register_t in <riscv/types.h>
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__uint32_t r_reg[31]; /* x0 is always 0 */
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__uint32_t r_pc;
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};
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#endif
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#define _XREG(n) ((n) - 1)
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#define _X_RA _XREG(1)
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#define _X_SP _XREG(2)
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#define _X_GP _XREG(3)
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#define _X_TP _XREG(4)
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#define _X_T0 _XREG(5)
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#define _X_T1 _XREG(6)
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#define _X_T2 _XREG(7)
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#define _X_S0 _XREG(8)
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#define _X_S1 _XREG(9)
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#define _X_A0 _XREG(10)
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#define _X_A1 _XREG(11)
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#define _X_A2 _XREG(12)
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#define _X_A3 _XREG(13)
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#define _X_A4 _XREG(14)
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#define _X_A5 _XREG(15)
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#define _X_A6 _XREG(16)
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#define _X_A7 _XREG(17)
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#define _X_S2 _XREG(18)
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#define _X_S3 _XREG(19)
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#define _X_S4 _XREG(20)
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#define _X_S5 _XREG(21)
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#define _X_S6 _XREG(22)
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#define _X_S7 _XREG(23)
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#define _X_S8 _XREG(24)
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#define _X_S9 _XREG(25)
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#define _X_S10 _XREG(26)
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#define _X_S11 _XREG(27)
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#define _X_T3 _XREG(28)
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#define _X_T4 _XREG(29)
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#define _X_T5 _XREG(30)
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#define _X_T6 _XREG(31)
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// f0 - f7 = ft0 - ft7 (FP temporaries) Caller
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// following layout is similar to integer registers above
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// f8 - f9 = fs0 - fs1 (FP saved registers) Callee
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// f10 - f11 = fa0 - fa1 (FP arguments/return values) Caller
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// f12 - f17 = fa2 - fa7 (FP arguments) Caller
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// f18 - f27 = fs2 - fa11 (FP saved registers) Callee
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// f28 - f31 = ft8 - ft11 (FP temporaries) Caller
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/*
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* This fragment is common to <riscv/mcontext.h> and <riscv/reg.h>
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*/
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#ifndef _BSD_FPREG_T_
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union __fpreg {
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__uint64_t u_u64;
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double u_d;
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};
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#define _BSD_FPREG_T_ union __fpreg
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#endif
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/*
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* 32 double precision floating point, 1 CSR
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*/
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struct fpreg {
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_BSD_FPREG_T_ r_fpreg[33];
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};
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#define r_fcsr r_fpreg[32].u_u64
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#endif /* _RISCV_REG_H_ */ |