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58 lines
1.8 KiB
C
Vendored
58 lines
1.8 KiB
C
Vendored
/*===---- prfchwintrin.h - PREFETCHW intrinsic -----------------------------===
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*
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* Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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* See https://llvm.org/LICENSE.txt for license information.
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* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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*
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*===-----------------------------------------------------------------------===
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*/
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#if !defined(__X86INTRIN_H) && !defined(_MM3DNOW_H_INCLUDED)
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#error "Never use <prfchwintrin.h> directly; include <x86intrin.h> instead."
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#endif
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#ifndef __PRFCHWINTRIN_H
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#define __PRFCHWINTRIN_H
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#if defined(__cplusplus)
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extern "C" {
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#endif
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/// Loads a memory sequence containing the specified memory address into
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/// all data cache levels.
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///
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/// The cache-coherency state is set to exclusive. Data can be read from
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/// and written to the cache line without additional delay.
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///
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/// \headerfile <x86intrin.h>
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///
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/// This intrinsic corresponds to the \c PREFETCHT0 instruction.
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///
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/// \param __P
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/// A pointer specifying the memory address to be prefetched.
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void _m_prefetch(void *__P);
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/// Loads a memory sequence containing the specified memory address into
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/// the L1 data cache and sets the cache-coherency state to modified.
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///
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/// This provides a hint to the processor that the cache line will be
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/// modified. It is intended for use when the cache line will be written to
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/// shortly after the prefetch is performed.
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///
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/// Note that the effect of this intrinsic is dependent on the processor
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/// implementation.
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///
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/// \headerfile <x86intrin.h>
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///
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/// This intrinsic corresponds to the \c PREFETCHW instruction.
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///
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/// \param __P
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/// A pointer specifying the memory address to be prefetched.
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void _m_prefetchw(volatile const void *__P);
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#if defined(__cplusplus)
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} // extern "C"
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#endif
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#endif /* __PRFCHWINTRIN_H */
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