const FeatureInfo = @import("std").target.feature.FeatureInfo; pub const ArmFeature = enum { Armv2, Armv2a, Armv3, Armv3m, Armv4, Armv4t, Armv5t, Armv5te, Armv5tej, Armv6, Armv6j, Armv6k, Armv6kz, Armv6M, Armv6sM, Armv6t2, Armv7A, Armv7eM, Armv7k, Armv7M, Armv7R, Armv7s, Armv7ve, Armv8A, Armv8Mbase, Armv8Mmain, Armv8R, Armv81A, Armv81Mmain, Armv82A, Armv83A, Armv84A, Armv85A, Msecext8, Aclass, Aes, AcquireRelease, AvoidMovsShop, AvoidPartialCpsr, Crc, CheapPredicableCpsr, VldnAlign, Crypto, D32, Db, Dfb, Dsp, DontWidenVmovs, Dotprod, ExecuteOnly, ExpandFpMlx, Fp16, Fp16fml, Fp64, Fpao, FpArmv8, FpArmv8d16, FpArmv8d16sp, FpArmv8sp, Fpregs, Fpregs16, Fpregs64, Fullfp16, FuseAes, FuseLiterals, HwdivArm, Hwdiv, NoBranchPredictor, RetAddrStack, Slowfpvmlx, VmlxHazards, Lob, LongCalls, Mclass, Mp, Mve1beat, Mve2beat, Mve4beat, MuxedUnits, Neon, Neonfp, NeonFpmovs, NaclTrap, Noarm, NoMovt, NoNegImmediates, DisablePostraScheduler, NonpipelinedVfp, Perfmon, Bit32, PreferIshst, LoopAlign, PreferVmovsr, ProfUnpr, Ras, Rclass, ReadTpHard, ReserveR9, Sb, Sha2, SlowFpBrcc, SlowLoadDSubreg, SlowOddReg, SlowVdup32, SlowVgetlni32, SplatVfpNeon, StrictAlign, Thumb2, Trustzone, UseAa, UseMisched, WideStrideVfp, V7clrex, Vfp2, Vfp2sp, Vfp3, Vfp3d16, Vfp3d16sp, Vfp3sp, Vfp4, Vfp4d16, Vfp4d16sp, Vfp4sp, VmlxForwarding, Virtualization, Zcz, Mvefp, Mve, V4t, V5te, V5t, V6k, V6m, V6, V6t2, V7, V8m, V8mmain, V8, V81mmain, V81a, V82a, V83a, V84a, V85a, Iwmmxt, Iwmmxt2, SoftFloat, ThumbMode, A5, A7, A8, A9, A12, A15, A17, A32, A35, A53, A55, A57, A72, A73, A75, A76, Exynos, Krait, Kryo, M3, R4, R5, R7, R52, Swift, Xscale, pub fn getInfo(self: @This()) FeatureInfo { return feature_infos[@enumToInt(self)]; } pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) { FeatureInfo(@This()).create(.Armv2, "armv2", "ARMv2 architecture", "armv2"), FeatureInfo(@This()).create(.Armv2a, "armv2a", "ARMv2a architecture", "armv2a"), FeatureInfo(@This()).create(.Armv3, "armv3", "ARMv3 architecture", "armv3"), FeatureInfo(@This()).create(.Armv3m, "armv3m", "ARMv3m architecture", "armv3m"), FeatureInfo(@This()).create(.Armv4, "armv4", "ARMv4 architecture", "armv4"), FeatureInfo(@This()).createWithSubfeatures(.Armv4t, "armv4t", "ARMv4t architecture", "armv4t", &[_]@This() { .V4t, }), FeatureInfo(@This()).createWithSubfeatures(.Armv5t, "armv5t", "ARMv5t architecture", "armv5t", &[_]@This() { .V4t, }), FeatureInfo(@This()).createWithSubfeatures(.Armv5te, "armv5te", "ARMv5te architecture", "armv5te", &[_]@This() { .V4t, }), FeatureInfo(@This()).createWithSubfeatures(.Armv5tej, "armv5tej", "ARMv5tej architecture", "armv5tej", &[_]@This() { .V4t, }), FeatureInfo(@This()).createWithSubfeatures(.Armv6, "armv6", "ARMv6 architecture", "armv6", &[_]@This() { .V4t, .Dsp, }), FeatureInfo(@This()).createWithSubfeatures(.Armv6j, "armv6j", "ARMv7a architecture", "armv6j", &[_]@This() { .V4t, .Dsp, }), FeatureInfo(@This()).createWithSubfeatures(.Armv6k, "armv6k", "ARMv6k architecture", "armv6k", &[_]@This() { .V4t, }), FeatureInfo(@This()).createWithSubfeatures(.Armv6kz, "armv6kz", "ARMv6kz architecture", "armv6kz", &[_]@This() { .V4t, .Trustzone, }), FeatureInfo(@This()).createWithSubfeatures(.Armv6M, "armv6-m", "ARMv6m architecture", "armv6-m", &[_]@This() { .Mclass, .StrictAlign, .ThumbMode, .Db, .V4t, .Noarm, }), FeatureInfo(@This()).createWithSubfeatures(.Armv6sM, "armv6s-m", "ARMv6sm architecture", "armv6s-m", &[_]@This() { .Mclass, .StrictAlign, .ThumbMode, .Db, .V4t, .Noarm, }), FeatureInfo(@This()).createWithSubfeatures(.Armv6t2, "armv6t2", "ARMv6t2 architecture", "armv6t2", &[_]@This() { .Thumb2, .V4t, .Dsp, }), FeatureInfo(@This()).createWithSubfeatures(.Armv7A, "armv7-a", "ARMv7a architecture", "armv7-a", &[_]@This() { .Thumb2, .Perfmon, .Db, .Dsp, .V7clrex, .V4t, .Fpregs, .D32, .Aclass, }), FeatureInfo(@This()).createWithSubfeatures(.Armv7eM, "armv7e-m", "ARMv7em architecture", "armv7e-m", &[_]@This() { .Thumb2, .Mclass, .Perfmon, .ThumbMode, .Db, .Dsp, .V7clrex, .V4t, .Hwdiv, .Noarm, }), FeatureInfo(@This()).createWithSubfeatures(.Armv7k, "armv7k", "ARMv7a architecture", "armv7k", &[_]@This() { .Thumb2, .Perfmon, .Db, .Dsp, .V7clrex, .V4t, .Fpregs, .D32, .Aclass, }), FeatureInfo(@This()).createWithSubfeatures(.Armv7M, "armv7-m", "ARMv7m architecture", "armv7-m", &[_]@This() { .Thumb2, .Mclass, .Perfmon, .ThumbMode, .Db, .V7clrex, .V4t, .Hwdiv, .Noarm, }), FeatureInfo(@This()).createWithSubfeatures(.Armv7R, "armv7-r", "ARMv7r architecture", "armv7-r", &[_]@This() { .Thumb2, .Perfmon, .Db, .Dsp, .Rclass, .V7clrex, .V4t, .Hwdiv, }), FeatureInfo(@This()).createWithSubfeatures(.Armv7s, "armv7s", "ARMv7a architecture", "armv7s", &[_]@This() { .Thumb2, .Perfmon, .Db, .Dsp, .V7clrex, .V4t, .Fpregs, .D32, .Aclass, }), FeatureInfo(@This()).createWithSubfeatures(.Armv7ve, "armv7ve", "ARMv7ve architecture", "armv7ve", &[_]@This() { .Thumb2, .Mp, .Perfmon, .Db, .Dsp, .V7clrex, .V4t, .Fpregs, .D32, .Hwdiv, .HwdivArm, .Aclass, .Trustzone, }), FeatureInfo(@This()).createWithSubfeatures(.Armv8A, "armv8-a", "ARMv8a architecture", "armv8-a", &[_]@This() { .Thumb2, .Mp, .Perfmon, .Db, .Crc, .Fp16, .Dsp, .V7clrex, .V4t, .Fpregs, .D32, .Hwdiv, .HwdivArm, .Aclass, .Trustzone, .AcquireRelease, }), FeatureInfo(@This()).createWithSubfeatures(.Armv8Mbase, "armv8-m.base", "ARMv8mBaseline architecture", "armv8-m.base", &[_]@This() { .Mclass, .StrictAlign, .ThumbMode, .Db, .Msecext8, .V7clrex, .V4t, .Hwdiv, .Noarm, .AcquireRelease, }), FeatureInfo(@This()).createWithSubfeatures(.Armv8Mmain, "armv8-m.main", "ARMv8mMainline architecture", "armv8-m.main", &[_]@This() { .Thumb2, .Mclass, .Perfmon, .ThumbMode, .Db, .Msecext8, .V7clrex, .V4t, .Hwdiv, .Noarm, .AcquireRelease, }), FeatureInfo(@This()).createWithSubfeatures(.Armv8R, "armv8-r", "ARMv8r architecture", "armv8-r", &[_]@This() { .Thumb2, .Mp, .Perfmon, .Db, .Crc, .Fp16, .Dfb, .Dsp, .Rclass, .V7clrex, .V4t, .Fpregs, .D32, .Hwdiv, .HwdivArm, .AcquireRelease, }), FeatureInfo(@This()).createWithSubfeatures(.Armv81A, "armv8.1-a", "ARMv81a architecture", "armv8.1-a", &[_]@This() { .Thumb2, .Mp, .Perfmon, .Db, .Crc, .Fp16, .Dsp, .V7clrex, .V4t, .Fpregs, .D32, .Hwdiv, .HwdivArm, .Aclass, .Trustzone, .AcquireRelease, }), FeatureInfo(@This()).createWithSubfeatures(.Armv81Mmain, "armv8.1-m.main", "ARMv81mMainline architecture", "armv8.1-m.main", &[_]@This() { .Thumb2, .Mclass, .Perfmon, .ThumbMode, .Db, .Msecext8, .Ras, .V7clrex, .V4t, .Hwdiv, .Noarm, .Lob, .AcquireRelease, }), FeatureInfo(@This()).createWithSubfeatures(.Armv82A, "armv8.2-a", "ARMv82a architecture", "armv8.2-a", &[_]@This() { .Thumb2, .Mp, .Perfmon, .Db, .Crc, .Fp16, .Ras, .Dsp, .V7clrex, .V4t, .Fpregs, .D32, .Hwdiv, .HwdivArm, .Aclass, .Trustzone, .AcquireRelease, }), FeatureInfo(@This()).createWithSubfeatures(.Armv83A, "armv8.3-a", "ARMv83a architecture", "armv8.3-a", &[_]@This() { .Thumb2, .Mp, .Perfmon, .Db, .Crc, .Fp16, .Ras, .Dsp, .V7clrex, .V4t, .Fpregs, .D32, .Hwdiv, .HwdivArm, .Aclass, .Trustzone, .AcquireRelease, }), FeatureInfo(@This()).createWithSubfeatures(.Armv84A, "armv8.4-a", "ARMv84a architecture", "armv8.4-a", &[_]@This() { .Thumb2, .Mp, .Perfmon, .Db, .Crc, .Fp16, .Ras, .Dsp, .V7clrex, .V4t, .Fpregs, .D32, .Hwdiv, .HwdivArm, .Aclass, .Trustzone, .AcquireRelease, }), FeatureInfo(@This()).createWithSubfeatures(.Armv85A, "armv8.5-a", "ARMv85a architecture", "armv8.5-a", &[_]@This() { .Thumb2, .Mp, .Perfmon, .Sb, .Db, .Crc, .Fp16, .Ras, .Dsp, .V7clrex, .V4t, .Fpregs, .D32, .Hwdiv, .HwdivArm, .Aclass, .Trustzone, .AcquireRelease, }), FeatureInfo(@This()).create(.Msecext8, "8msecext", "Enable support for ARMv8-M Security Extensions", "8msecext"), FeatureInfo(@This()).create(.Aclass, "aclass", "Is application profile ('A' series)", "aclass"), FeatureInfo(@This()).createWithSubfeatures(.Aes, "aes", "Enable AES support", "aes", &[_]@This() { .Fpregs, .D32, }), FeatureInfo(@This()).create(.AcquireRelease, "acquire-release", "Has v8 acquire/release (lda/ldaex etc) instructions", "acquire-release"), FeatureInfo(@This()).create(.AvoidMovsShop, "avoid-movs-shop", "Avoid movs instructions with shifter operand", "avoid-movs-shop"), FeatureInfo(@This()).create(.AvoidPartialCpsr, "avoid-partial-cpsr", "Avoid CPSR partial update for OOO execution", "avoid-partial-cpsr"), FeatureInfo(@This()).create(.Crc, "crc", "Enable support for CRC instructions", "crc"), FeatureInfo(@This()).create(.CheapPredicableCpsr, "cheap-predicable-cpsr", "Disable +1 predication cost for instructions updating CPSR", "cheap-predicable-cpsr"), FeatureInfo(@This()).create(.VldnAlign, "vldn-align", "Check for VLDn unaligned access", "vldn-align"), FeatureInfo(@This()).createWithSubfeatures(.Crypto, "crypto", "Enable support for Cryptography extensions", "crypto", &[_]@This() { .Fpregs, .D32, }), FeatureInfo(@This()).create(.D32, "d32", "Extend FP to 32 double registers", "d32"), FeatureInfo(@This()).create(.Db, "db", "Has data barrier (dmb/dsb) instructions", "db"), FeatureInfo(@This()).create(.Dfb, "dfb", "Has full data barrier (dfb) instruction", "dfb"), FeatureInfo(@This()).create(.Dsp, "dsp", "Supports DSP instructions in ARM and/or Thumb2", "dsp"), FeatureInfo(@This()).create(.DontWidenVmovs, "dont-widen-vmovs", "Don't widen VMOVS to VMOVD", "dont-widen-vmovs"), FeatureInfo(@This()).createWithSubfeatures(.Dotprod, "dotprod", "Enable support for dot product instructions", "dotprod", &[_]@This() { .Fpregs, .D32, }), FeatureInfo(@This()).create(.ExecuteOnly, "execute-only", "Enable the generation of execute only code.", "execute-only"), FeatureInfo(@This()).create(.ExpandFpMlx, "expand-fp-mlx", "Expand VFP/NEON MLA/MLS instructions", "expand-fp-mlx"), FeatureInfo(@This()).create(.Fp16, "fp16", "Enable half-precision floating point", "fp16"), FeatureInfo(@This()).createWithSubfeatures(.Fp16fml, "fp16fml", "Enable full half-precision floating point fml instructions", "fp16fml", &[_]@This() { .Fp16, .Fpregs, }), FeatureInfo(@This()).createWithSubfeatures(.Fp64, "fp64", "Floating point unit supports double precision", "fp64", &[_]@This() { .Fpregs, }), FeatureInfo(@This()).create(.Fpao, "fpao", "Enable fast computation of positive address offsets", "fpao"), FeatureInfo(@This()).createWithSubfeatures(.FpArmv8, "fp-armv8", "Enable ARMv8 FP", "fp-armv8", &[_]@This() { .Fp16, .Fpregs, .D32, }), FeatureInfo(@This()).createWithSubfeatures(.FpArmv8d16, "fp-armv8d16", "Enable ARMv8 FP with only 16 d-registers", "fp-armv8d16", &[_]@This() { .Fp16, .Fpregs, }), FeatureInfo(@This()).createWithSubfeatures(.FpArmv8d16sp, "fp-armv8d16sp", "Enable ARMv8 FP with only 16 d-registers and no double precision", "fp-armv8d16sp", &[_]@This() { .Fp16, .Fpregs, }), FeatureInfo(@This()).createWithSubfeatures(.FpArmv8sp, "fp-armv8sp", "Enable ARMv8 FP with no double precision", "fp-armv8sp", &[_]@This() { .Fp16, .Fpregs, .D32, }), FeatureInfo(@This()).create(.Fpregs, "fpregs", "Enable FP registers", "fpregs"), FeatureInfo(@This()).createWithSubfeatures(.Fpregs16, "fpregs16", "Enable 16-bit FP registers", "fpregs16", &[_]@This() { .Fpregs, }), FeatureInfo(@This()).createWithSubfeatures(.Fpregs64, "fpregs64", "Enable 64-bit FP registers", "fpregs64", &[_]@This() { .Fpregs, }), FeatureInfo(@This()).createWithSubfeatures(.Fullfp16, "fullfp16", "Enable full half-precision floating point", "fullfp16", &[_]@This() { .Fp16, .Fpregs, }), FeatureInfo(@This()).create(.FuseAes, "fuse-aes", "CPU fuses AES crypto operations", "fuse-aes"), FeatureInfo(@This()).create(.FuseLiterals, "fuse-literals", "CPU fuses literal generation operations", "fuse-literals"), FeatureInfo(@This()).create(.HwdivArm, "hwdiv-arm", "Enable divide instructions in ARM mode", "hwdiv-arm"), FeatureInfo(@This()).create(.Hwdiv, "hwdiv", "Enable divide instructions in Thumb", "hwdiv"), FeatureInfo(@This()).create(.NoBranchPredictor, "no-branch-predictor", "Has no branch predictor", "no-branch-predictor"), FeatureInfo(@This()).create(.RetAddrStack, "ret-addr-stack", "Has return address stack", "ret-addr-stack"), FeatureInfo(@This()).create(.Slowfpvmlx, "slowfpvmlx", "Disable VFP / NEON MAC instructions", "slowfpvmlx"), FeatureInfo(@This()).create(.VmlxHazards, "vmlx-hazards", "Has VMLx hazards", "vmlx-hazards"), FeatureInfo(@This()).create(.Lob, "lob", "Enable Low Overhead Branch extensions", "lob"), FeatureInfo(@This()).create(.LongCalls, "long-calls", "Generate calls via indirect call instructions", "long-calls"), FeatureInfo(@This()).create(.Mclass, "mclass", "Is microcontroller profile ('M' series)", "mclass"), FeatureInfo(@This()).create(.Mp, "mp", "Supports Multiprocessing extension", "mp"), FeatureInfo(@This()).create(.Mve1beat, "mve1beat", "Model MVE instructions as a 1 beat per tick architecture", "mve1beat"), FeatureInfo(@This()).create(.Mve2beat, "mve2beat", "Model MVE instructions as a 2 beats per tick architecture", "mve2beat"), FeatureInfo(@This()).create(.Mve4beat, "mve4beat", "Model MVE instructions as a 4 beats per tick architecture", "mve4beat"), FeatureInfo(@This()).create(.MuxedUnits, "muxed-units", "Has muxed AGU and NEON/FPU", "muxed-units"), FeatureInfo(@This()).createWithSubfeatures(.Neon, "neon", "Enable NEON instructions", "neon", &[_]@This() { .Fpregs, .D32, }), FeatureInfo(@This()).create(.Neonfp, "neonfp", "Use NEON for single precision FP", "neonfp"), FeatureInfo(@This()).create(.NeonFpmovs, "neon-fpmovs", "Convert VMOVSR, VMOVRS, VMOVS to NEON", "neon-fpmovs"), FeatureInfo(@This()).create(.NaclTrap, "nacl-trap", "NaCl trap", "nacl-trap"), FeatureInfo(@This()).create(.Noarm, "noarm", "Does not support ARM mode execution", "noarm"), FeatureInfo(@This()).create(.NoMovt, "no-movt", "Don't use movt/movw pairs for 32-bit imms", "no-movt"), FeatureInfo(@This()).create(.NoNegImmediates, "no-neg-immediates", "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.", "no-neg-immediates"), FeatureInfo(@This()).create(.DisablePostraScheduler, "disable-postra-scheduler", "Don't schedule again after register allocation", "disable-postra-scheduler"), FeatureInfo(@This()).create(.NonpipelinedVfp, "nonpipelined-vfp", "VFP instructions are not pipelined", "nonpipelined-vfp"), FeatureInfo(@This()).create(.Perfmon, "perfmon", "Enable support for Performance Monitor extensions", "perfmon"), FeatureInfo(@This()).create(.Bit32, "32bit", "Prefer 32-bit Thumb instrs", "32bit"), FeatureInfo(@This()).create(.PreferIshst, "prefer-ishst", "Prefer ISHST barriers", "prefer-ishst"), FeatureInfo(@This()).create(.LoopAlign, "loop-align", "Prefer 32-bit alignment for loops", "loop-align"), FeatureInfo(@This()).create(.PreferVmovsr, "prefer-vmovsr", "Prefer VMOVSR", "prefer-vmovsr"), FeatureInfo(@This()).create(.ProfUnpr, "prof-unpr", "Is profitable to unpredicate", "prof-unpr"), FeatureInfo(@This()).create(.Ras, "ras", "Enable Reliability, Availability and Serviceability extensions", "ras"), FeatureInfo(@This()).create(.Rclass, "rclass", "Is realtime profile ('R' series)", "rclass"), FeatureInfo(@This()).create(.ReadTpHard, "read-tp-hard", "Reading thread pointer from register", "read-tp-hard"), FeatureInfo(@This()).create(.ReserveR9, "reserve-r9", "Reserve R9, making it unavailable as GPR", "reserve-r9"), FeatureInfo(@This()).create(.Sb, "sb", "Enable v8.5a Speculation Barrier", "sb"), FeatureInfo(@This()).createWithSubfeatures(.Sha2, "sha2", "Enable SHA1 and SHA256 support", "sha2", &[_]@This() { .Fpregs, .D32, }), FeatureInfo(@This()).create(.SlowFpBrcc, "slow-fp-brcc", "FP compare + branch is slow", "slow-fp-brcc"), FeatureInfo(@This()).create(.SlowLoadDSubreg, "slow-load-D-subreg", "Loading into D subregs is slow", "slow-load-D-subreg"), FeatureInfo(@This()).create(.SlowOddReg, "slow-odd-reg", "VLDM/VSTM starting with an odd register is slow", "slow-odd-reg"), FeatureInfo(@This()).create(.SlowVdup32, "slow-vdup32", "Has slow VDUP32 - prefer VMOV", "slow-vdup32"), FeatureInfo(@This()).create(.SlowVgetlni32, "slow-vgetlni32", "Has slow VGETLNi32 - prefer VMOV", "slow-vgetlni32"), FeatureInfo(@This()).createWithSubfeatures(.SplatVfpNeon, "splat-vfp-neon", "Splat register from VFP to NEON", "splat-vfp-neon", &[_]@This() { .DontWidenVmovs, }), FeatureInfo(@This()).create(.StrictAlign, "strict-align", "Disallow all unaligned memory access", "strict-align"), FeatureInfo(@This()).create(.Thumb2, "thumb2", "Enable Thumb2 instructions", "thumb2"), FeatureInfo(@This()).create(.Trustzone, "trustzone", "Enable support for TrustZone security extensions", "trustzone"), FeatureInfo(@This()).create(.UseAa, "use-aa", "Use alias analysis during codegen", "use-aa"), FeatureInfo(@This()).create(.UseMisched, "use-misched", "Use the MachineScheduler", "use-misched"), FeatureInfo(@This()).create(.WideStrideVfp, "wide-stride-vfp", "Use a wide stride when allocating VFP registers", "wide-stride-vfp"), FeatureInfo(@This()).create(.V7clrex, "v7clrex", "Has v7 clrex instruction", "v7clrex"), FeatureInfo(@This()).createWithSubfeatures(.Vfp2, "vfp2", "Enable VFP2 instructions", "vfp2", &[_]@This() { .Fpregs, }), FeatureInfo(@This()).createWithSubfeatures(.Vfp2sp, "vfp2sp", "Enable VFP2 instructions with no double precision", "vfp2sp", &[_]@This() { .Fpregs, }), FeatureInfo(@This()).createWithSubfeatures(.Vfp3, "vfp3", "Enable VFP3 instructions", "vfp3", &[_]@This() { .Fpregs, .D32, }), FeatureInfo(@This()).createWithSubfeatures(.Vfp3d16, "vfp3d16", "Enable VFP3 instructions with only 16 d-registers", "vfp3d16", &[_]@This() { .Fpregs, }), FeatureInfo(@This()).createWithSubfeatures(.Vfp3d16sp, "vfp3d16sp", "Enable VFP3 instructions with only 16 d-registers and no double precision", "vfp3d16sp", &[_]@This() { .Fpregs, }), FeatureInfo(@This()).createWithSubfeatures(.Vfp3sp, "vfp3sp", "Enable VFP3 instructions with no double precision", "vfp3sp", &[_]@This() { .Fpregs, .D32, }), FeatureInfo(@This()).createWithSubfeatures(.Vfp4, "vfp4", "Enable VFP4 instructions", "vfp4", &[_]@This() { .Fp16, .Fpregs, .D32, }), FeatureInfo(@This()).createWithSubfeatures(.Vfp4d16, "vfp4d16", "Enable VFP4 instructions with only 16 d-registers", "vfp4d16", &[_]@This() { .Fp16, .Fpregs, }), FeatureInfo(@This()).createWithSubfeatures(.Vfp4d16sp, "vfp4d16sp", "Enable VFP4 instructions with only 16 d-registers and no double precision", "vfp4d16sp", &[_]@This() { .Fp16, .Fpregs, }), FeatureInfo(@This()).createWithSubfeatures(.Vfp4sp, "vfp4sp", "Enable VFP4 instructions with no double precision", "vfp4sp", &[_]@This() { .Fp16, .Fpregs, .D32, }), FeatureInfo(@This()).create(.VmlxForwarding, "vmlx-forwarding", "Has multiplier accumulator forwarding", "vmlx-forwarding"), FeatureInfo(@This()).createWithSubfeatures(.Virtualization, "virtualization", "Supports Virtualization extension", "virtualization", &[_]@This() { .HwdivArm, .Hwdiv, }), FeatureInfo(@This()).create(.Zcz, "zcz", "Has zero-cycle zeroing instructions", "zcz"), FeatureInfo(@This()).createWithSubfeatures(.Mvefp, "mve.fp", "Support M-Class Vector Extension with integer and floating ops", "mve.fp", &[_]@This() { .Thumb2, .Perfmon, .Fp16, .Dsp, .V7clrex, .V4t, .Fpregs, }), FeatureInfo(@This()).createWithSubfeatures(.Mve, "mve", "Support M-Class Vector Extension with integer ops", "mve", &[_]@This() { .Thumb2, .Perfmon, .Dsp, .V7clrex, .V4t, .Fpregs, }), FeatureInfo(@This()).create(.V4t, "v4t", "Support ARM v4T instructions", "v4t"), FeatureInfo(@This()).createWithSubfeatures(.V5te, "v5te", "Support ARM v5TE, v5TEj, and v5TExp instructions", "v5te", &[_]@This() { .V4t, }), FeatureInfo(@This()).createWithSubfeatures(.V5t, "v5t", "Support ARM v5T instructions", "v5t", &[_]@This() { .V4t, }), FeatureInfo(@This()).createWithSubfeatures(.V6k, "v6k", "Support ARM v6k instructions", "v6k", &[_]@This() { .V4t, }), FeatureInfo(@This()).createWithSubfeatures(.V6m, "v6m", "Support ARM v6M instructions", "v6m", &[_]@This() { .V4t, }), FeatureInfo(@This()).createWithSubfeatures(.V6, "v6", "Support ARM v6 instructions", "v6", &[_]@This() { .V4t, }), FeatureInfo(@This()).createWithSubfeatures(.V6t2, "v6t2", "Support ARM v6t2 instructions", "v6t2", &[_]@This() { .Thumb2, .V4t, }), FeatureInfo(@This()).createWithSubfeatures(.V7, "v7", "Support ARM v7 instructions", "v7", &[_]@This() { .V7clrex, .V4t, .Perfmon, .Thumb2, }), FeatureInfo(@This()).createWithSubfeatures(.V8m, "v8m", "Support ARM v8M Baseline instructions", "v8m", &[_]@This() { .V4t, }), FeatureInfo(@This()).createWithSubfeatures(.V8mmain, "v8m.main", "Support ARM v8M Mainline instructions", "v8m.main", &[_]@This() { .V7clrex, .V4t, .Perfmon, .Thumb2, }), FeatureInfo(@This()).createWithSubfeatures(.V8, "v8", "Support ARM v8 instructions", "v8", &[_]@This() { .Thumb2, .Perfmon, .V7clrex, .V4t, .AcquireRelease, }), FeatureInfo(@This()).createWithSubfeatures(.V81mmain, "v8.1m.main", "Support ARM v8-1M Mainline instructions", "v8.1m.main", &[_]@This() { .V7clrex, .V4t, .Perfmon, .Thumb2, }), FeatureInfo(@This()).createWithSubfeatures(.V81a, "v8.1a", "Support ARM v8.1a instructions", "v8.1a", &[_]@This() { .Thumb2, .Perfmon, .V7clrex, .V4t, .AcquireRelease, }), FeatureInfo(@This()).createWithSubfeatures(.V82a, "v8.2a", "Support ARM v8.2a instructions", "v8.2a", &[_]@This() { .Thumb2, .Perfmon, .V7clrex, .V4t, .AcquireRelease, }), FeatureInfo(@This()).createWithSubfeatures(.V83a, "v8.3a", "Support ARM v8.3a instructions", "v8.3a", &[_]@This() { .Thumb2, .Perfmon, .V7clrex, .V4t, .AcquireRelease, }), FeatureInfo(@This()).createWithSubfeatures(.V84a, "v8.4a", "Support ARM v8.4a instructions", "v8.4a", &[_]@This() { .Thumb2, .Perfmon, .V7clrex, .V4t, .Fpregs, .D32, .AcquireRelease, }), FeatureInfo(@This()).createWithSubfeatures(.V85a, "v8.5a", "Support ARM v8.5a instructions", "v8.5a", &[_]@This() { .Thumb2, .Perfmon, .Sb, .V7clrex, .V4t, .Fpregs, .D32, .AcquireRelease, }), FeatureInfo(@This()).createWithSubfeatures(.Iwmmxt, "iwmmxt", "ARMv5te architecture", "iwmmxt", &[_]@This() { .V4t, }), FeatureInfo(@This()).createWithSubfeatures(.Iwmmxt2, "iwmmxt2", "ARMv5te architecture", "iwmmxt2", &[_]@This() { .V4t, }), FeatureInfo(@This()).create(.SoftFloat, "soft-float", "Use software floating point features.", "soft-float"), FeatureInfo(@This()).create(.ThumbMode, "thumb-mode", "Thumb mode", "thumb-mode"), FeatureInfo(@This()).create(.A5, "a5", "Cortex-A5 ARM processors", "a5"), FeatureInfo(@This()).create(.A7, "a7", "Cortex-A7 ARM processors", "a7"), FeatureInfo(@This()).create(.A8, "a8", "Cortex-A8 ARM processors", "a8"), FeatureInfo(@This()).create(.A9, "a9", "Cortex-A9 ARM processors", "a9"), FeatureInfo(@This()).create(.A12, "a12", "Cortex-A12 ARM processors", "a12"), FeatureInfo(@This()).create(.A15, "a15", "Cortex-A15 ARM processors", "a15"), FeatureInfo(@This()).create(.A17, "a17", "Cortex-A17 ARM processors", "a17"), FeatureInfo(@This()).create(.A32, "a32", "Cortex-A32 ARM processors", "a32"), FeatureInfo(@This()).create(.A35, "a35", "Cortex-A35 ARM processors", "a35"), FeatureInfo(@This()).create(.A53, "a53", "Cortex-A53 ARM processors", "a53"), FeatureInfo(@This()).create(.A55, "a55", "Cortex-A55 ARM processors", "a55"), FeatureInfo(@This()).create(.A57, "a57", "Cortex-A57 ARM processors", "a57"), FeatureInfo(@This()).create(.A72, "a72", "Cortex-A72 ARM processors", "a72"), FeatureInfo(@This()).create(.A73, "a73", "Cortex-A73 ARM processors", "a73"), FeatureInfo(@This()).create(.A75, "a75", "Cortex-A75 ARM processors", "a75"), FeatureInfo(@This()).create(.A76, "a76", "Cortex-A76 ARM processors", "a76"), FeatureInfo(@This()).createWithSubfeatures(.Exynos, "exynos", "Samsung Exynos processors", "exynos", &[_]@This() { .Zcz, .SlowVdup32, .SlowVgetlni32, .DontWidenVmovs, .Crc, .FuseAes, .WideStrideVfp, .ProfUnpr, .Slowfpvmlx, .SlowFpBrcc, .FuseLiterals, .Fpregs, .D32, .ExpandFpMlx, .Hwdiv, .HwdivArm, .RetAddrStack, .UseAa, }), FeatureInfo(@This()).create(.Krait, "krait", "Qualcomm Krait processors", "krait"), FeatureInfo(@This()).create(.Kryo, "kryo", "Qualcomm Kryo processors", "kryo"), FeatureInfo(@This()).create(.M3, "m3", "Cortex-M3 ARM processors", "m3"), FeatureInfo(@This()).create(.R4, "r4", "Cortex-R4 ARM processors", "r4"), FeatureInfo(@This()).create(.R5, "r5", "Cortex-R5 ARM processors", "r5"), FeatureInfo(@This()).create(.R7, "r7", "Cortex-R7 ARM processors", "r7"), FeatureInfo(@This()).create(.R52, "r52", "Cortex-R52 ARM processors", "r52"), FeatureInfo(@This()).create(.Swift, "swift", "Swift ARM processors", "swift"), FeatureInfo(@This()).createWithSubfeatures(.Xscale, "xscale", "ARMv5te architecture", "xscale", &[_]@This() { .V4t, }), }; };