std.zig.system.linux: implement s390x native CPU detection

https://github.com/llvm/llvm-project/issues/168992

.forgejo/workflows/ci.yaml

@@ -40,7 +40,7 @@ jobs:
           fetch-depth: 0
       - name: Build and Test
         run: sh ci/loongarch64-linux-debug.sh
-        timeout-minutes: 180
+        timeout-minutes: 240
   loongarch64-linux-release:
     runs-on: [self-hosted, loongarch64-linux]
     steps:

lib/std/crypto/ml_kem.zig

@@ -1446,6 +1446,8 @@ fn randPolyNormalized(rnd: anytype) Poly {
 }
 
 test "MulHat" {
+    if (comptime builtin.cpu.has(.s390x, .vector)) return error.SkipZigTest;
+
     var rnd = RndGen.init(0);
 
     for (0..100) |_| {
@@ -1600,6 +1602,8 @@ test "Polynomial packing" {
 }
 
 test "Test inner PKE" {
+    if (comptime builtin.cpu.has(.s390x, .vector)) return error.SkipZigTest;
+
     var seed: [32]u8 = undefined;
     var pt: [32]u8 = undefined;
     for (&seed, &pt, 0..) |*s, *p, i| {
@@ -1621,6 +1625,8 @@ test "Test inner PKE" {
 }
 
 test "Test happy flow" {
+    if (comptime builtin.cpu.has(.s390x, .vector)) return error.SkipZigTest;
+
     var seed: [64]u8 = undefined;
     for (&seed, 0..) |*s, i| {
         s.* = @as(u8, @intCast(i));
@@ -1646,18 +1652,21 @@ test "Test happy flow" {
 
 test "NIST KAT test d00.Kyber512" {
     if (comptime builtin.cpu.has(.loongarch, .lsx)) return error.SkipZigTest;
+    if (comptime builtin.cpu.has(.s390x, .vector)) return error.SkipZigTest;
 
     try testNistKat(d00.Kyber512, "e9c2bd37133fcb40772f81559f14b1f58dccd1c816701be9ba6214d43baf4547");
 }
 
 test "NIST KAT test d00.Kyber1024" {
     if (comptime builtin.cpu.has(.loongarch, .lsx)) return error.SkipZigTest;
+    if (comptime builtin.cpu.has(.s390x, .vector)) return error.SkipZigTest;
 
     try testNistKat(d00.Kyber1024, "89248f2f33f7f4f7051729111f3049c409a933ec904aedadf035f30fa5646cd5");
 }
 
 test "NIST KAT test d00.Kyber768" {
     if (comptime builtin.cpu.has(.loongarch, .lsx)) return error.SkipZigTest;
+    if (comptime builtin.cpu.has(.s390x, .vector)) return error.SkipZigTest;
 
     try testNistKat(d00.Kyber768, "a1e122cad3c24bc51622e4c242d8b8acbcd3f618fee4220400605ca8f9ea02c2");
 }

lib/std/zig/system.zig

@@ -473,6 +473,11 @@ pub fn resolveTargetQuery(io: Io, query: Target.Query) DetectError!Target {
         if (result.cpu.arch.isMIPS() and result.abi.float() == .soft) {
             result.cpu.features.addFeature(@intFromEnum(Target.mips.Feature.soft_float));
         }
+
+        // https://github.com/llvm/llvm-project/issues/168992
+        if (result.cpu.arch == .s390x) {
+            result.cpu.features.removeFeature(@intFromEnum(Target.s390x.Feature.vector));
+        }
     }
 
     // It's possible that we detect the native ABI, but fail to detect the OS version or were told

lib/std/zig/system/linux.zig

@@ -11,7 +11,6 @@ const assert = std.debug.assert;
 
 const SparcCpuinfoImpl = struct {
     model: ?*const Target.Cpu.Model = null,
-    is_64bit: bool = false,
 
     const cpu_names = .{
         .{ "SuperSparc", &Target.sparc.cpu.supersparc },
@@ -41,17 +40,12 @@ const SparcCpuinfoImpl = struct {
                     break;
                 }
             }
-        } else if (mem.eql(u8, key, "type")) {
-            self.is_64bit = mem.eql(u8, value, "sun4u") or mem.eql(u8, value, "sun4v");
         }
 
         return true;
     }
 
     fn finalize(self: *const SparcCpuinfoImpl, arch: Target.Cpu.Arch) ?Target.Cpu {
-        // At the moment we only support 64bit SPARC systems.
-        assert(self.is_64bit);
-
         const model = self.model orelse return null;
         return Target.Cpu{
             .arch = arch,
@@ -194,6 +188,77 @@ test "cpuinfo: PowerPC" {
     );
 }
 
+const S390xCpuinfoImpl = struct {
+    model: ?*const Target.Cpu.Model = null,
+
+    const cpu_names = .{
+        // z900: 2064, 2066
+        // z990: 2084, 2086
+        // z9: 2094, 2096
+
+        .{ "2097", &Target.s390x.cpu.z10 },
+        .{ "2098", &Target.s390x.cpu.z10 },
+        .{ "2817", &Target.s390x.cpu.z196 },
+        .{ "2818", &Target.s390x.cpu.z196 },
+        .{ "2827", &Target.s390x.cpu.zEC12 },
+        .{ "2828", &Target.s390x.cpu.zEC12 },
+        .{ "2964", &Target.s390x.cpu.z13 },
+        .{ "2965", &Target.s390x.cpu.z13 },
+        .{ "3906", &Target.s390x.cpu.z14 },
+        .{ "3907", &Target.s390x.cpu.z14 },
+        .{ "8561", &Target.s390x.cpu.z15 },
+        .{ "8562", &Target.s390x.cpu.z15 },
+        .{ "3931", &Target.s390x.cpu.z16 },
+        .{ "3932", &Target.s390x.cpu.z16 },
+        .{ "9175", &Target.s390x.cpu.z17 },
+        .{ "9176", &Target.s390x.cpu.z17 },
+    };
+
+    fn line_hook(self: *S390xCpuinfoImpl, key: []const u8, value: []const u8) !bool {
+        if (mem.eql(u8, key, "machine")) {
+            inline for (cpu_names) |pair| {
+                if (mem.eql(u8, value, pair[0])) {
+                    self.model = pair[1];
+                    break;
+                }
+            }
+
+            return false;
+        }
+
+        return true;
+    }
+
+    fn finalize(self: *const S390xCpuinfoImpl, arch: Target.Cpu.Arch) ?Target.Cpu {
+        const model = self.model orelse return null;
+        return Target.Cpu{
+            .arch = arch,
+            .model = model,
+            .features = model.features,
+        };
+    }
+};
+
+const S390xCpuinfoParser = CpuinfoParser(S390xCpuinfoImpl);
+
+test "cpuinfo: S390x" {
+    try testParser(S390xCpuinfoParser, .s390x, &Target.s390x.cpu.z15,
+        \\physical id     : 5
+        \\core id         : 5
+        \\book id         : 5
+        \\drawer id       : 5
+        \\dedicated       : 0
+        \\address         : 5
+        \\siblings        : 1
+        \\cpu cores       : 1
+        \\version         : FF
+        \\identification  : 09DD98
+        \\machine         : 8561
+        \\cpu MHz dynamic : 5200
+        \\cpu MHz static  : 5200
+    );
+}
+
 const ArmCpuinfoImpl = struct {
     const num_cores = 4;
 
@@ -411,7 +476,7 @@ pub fn detectNativeCpuAndFeatures(io: Io) ?Target.Cpu {
             const core = @import("arm.zig").aarch64.detectNativeCpuAndFeatures(current_arch, registers);
             return core;
         },
-        .sparc64 => {
+        .sparc, .sparc64 => {
             return SparcCpuinfoParser.parse(current_arch, &file_reader.interface) catch null;
         },
         .powerpc, .powerpcle, .powerpc64, .powerpc64le => {
@@ -420,6 +485,9 @@ pub fn detectNativeCpuAndFeatures(io: Io) ?Target.Cpu {
         .riscv64, .riscv32 => {
             return RiscvCpuinfoParser.parse(current_arch, &file_reader.interface) catch null;
         },
+        .s390x => {
+            return S390xCpuinfoParser.parse(current_arch, &file_reader.interface) catch null;
+        },
         else => {},
     }
 

test/c_abi/main.zig

@@ -1182,6 +1182,7 @@ test "big simd vector" {
     if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
     if (builtin.cpu.arch.isLoongArch()) return error.SkipZigTest;
     if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .x86_64 and builtin.os.tag.isDarwin() and builtin.mode != .Debug) return error.SkipZigTest;
+    if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
 
     c_big_vec(.{ 1, 2, 3, 4, 5, 6, 7, 8 });