274 Commits

Author SHA1 Message Date
Jacob Young
9e0a34f329 llvm: fix data layout calculation for experimental llvm targets
Closes #16616
2023-08-01 19:20:22 -07:00
Jacob Young
228c956377 std: finish cleanup up asm
This also required implementing the necessary syntax in the x86_64 backend.
2023-07-31 03:49:21 -04:00
Zachary Raineri
423c1221f9 std.target | Remove comment referencing closed proposal
Removes a comment referencing #425 which has been closed
2023-07-28 19:02:48 -07:00
Jacob Young
06af9cc101 llvm: fix datalayout generation for more targets
Closes #16482
2023-07-23 23:48:18 -04:00
Jacob Young
9dd7a9eb02 llvm: fix various crashes 2023-07-19 23:38:40 -04:00
Jacob Young
3314fd83af llvm: compute data layout without help like a grownup compiler 2023-07-19 23:38:40 -04:00
mlugg
f26dda2117 all: migrate code to new cast builtin syntax
Most of this migration was performed automatically with `zig fmt`. There
were a few exceptions which I had to manually fix:

* `@alignCast` and `@addrSpaceCast` cannot be automatically rewritten
* `@truncate`'s fixup is incorrect for vectors
* Test cases are not formatted, and their error locations change
2023-06-24 16:56:39 -07:00
Evan Haas
c205521aea
std.Target: c_char is unsigned on RISC-V 2023-06-20 08:27:55 -07:00
Evan Haas
657fe55711
std.Target: Add a function for determining char signedess
Copied from arocc c1955a4742/src/target.zig (L7)
2023-06-20 00:26:40 -07:00
Eric Joldasov
50339f595a all: zig fmt and rename "@XToY" to "@YFromX"
Signed-off-by: Eric Joldasov <bratishkaerik@getgoogleoff.me>
2023-06-19 12:34:42 -07:00
r00ster91
6e84f46990 std: replace builtin.Version with SemanticVersion 2023-06-17 13:17:34 -07:00
Motiejus Jakštys
d41111d7ef mem: rename align*Generic to mem.align*
Anecdote 1: The generic version is way more popular than the non-generic
one in Zig codebase:

     git grep -w alignForward | wc -l
    56
     git grep -w alignForwardGeneric | wc -l
    149

     git grep -w alignBackward | wc -l
    6
     git grep -w alignBackwardGeneric | wc -l
    15

Anecdote 2: In my project (turbonss) that does much arithmetic and
alignment I exclusively use the Generic functions.

Anecdote 3: we used only the Generic versions in the Macho Man's linker
workshop.
2023-06-17 12:49:13 -07:00
Dumitru Stavila
1253d591be target.zig adds ps4 and ps5 type sizes. 2023-06-15 11:23:04 -07:00
Veikka Tuominen
ca16f1e8a7 std.Target adjustments
* move `ptrBitWidth` from Arch to Target since it needs to know about the abi
* double isn't always 8 bits
* AVR uses 1-byte alignment for everything in GCC
2023-05-26 21:42:19 -07:00
Robin Voetter
5e62ba1347
opencl: define size of C types
Define the size of the c types according the OpenCL specification.

Note that OpenCL does not define the size of long double. Clang generates
fp128, even though there is no extension that allows such types. The
llvm-spirv translator simply crashes.
2023-05-11 20:31:50 +02:00
Andrew Kelley
6261c13731 update codebase to use @memset and @memcpy 2023-04-28 13:24:43 -07:00
Andrew Kelley
e2fe1907ec add c_char type
closes #875
2023-04-13 02:47:16 -04:00
Robin Voetter
ba60d456b4
spirv: cannot build libc
SPIR-V cannot build libc, ssp, compiler-rt, etc at the time of this commit, so
prevent trying to build them.
2023-04-09 01:51:48 +02:00
Robin Voetter
12ff362654
spirv: make genericName match target name.
Changes the 'generic name' of the target to spirv, from spir-v.
2023-04-09 01:51:48 +02:00
Robin Voetter
6dc1fafe98
std: add generic target for spirv
This adds a general target for SPIR-V compilation. Previously there was not
any target machine defined for SPIR-V.

TODO is to reword the features for this target. We don't really need the full
list of capabilities in the features, we should only put a few features here
which we can actually use during code generation.
2023-04-09 01:51:47 +02:00
Andrew Kelley
f289277599 Merge remote-tracking branch 'origin/master' into llvm16 2023-04-05 22:05:31 -07:00
Jakub Konka
f6845bbbc6 std: bump max macOS version to 13.3 2023-03-31 21:22:30 +02:00
Andrew Kelley
1ed569e0b2 Merge remote-tracking branch 'origin/master' into llvm16 2023-03-16 17:33:24 -07:00
Jacob Young
2770159606 std: reenable vectorized code with the C backend 2023-03-06 08:09:32 -05:00
Andrew Kelley
0909f47f86 std.Target: add xtensa to toCoffMachine 2023-02-27 20:51:23 -07:00
Andrew Kelley
b5b634e4e8 Merge remote-tracking branch 'origin/master' into llvm16 2023-02-19 10:20:19 -07:00
Andrew Kelley
aeaef8c0ff update std lib and compiler sources to new for loop syntax 2023-02-18 19:17:21 -07:00
Andrew Kelley
fab9b7110e Merge remote-tracking branch 'origin/master' into llvm16 2023-02-03 12:49:40 -07:00
Andrew Kelley
2f5892671e move compiler's CType logic to std.Target
This API only depends on std.Target and is extremely useful in build
scripts when populating configure files.
2023-01-31 15:09:35 -07:00
Andrew Kelley
d6b430b520 std.Target: remove workaround
This was working around a stage1 compiler bug.
2023-01-31 02:28:16 -05:00
Andrew Kelley
0ca3582a86 update CPU features to LLVM 16 2023-01-26 16:36:14 -07:00
Andrew Kelley
740a0d8f12 update zig_llvm.cpp and zig_llvm.h to LLVM 16 2023-01-25 20:56:43 -07:00
kcbanner
4a330ab811 target: use 16 byte alignment for 128-bit types on x86 and ofmt .c 2023-01-23 13:48:37 -05:00
Maciej 'vesim' Kuliński
2b9478ce12 Sema: implement AVR address spaces
Co-authored-by: Veikka Tuominen <git@vexu.eu>
2023-01-04 01:26:50 +02:00
Michael Dusan
46c3b09165
std.Target: bump semver max for BSDs
- freebsd, netbsd, openbsd, dragonfly
2023-01-02 19:18:33 -05:00
zooster
728cc73819 std.Target.ObjectFormat: specify dxcontainer file ext 2022-12-26 18:03:27 -05:00
Robin Voetter
074ba69ba6
spirv: assembler
spirv: introduce SpvModule.Fn to generate function code into

spirv: assembler error message setup

spirv: runtime spec info

spirv: inline assembly tokenizer

spirv: inline assembly lhs result/opcode parsing

spirv: forgot to fmt

spirv: tokenize opcodes and assigned result-ids

spirv: operand parsing setup

spirv: assembler string literals

spirv: assembler integer literals

spirv: assembler value enums

spirv: assembler bit masks

spirv: update assembler to new asm air format

spirv: target 1.5 for now

Current vulkan sdk version (1.3.204) ships spirv tools targetting 1.5,
and so these do not work with binaries targetting 1.6 yet. In the
future, this version number should be decided by the target.

spirv: store operands in flat arraylist.

Instead of having dedicated Operand variants for variadic operands,
just flatten them and store them in the normal inst.operands list.
This is a little simpler, but is not easily decodable in the operand
data representation.

spirv: parse variadic assembly operands

spirv: improve assembler result-id tokenization

spirv: begin instruction processing

spirv: only remove decl if it was actually allocated

spirv: work around weird miscompilation

Seems like there are problems with switch in anonymous struct literals.

spirv: begin resolving some types in assembler

spirv: improve instruction processing

spirv: rename some types + process OpTypeInt

spirv: process OpTypeVector

spirv: process OpTypeMatrix and OpTypeSampler

spirv: add opcode class to spec, remove @exclude'd instructions

spirv: process more type instructions

spirv: OpTypeFunction

spirv: OpTypeOpaque

spirv: parse LiteralContextDependentNumber operands

spirv: emit assembly instruction into right section

spirv: parse OpPhi parameters

spirv: inline assembly inputs

spirv: also copy air types

spirv: inline assembly outputs

spirv: spir-v address spaces

spirv: basic vector constants/types and shuffle

spirv: assembler OpTypeImage

spirv: some stuff

spirv: remove spirv address spaces for now
2022-11-23 19:17:58 +01:00
Nick Cernis
8a5818535b
Make invalidFmtError public and use in place of compileErrors for bad format strings (#13526)
* Export invalidFmtErr

To allow consistent use of "invalid format string" compile error
response for badly formatted format strings.

See https://github.com/ziglang/zig/pull/13489#issuecomment-1311759340.

* Replace format compile errors with invalidFmtErr

- Provides more consistent compile errors.
- Gives user info about the type of the badly formated value.

* Rename invalidFmtErr as invalidFmtError

For consistency. Zig seems to use “Error” more often than “Err”.

* std: add invalid format string checks to remaining custom formatters

* pass reference-trace to comp when building build file; fix checkobjectstep
2022-11-12 21:03:24 +02:00
Jay Petacat
694d8831c3 Revert "x86" CPU model (not arch) back to "i386"
PR #13101 recently renamed the "i386" architecture to "x86", and it
seems the specific CPU model got swept up in that. "x86" is an umbrella
term that describes a family of CPUs, and the "i386" is the oldest
supported model under that umbrella.
2022-11-06 13:39:03 +01:00
Ali Chraghi
f5f1f8c666 all: rename i386 to x86 2022-11-04 00:09:27 +03:30
Jacob Young
93d60d0de7 std: avoid vector usage with the C backend
Vectors are not yet implemented in the C backend, so no reason to
prevent code using the standard library from compiling in the meantime.
2022-11-01 20:38:37 -04:00
Andrew Kelley
1d1c7ae5de
Merge pull request #13257 from topolarity/ctype-fixes
stage 2: Update `CType` size/alignment
2022-10-27 21:15:22 -04:00
Jakub Konka
2d03f38988 darwin: bump minimum supported version to 11.7.1
Drop Catalina support.
2022-10-25 20:31:48 +02:00
Jakub Konka
98285b17b3 darwin: bump max macOS version to 13.0 2022-10-25 20:31:31 +02:00
Cody Tapscott
f0e66ac4d0 std.Target: Remove longDoubleIs
This function is redundant with CType.sizeInBits(), and until the
previous commit they disagreed about the correct long double type
for several targets. Although they're all synced up now, it's much
simpler just to have a single source of truth.
2022-10-21 19:20:58 -07:00
Cody Tapscott
ddbdb83c86 stage 2: Update C types' size/alignment
These updates were made by testing against the `sizeof/_Alignof` reported
by Clang for all supported arch-OS-ABI combinations and correcting any
discrepancies.

This is bound to have a few errors (the recent long double fix for i386
Android is one example), but Clang is certainly not a bad place to start,
especially for our most popular targets.
2022-10-21 19:11:47 -07:00
Andrew Kelley
5b9c8d1d6f add m68k target CPU features 2022-10-20 09:21:06 -07:00
Guillaume Wenzek
aad983cf40 sanitize qualified name for nvptx backend 2022-10-15 10:39:19 -07:00
Andrew Kelley
66d6183001 Merge branch 'amdgpu-improvements' of https://github.com/Snektron/zig into Snektron-amdgpu-improvements 2022-10-15 10:36:10 -07:00
Andrew Kelley
b4e3424594
Merge pull request #13100 from topolarity/powerpc64le
stage2: Fix softfloat support for PPC64(LE)
2022-10-15 10:05:00 -04:00