15129 Commits

Author SHA1 Message Date
Jakub Konka
3f10217a47 elf: fix a typo in setting atom name before it's been allocated 2024-07-30 12:54:30 +02:00
Jakub Konka
e0c475b6b7 elf: remove now unused globalByName 2024-07-30 10:03:13 +02:00
Jakub Konka
a76ad907d0 elf: include LinkerDefined in symbol resolution 2024-07-30 10:03:13 +02:00
Jakub Konka
3618824ea3 elf: move entry tracking into LinkerDefined 2024-07-30 10:03:13 +02:00
Jakub Konka
5ceac8ebba elf: move initializing and allocating linker-defined symbols into LinkerDefined 2024-07-30 10:03:11 +02:00
Jakub Konka
ef7bbcd80f elf: do not store merge section output section name in strings buffer 2024-07-30 10:00:50 +02:00
Jakub Konka
801c372098 elf: init output merge sections in a separate step 2024-07-30 10:00:50 +02:00
Jakub Konka
0701646beb elf: move merge subsections ownership into merge sections 2024-07-30 10:00:50 +02:00
Jakub Konka
24126f5382 elf: simplify output section tracking for symbols 2024-07-30 10:00:50 +02:00
Jakub Konka
e8d008a8a8 elf: atom is always assigned output section index 2024-07-30 10:00:50 +02:00
Jakub Konka
96c20adeee elf: remove obsolete flags from atom 2024-07-30 10:00:50 +02:00
Jakub Konka
c575e3daa4 elf: resolve COMDATs in more parallel-friendly way 2024-07-30 10:00:50 +02:00
Jakub Konka
494ae149e0 elf: skip storing comdat group signature globally 2024-07-30 10:00:50 +02:00
Jakub Konka
669f285943 elf: move ownership of atoms into objects 2024-07-30 10:00:50 +02:00
Jakub Konka
f1fedb3a51 elf: move ownership of comdat groups to Object 2024-07-30 10:00:50 +02:00
Jakub Konka
733d25000b elf: move ownership of input merge sections to Object 2024-07-30 10:00:50 +02:00
Andrew Kelley
38e0f049c5
Merge pull request #20389 from alexrp/riscv32
Some `riscv32-linux` porting work
2024-07-29 16:13:35 -07:00
Andrew Kelley
19e4de135f
Merge pull request #20839 from alexrp/musl-stuff
`musl`: Align `CFLAGS` with upstream
2024-07-29 11:34:18 -07:00
Alex Rønne Petersen
27507ad971 compiler: Enable -Werror=date-time for C/C++ code in release builds.
We advertise reproducible builds for release modes, so let's help users achieve
that in C/C++ code. Users can still override this manually if they really want.
2024-07-29 11:27:38 -07:00
Alex Rønne Petersen
6ec7757914
link.Elf: Define __global_pointer$ for riscv32 too.
See: https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-elf.adoc
2024-07-29 09:50:09 +02:00
Alex Rønne Petersen
11badbfe8e
musl: Fix needsCrtiCrtn() to return false for riscv32 too. 2024-07-29 09:50:09 +02:00
Alex Rønne Petersen
d1d95294fd std.Target.Cpu.Arch: Remove the aarch64_32 tag.
This is a misfeature that we inherited from LLVM:

* https://reviews.llvm.org/D61259
* https://reviews.llvm.org/D61939

(`aarch64_32` and `arm64_32` are equivalent.)

I truly have no idea why this triple passed review in LLVM. It is, to date, the
*only* tag in the architecture component that is not, in fact, an architecture.
In reality, it is just an ILP32 ABI for AArch64 (*not* AArch32).

The triples that use `aarch64_32` look like `aarch64_32-apple-watchos`. Yes,
that triple is exactly what you think; it has no ABI component. They really,
seriously did this.

Since only Apple could come up with silliness like this, it should come as no
surprise that no one else uses `aarch64_32`. Later on, a GNU ILP32 ABI for
AArch64 was developed, and support was added to LLVM:

* https://reviews.llvm.org/D94143
* https://reviews.llvm.org/D104931

Here, sanity seems to have prevailed, and a triple using this ABI looks like
`aarch64-linux-gnu_ilp32` as you would expect.

As can be seen from the diffs in this commit, there was plenty of confusion
throughout the Zig codebase about what exactly `aarch64_32` was. So let's just
remove it. In its place, we'll use `aarch64-watchos-ilp32`,
`aarch64-linux-gnuilp32`, and so on. We'll then translate these appropriately
when talking to LLVM. Hence, this commit adds the `ilp32` ABI tag (we already
have `gnuilp32`).
2024-07-28 19:44:52 -07:00
Alex Rønne Petersen
c157550928 link.Coff: Basic support for /Brepro in the self-hosted linker.
Just keep things simple and zero the timestamp. It's not obvious that there's
any real benefit to adding complexity and harming performance by computing a
hash of the whole file for the timestamp value.

See:

* https://learn.microsoft.com/en-us/windows/win32/debug/pe-format#general-concepts
* https://learn.microsoft.com/en-us/windows/win32/debug/pe-format#debug-type

In the future, we should at least add an empty `IMAGE_DEBUG_TYPE_REPRO` entry to
the debug data directory for this case, but I didn't want to do too much surgery
right now since it's early days for COFF support in the self-hosted linker.
2024-07-28 22:49:41 +02:00
Alex Rønne Petersen
b03a04c7fc
musl: Build with -fexcess-precision=standard -frounding-math.
Clang supports these now.
2024-07-28 15:42:02 +02:00
Alex Rønne Petersen
243bb87db0
musl: Build with -fno-strict-aliasing like upstream. 2024-07-28 15:41:35 +02:00
Alex Rønne Petersen
642cd730c8 link: Accept -Brepro linker option and pass it to LLD.
Enable it by default when building Zig code in release modes.

Contributes to #9432.
2024-07-28 14:37:03 +02:00
Jakub Konka
91c17979f1
Merge pull request #20807 from Rexicon226/riscv
riscv: more backend progress
2024-07-28 11:34:23 +02:00
Jakub Konka
1fba9e1280
Merge pull request #20834 from ziglang/macho-boundary-typo-fix
macho: fix typo in boundary symbols handling
2024-07-28 10:30:26 +02:00
Linus Groh
a84951465b translate-c: Use mangled name for local extern in condition/loop 2024-07-28 02:58:49 +03:00
Jakub Konka
77476a03e8 macho: fix typo in boundary symbol tag: $stop -> $end 2024-07-27 23:56:18 +02:00
David Rubin
b20007daf7
riscv: correct airAsm to generate correct jalr call 2024-07-27 08:14:09 -07:00
David Rubin
8f84212855
riscv: make multi-threaded enabled compilation the default 2024-07-26 14:53:55 -07:00
David Rubin
a7498a6a53
comp: enable compilation of zig_libc 2024-07-26 14:02:48 -07:00
David Rubin
846bd40361
riscv: implement @cmpxchg* and remove fixes 2024-07-26 12:43:47 -07:00
David Rubin
9752bbfeb3
riscv: implement basic tlv loads and stores 2024-07-26 08:49:34 -07:00
Andrew Kelley
208baa37ca frontend: add missed cache hash on --debug-rt
Makes adding --debug-rt correctly invalidate the cache for compiler_rt
and libfuzzer.
2024-07-26 08:42:40 -07:00
Andrew Kelley
80269c1f53 remove deprecated --mod CLI now that a zig1.wasm update happened 2024-07-26 05:07:18 -07:00
David Rubin
8da212c11b
riscv: update tests and fix reuse bug 2024-07-26 04:19:58 -07:00
David Rubin
046001a34a
riscv implement @popCount 2024-07-26 04:19:57 -07:00
David Rubin
7ff5709e1b
riscv: implement lr/sr loop logic for non-native atomics 2024-07-26 04:19:57 -07:00
David Rubin
a1f6a8ef90
riscv: airAsm rewrite
with this rewrite we can call functions inside of
inline assembly, enabling us to use the default start.zig logic

all that's left is to implement lr/sc loops for atomically manipulating
1 and 2 byte values, after which we can use the segfault handler logic.
2024-07-26 04:19:55 -07:00
David Rubin
c00a5ff792
riscv: implement @floatFromInt 2024-07-26 04:19:16 -07:00
David Rubin
1a7d89a84d
riscv: clean up and unify encoding logic 2024-07-26 04:19:13 -07:00
David Rubin
574028ed5e
riscv: boilerplate for creating lazy functions 2024-07-26 04:05:44 -07:00
David Rubin
64c6473443
riscv: implement add_sat and ptr_slice_len_ptr
this is enough to use the basic functions of an ArrayList!
2024-07-26 04:05:43 -07:00
David Rubin
6ac1b2d82a
riscv: add 32-bit support to integer @abs 2024-07-26 04:05:42 -07:00
David Rubin
1820f44104
riscv: implement sub-byte addition 2024-07-26 04:05:42 -07:00
David Rubin
81ca3a1d59
riscv: fix logic bug in ptr_elem_ptr
I was doing duplicate work with `elemOffset` multiplying by the abi size and then the `ptr_add` `genBinOp` also multiplying.

This led to having writes happening in the wrong place.
2024-07-26 04:05:41 -07:00
David Rubin
cde6956b21
riscv: remove redundant assert in genBinOp 2024-07-26 04:05:41 -07:00
David Rubin
d3f75522d7
lower: fix logic bug in cmp_gt 2024-07-26 04:05:40 -07:00