11 Commits

Author SHA1 Message Date
mlugg
00969062a9
compiler: detect duplicate test names in AstGen
There is no reason to perform this detection during semantic analysis.
In fact, doing so is problematic, because we wish to utilize detection
of existing decls in a namespace in incremental compilation.
2024-03-14 07:40:05 +00:00
Tristan Ross
aab84a3dec
std.builtin: make float mode fields lowercase 2024-03-11 07:09:10 -07:00
Tristan Ross
099f3c4039
std.builtin: make container layout fields lowercase 2024-03-11 07:09:07 -07:00
mlugg
2c4ac44f25
compiler: treat decl_val/decl_ref of potentially generic decls as captures
This fixes an issue with the implementation of #18816. Consider the
following code:

```zig
pub fn Wrap(comptime T: type) type {
    return struct {
        pub const T1 = T;
        inner: struct { x: T1 },
    };
}
```

Previously, the type of `inner` was not considered to be "capturing" any
value, as `T1` is a decl. However, since it is declared within a generic
function, this decl reference depends on the context, and thus should be
treated as a capture.

AstGen has been augmented to tunnel references to decls through closure
when the decl was declared in a potentially-generic context (i.e. within
a function).
2024-03-06 21:26:38 +00:00
mlugg
a6ca20b9a1
compiler: change representation of closures
This changes the representation of closures in Zir and Sema. Rather than
a pair of instructions `closure_capture` and `closure_get`, the system
now works as follows:

* Each ZIR type declaration (`struct_decl` etc) contains a list of
  captures in the form of ZIR indices (or, for efficiency, direct
  references to parent captures). This is an ordered list; indexes into
  it are used to refer to captured values.
* The `extended(closure_get)` ZIR instruction refers to a value in this
  list via a 16-bit index (limiting this index to 16 bits allows us to
  store this in `extended`).
* `Module.Namespace` has a new field `captures` which contains the list
  of values captured in a given namespace. This is initialized based on
  the ZIR capture list whenever a type declaration is analyzed.

This change eliminates `CaptureScope` from semantic analysis, which is a
nice simplification; but the main motivation here is that this change is
a prerequisite for #18816.
2024-03-06 21:26:37 +00:00
mlugg
6a87e42c2e
AstGen: fix latent bug causing incorrect elision of dbg_stmt instructions
Thanks to jacobly0 for figuring this out. The chain of events causing
the failure this triggered is as follows.

* As of a recent commit, certain bodies no longer emit a redundant
  `block`, meaning there are more likely to be "interesting"
  instructions (i.e. not blocks) at the end of parent GenZir scopes.

* When emitting the first `dbg_stmt` in such a body, the elision logic
  incorrectly looks at a tag from an instruction in an enclosing scope.

* The tag of this instruction may be `undefined`, meaning that in unsafe
  builds it may be incorrectly identified as a `dbg_stmt` instruction.

* This instruction from another body is clobbered rather than emitting
  an actual `dbg_stmt` instruction. Note that this does not produce
  invalid ZIR, since the creator of the undefined instruction replaces
  the previously-undefined payload later.
2024-03-01 23:54:31 +00:00
mlugg
eefa60e376
AstGen: optimize ZIR for -1 literal 2024-03-01 06:01:53 +00:00
mlugg
07d8740882
AstGen: do not generate defers at unreachable end of block
Resolves: #8822
2024-02-29 23:38:17 +00:00
mlugg
f6abf022b7
AstGen: elide block instruction when already in empty body
In the code `if (cond) { ... }`, the "then body" of the `if` is
technically a block. However, we don't need to emit a real ZIR `block`
corresponding to it, because we are already within a condbr body; we
have a separate gz, and appropriate scoping for allocs and debug
variables. In this case, and many like it, we can trivially elide the
block here, instead emitting the block statements directly into the
current `GenZir`. This results in a significant decrease in ZIR bytes
for real code.
2024-02-29 23:38:17 +00:00
mlugg
f0a4bb6bd1
AstGen: avoid unnecessary coercion instructions
Coercions such as `@as(usize, 0)` can be trivially elided by matching
these cases and translating to fixed InternPool indices.
2024-02-29 23:38:17 +00:00
Andrew Kelley
b116063e02 move AstGen to std.zig.AstGen
Part of an effort to ship more of the compiler in source form.
2024-02-26 21:51:19 -07:00