19 Commits

Author SHA1 Message Date
Andrew Kelley
aeaef8c0ff update std lib and compiler sources to new for loop syntax 2023-02-18 19:17:21 -07:00
r00ster91
aac2d6b56f std.builtin: rename Type.UnionField and Type.StructField's field_type to type 2022-12-17 14:11:33 +01:00
Andrew Kelley
50eb7983cd remove most conditional compilation based on stage1
There are still a few occurrences of "stage1" in the standard library
and self-hosted compiler source, however, these instances need a bit
more careful inspection to ensure no breakage.
2022-12-06 20:38:54 -07:00
Robin Voetter
074ba69ba6
spirv: assembler
spirv: introduce SpvModule.Fn to generate function code into

spirv: assembler error message setup

spirv: runtime spec info

spirv: inline assembly tokenizer

spirv: inline assembly lhs result/opcode parsing

spirv: forgot to fmt

spirv: tokenize opcodes and assigned result-ids

spirv: operand parsing setup

spirv: assembler string literals

spirv: assembler integer literals

spirv: assembler value enums

spirv: assembler bit masks

spirv: update assembler to new asm air format

spirv: target 1.5 for now

Current vulkan sdk version (1.3.204) ships spirv tools targetting 1.5,
and so these do not work with binaries targetting 1.6 yet. In the
future, this version number should be decided by the target.

spirv: store operands in flat arraylist.

Instead of having dedicated Operand variants for variadic operands,
just flatten them and store them in the normal inst.operands list.
This is a little simpler, but is not easily decodable in the operand
data representation.

spirv: parse variadic assembly operands

spirv: improve assembler result-id tokenization

spirv: begin instruction processing

spirv: only remove decl if it was actually allocated

spirv: work around weird miscompilation

Seems like there are problems with switch in anonymous struct literals.

spirv: begin resolving some types in assembler

spirv: improve instruction processing

spirv: rename some types + process OpTypeInt

spirv: process OpTypeVector

spirv: process OpTypeMatrix and OpTypeSampler

spirv: add opcode class to spec, remove @exclude'd instructions

spirv: process more type instructions

spirv: OpTypeFunction

spirv: OpTypeOpaque

spirv: parse LiteralContextDependentNumber operands

spirv: emit assembly instruction into right section

spirv: parse OpPhi parameters

spirv: inline assembly inputs

spirv: also copy air types

spirv: inline assembly outputs

spirv: spir-v address spaces

spirv: basic vector constants/types and shuffle

spirv: assembler OpTypeImage

spirv: some stuff

spirv: remove spirv address spaces for now
2022-11-23 19:17:58 +01:00
Stevie Hryciw
04f3067a79 run zig fmt on everything checked by CI 2022-11-18 19:22:42 +00:00
Andrew Kelley
ecb4293afe stage2: disable unit tests when building with stage1
They trip LLVM assertions and spirv is not needed to bootstrap. Not
important for these tests to pass with stage1.
2022-07-04 16:20:33 -07:00
Isaac Freund
6f4343b61a std: replace usage of std.meta.bitCount() with @bitSizeOf() 2022-04-27 11:10:52 +02:00
Veikka Tuominen
cbd5d6c704 spirv spec: do not align packed struct fields 2022-02-24 19:48:34 +02:00
Andrew Kelley
39983d7ff5 stage2: update to new ArrayHashMap API 2022-01-31 21:12:37 -07:00
Robin Voetter
98ee39d1b0 spirv: spir-v dedicated type system 2022-01-28 14:45:23 +01:00
Robin Voetter
1b6ebce0da spirv: new module
This introduces a dedicated struct that handles module-wide information.
2022-01-28 14:38:58 +01:00
Robin Voetter
72e67aaf05 spirv: model spir-v section as separate type
The idea is that this type gains the relevant low-level instruction emitting
functions, and that higher-level checks and deduplications are performed
somewhere else.
2022-01-28 14:38:57 +01:00
Robin Voetter
94dd763936 spirv: regenerate spec
Regenerate the specification with the improvements previously made to the
spirv spec generator.
2022-01-28 14:38:57 +01:00
Andrew Kelley
e41e75a486 stage2: update for new usingnamespace semantics 2021-09-01 17:54:07 -07:00
Veikka Tuominen
e63ff4f1c1 add ast-check flag to zig fmt, fix found bugs 2021-06-14 00:16:40 +03:00
Andrew Kelley
597082adf4 Merge remote-tracking branch 'origin/master' into stage2-whole-file-astgen
Conflicts:
 * build.zig
 * src/Compilation.zig
 * src/codegen/spirv/spec.zig
 * src/link/SpirV.zig
 * test/stage2/darwin.zig
   - this one might be problematic; start.zig looks for `main` in the
     root source file, not `_main`. Not sure why there is an underscore
     there in master branch.
2021-05-15 21:44:38 -07:00
Robin Voetter
42f2ff6ec9 SPIR-V: Re-generate spec.zig 2021-05-14 19:49:32 +02:00
Andrew Kelley
bcfebb4b2b stage2: improvements aimed at std lib integration
* AstGen: emit decl lookup ZIR instructions rather than directly
   looking up decls in AstGen. This is necessary because we want to
   reuse the same immutable ZIR code for multiple generic instantiations
   (and comptime function calls).
 * AstGen: fix using members_len instead of fields_len for struct decls.
 * structs: the struct_decl ZIR instruction is now also a block. This is
   so that the type expressions, default field value expressions, and
   alignment expressions can be evaluated in a scope that contains the
   decls from the struct namespace itself.
 * Add "std" and "builtin" packages to the builtin package.
 * Don't try to build glibc, musl, or mingw-w64 when using `-ofmt=c`.
 * builtin.zig is generated without `usingnamespace`.
 * builtin.zig takes advantage of `std.zig.fmtId` for CPU features.
 * A first pass at implementing `usingnamespace`. It's problematic and
   should either be deleted, or polished, before merging this branch.
 * Sema: allow explicitly specifying the namespace in which to look up
   Decls. This is used by `struct_decl` in order to put the decls from
   the struct namespace itself in scope when evaluating the type
   expressions, default value expressions, and alignment expressions.
 * Module: fix `analyzeNamespace` assuming that it is the top-level root
   declaration node.
 * Sema: implement comptime and runtime cmp operator.
 * Sema: implement peer type resolution for enums and enum literals.
 * Pull in the changes from master branch:
   262e09c482d98a78531c049a18b7f24146fe157f.
 * ZIR: complete out simple_ptr_type debug printing
2021-04-15 19:06:39 -07:00
Robin Voetter
9a6babf482 SPIR-V: Add generated specification 2021-01-19 15:28:17 +01:00