238 Commits

Author SHA1 Message Date
Andrew Kelley
5467582444 saturating arithmetic modifications
* Remove the builtins `@addWithSaturation`, `@subWithSaturation`,
   `@mulWithSaturation`, and `@shlWithSaturation` now that we have
   first-class syntax for saturating arithmetic.
 * langref: Clarify the behavior of `@shlExact`.
 * Ast: rename `bit_shift_left` to `shl` and `bit_shift_right` to `shr`
   for consistency.
 * Air: rename to include underscore separator with consistency with
   the rest of the ops.
 * Air: add shl_exact instruction
 * Use non-extended tags for saturating arithmetic, to keep it
   simple so that all the arithmetic operations can be done the same
   way.
   - Sema: unify analyzeArithmetic with analyzeSatArithmetic
     - implement comptime `+|`, `-|`, and `*|`
     - allow float operands to saturating arithmetic
 * `<<|` allows any integer type for the RHS.
 * C backend: fix rebase conflicts
 * LLVM backend: reduce the amount of branching for arithmetic ops
 * zig.h: fix magic number not matching actual size of C integer types
2021-09-28 19:19:28 -07:00
Travis Staloch
29f41896ed sat-arithmetic: add operator support
- adds initial support for the operators +|, -|, *|, <<|, +|=, -|=, *|=, <<|=
- uses operators in addition to builtins in behavior test
- adds binOpExt() and assignBinOpExt() to AstGen.zig. these need to be audited
2021-09-28 17:02:43 -07:00
Andrew Kelley
79bc5891c1 stage2: more arithmetic support
* AIR: add `mod` instruction for modulus division
   - Implement for LLVM backend
 * Sema: implement `@mod`, `@rem`, and `%`.
 * Sema: fix comptime switch evaluation
 * Sema: implement comptime shift left
 * Sema: fix the logic inside analyzeArithmetic to handle all the
   nuances between the different mathematical operations.
   - Implement comptime wrapping operations
2021-09-28 16:12:24 -07:00
Andrew Kelley
09e1f37cb6 stage2: implement union coercion to its own tag
* AIR: add `get_union_tag` instruction
   - implement in LLVM backend
 * Sema: implement == and != for union and enum literal
   - Also implement coercion from union to its own tag type
 * Value: implement hashing for union values

The motivating example is this snippet:

    comptime assert(@typeInfo(T) == .Float);

This was the next blocker for stage2 building compiler-rt.
Now it is switch at compile-time on an integer.
2021-09-27 23:11:00 -07:00
Andrew Kelley
c0aa4a1a42 stage2: implement basic unions
* AIR instructions struct_field_ptr and related functions now are also
   emitted by the frontend for unions. Backends must inspect the type
   of the pointer operand to lower the instructions correctly.
   - These will be renamed to `agg_field_ptr` (short for "aggregate") in
     the future.
 * Introduce the new `set_union_tag` AIR instruction.
 * Introduce `Module.EnumNumbered` and associated `Type` methods. This
   is for enums which have no decls, but do have the possibility of
   overriding the integer tag type and tag values.
 * Sema: Implement support for union tag types in both the
   auto-generated and explicitly-provided cases, as well as explicitly
   provided enum tag values in union declarations.
 * LLVM backend: implement lowering union types, union field pointer
   instructions, and the new `set_union_tag` instruction.
2021-09-27 19:53:29 -07:00
Andrew Kelley
42aa1ea115 stage2: implement @memset and @memcpy builtins 2021-09-24 17:33:06 -07:00
joachimschmidt557
8f58e2d779 stage2 codegen: move bit definitions to src/arch 2021-09-24 13:47:59 -04:00
Josh Soref
664941bf14
Spelling corrections (#9833)
Signed-off-by: Josh Soref <jsoref@users.noreply.github.com>
Co-authored-by: Josh Soref <jsoref@users.noreply.github.com>
2021-09-24 13:39:20 -04:00
Andrew Kelley
aecebf38ac stage2: progress towards ability to compile compiler-rt
* prepare compiler-rt to support being compiled by stage2
   - put in a few minor workarounds that will be removed later, such as
     using `builtin.stage2_arch` rather than `builtin.cpu.arch`.
   - only try to export a few symbols for now - we'll move more symbols
     over to the "working in stage2" section as they become functional
     and gain test coverage.
   - use `inline fn` at function declarations rather than `@call` with an
     always_inline modifier at the callsites, to avoid depending on the
     anonymous array literal syntax language feature (for now).
 * AIR: replace floatcast instruction with fptrunc and fpext for
   shortening and widening floating point values, respectively.
 * Introduce a new ZIR instruction, `export_value`, which implements
   `@export` for the case when the thing to be exported is a local
   comptime value that points to a function.
   - AstGen: fix `@export` not properly reporting ambiguous decl
     references.
 * Sema: handle ExportOptions linkage. The value is now available to all
   backends.
   - Implement setting global linkage as appropriate in the LLVM
     backend. I did not yet inspect the LLVM IR, so this still needs to
     be audited. There is already a pending task to make sure the alias
     stuff is working as intended, and this is related.
   - Sema almost handles section, just a tiny bit more code is needed in
     `resolveExportOptions`.
 * Sema: implement float widening and shortening for both `@floatCast`
   and float coercion.
   - Implement the LLVM backend code for this as well.
2021-09-21 23:21:07 -07:00
Veikka Tuominen
a2dd0c387d
Merge pull request #9652 from g-w1/p9d
plan9: emit debug info
2021-09-21 19:38:12 +03:00
Andrew Kelley
f8b914fcf3 Merge branch 'address-space' of Snektron/zig into Snektron-address-space
There were two things to resolve here:
 * Snektron's branch edited Zir printing, but in master branch
   I moved the printing code from Zir.zig to print_zir.zig. So that
   just had to be moved over.
 * In master branch I fleshed out coerceInMemory a bit more, which
   caused one of Snektron's test cases to fail, so I had to add
   addrspace awareness to that. Once I did that the tests passed again.
2021-09-20 17:32:52 -07:00
Andrew Kelley
b9d3527e0e stage2: implement comptime @atomicRmw
* introduce float_to_int and int_to_float AIR instructionts and
   implement for the LLVM backend and C backend.
 * Sema: implement `zirIntToFloat`.
 * Sema: implement `@atomicRmw` comptime evaluation
   - introduce `storePtrVal` for when one needs to store a Value to a
     pointer which is a Value, and assert it happens at comptime.
 * Value: introduce new functionality:
   - intToFloat
   - numberAddWrap
   - numberSubWrap
   - numberMax
   - numberMin
   - bitwiseAnd
   - bitwiseNand (not implemented yet)
   - bitwiseOr
   - bitwiseXor
 * Sema: hook up `zirBitwise` to the new Value bitwise implementations
 * Type: rename `isFloat` to `isRuntimeFloat` because it returns `false`
   for `comptime_float`.
2021-09-20 14:24:43 -07:00
Jacob G-W
f697e0a326 plan9 linker: link lineinfo and filenames 2021-09-20 16:37:56 -04:00
Robin Voetter
ea393b2bca Address Spaces: Implement in LLVM codegen 2021-09-20 02:29:04 +02:00
Ryan Liptak
59f5053bed Update all ensureCapacity calls to the relevant non-deprecated version 2021-09-19 13:52:56 +02:00
Jacob G-W
84ab03a875 plan9 linker: get ready to delete allocateDeclIndexes 2021-09-18 19:44:41 -04:00
Jacob G-W
f388b57553 plan9: emit line debug info in codegen 2021-09-18 19:43:26 -04:00
Andrew Kelley
b67d1810be stage2: implement @atomicRmw and @atomicLoad
* langref: add some more "see also" links for atomics
 * Add the following AIR instructions
   - atomic_load
   - atomic_store_unordered
   - atomic_store_monotonic
   - atomic_store_release
   - atomic_store_seq_cst
   - atomic_rmw
 * Implement those AIR instructions in LLVM and C backends.
 * AstGen: make the `ty` result locations for `@atomicRmw`, `@atomicLoad`,
   and `@atomicStore` be `coerced_ty` to avoid unnecessary ZIR
   instructions when Sema will be doing the coercions redundantly.
 * Sema for `@atomicLoad` and `@atomicRmw` is done, however Sema for
   `@atomicStore` is not yet implemented.
   - comptime eval for `@atomicRmw` is not yet implemented.
 * Sema: flesh out `coerceInMemoryAllowed` a little bit more. It can now
   handle pointers.
2021-09-15 19:00:35 -07:00
Andrew Kelley
19691c0b17 stage2: implement @fence 2021-09-15 12:37:32 -07:00
Jakub Konka
25416d8121 macho: when adding extern fn, check if already resolved
This way, we will generate valid relocation info in the codegen.
2021-09-15 16:51:56 +02:00
Andrew Kelley
0395b35cee stage2: implement cmpxchg and improve comptime eval
* Implement Sema for `@cmpxchgWeak` and `@cmpxchgStrong`. Both runtime
   and comptime codepaths are implement.
 * Implement Codegen for LLVM backend and C backend.
 * Add LazySrcLoc.node_offset_builtin_call_argX 3...5
 * Sema: rework comptime control flow.
   - `error.ComptimeReturn` is used to signal that a comptime function
     call has returned a result (stored in the Inlining struct).
     `analyzeCall` notices this and handles the result.
   - The ZIR instructions `break_inline`, `block_inline`,
     `condbr_inline` are now redundant and can be deleted. `break`,
     `block`, and `condbr` function equivalently inside a comptime scope.
   - The ZIR instructions `loop` and `repeat` also are modified to
     directly perform comptime control flow inside a comptime scope,
     skipping an unnecessary mechanism for analysis of runtime code.
     This makes Zig perform closer to an interpreter when evaluating
     comptime code.
 * Sema: zirRetErrValue looks at Sema.ret_fn_ty rather than sema.func
   for adding to the inferred error set. This fixes a bug for
    inlined/comptime function calls.
 * Implement ZIR printing for cmpxchg.
 * stage1: make cmpxchg respect --single-threaded
   - Our LLVM C++ API wrapper failed to expose this boolean flag before.
 * Fix AIR printing for struct fields showing incorrect liveness data.
2021-09-14 21:58:22 -07:00
Jakub Konka
85f065a511
Merge pull request #9676 from ziglang/zld-incr
MachO: merges stage1 with self-hosted codepath
2021-09-14 14:20:11 +02:00
Andrew Kelley
97d69e3352 stage2: add array_to_slice AIR instruction 2021-09-13 21:37:11 -07:00
Jakub Konka
a38b636045 Merge remote-tracking branch 'origin/master' into zld-incr 2021-09-13 23:40:38 +02:00
Andrew Kelley
332eafeb7f stage2: first pass at implementing usingnamespace
Ran into a design flaw here which will need to get solved by having
AstGen annotate ZIR with which instructions are closed over.
2021-09-01 17:54:06 -07:00
Andrew Kelley
3b9ec4e4df
Merge pull request #9655 from nektro/stage2-rem
stage2: implement runtime `%` and `@rem`
2021-08-31 21:59:48 -04:00
joachimschmidt557
4334dbb9a5 stage2 codegen: Remove use of usingnamespace 2021-08-30 13:40:03 -04:00
Meghan Denny
e878a6633f stage2: implement runtime % and @rem 2021-08-30 00:31:40 -07:00
Jakub Konka
29df0ca39d Merge remote-tracking branch 'origin/master' into zld-incr 2021-08-26 14:35:34 +02:00
Jakub Konka
ee786e5c3c macho: add GOT entries as actual atoms 2021-08-25 17:23:30 +02:00
Jacob G-W
4ac37eb484 stage2 Air: add struct_field_ptr_index_{0..3}
Since these are very common, it will save memory.
2021-08-21 23:52:55 -04:00
joachimschmidt557
5806c386eb stage2 codegen: re-allocate result register in finishAir
In some cases (such as bitcast), an operand may be the same MCValue as
the result. If that operand died and was a register, it was freed by
processDeath. We have to "re-allocate" the register.
2021-08-20 19:06:30 -04:00
joachimschmidt557
e48d7bbb99 stage2 ARM: Implement loading from memory 2021-08-20 19:05:50 -04:00
Andrew Kelley
a2438357e1
Merge pull request #9597 from joachimschmidt557/stage2-arm-bitshift
stage2 ARM: implement bitshifts
2021-08-20 19:05:05 -04:00
Andrew Kelley
0cd361219c stage2: field type expressions support referencing locals
The big change in this commit is making `semaDecl` resolve the fields if
the Decl ends up being a struct or union. It needs to do this while
the `Sema` is still in scope, because it will have the resolved AIR
instructions that the field type expressions possibly reference. We do
this after the decl is populated and set to `complete` so that a `Decl`
may reference itself.

Everything else is fixes and improvements to make the test suite pass
again after making this change.

 * New AIR instruction: `ptr_elem_ptr`
   - Implemented for LLVM backend
 * New Type tag: `type_info` which represents `std.builtin.TypeInfo`. It
   is used by AstGen for the operand type of `@Type`.
 * ZIR instruction `set_float_mode` uses `coerced_ty` to avoid
   superfluous `as` instruction on operand.
 * ZIR instruction `Type` uses `coerced_ty` to properly handle result
   location type of operand.

 * Fix two instances of `enum_nonexhaustive` Value Tag not handled
   properly - it should generally be handled the same as `enum_full`.
 * Fix struct and union field resolution not copying Type and Value
   objects into its Decl arena.
 * Fix enum tag value resolution discarding the ZIR=>AIR instruction map
   for the child Sema, when they still needed to be accessed.
 * Fix `zirResolveInferredAlloc` use-after-free in the AIR instructions
   data array.
 * Fix `elemPtrArray` not respecting const/mutable attribute of pointer
   in the result type.
 * Fix LLVM backend crashing when `updateDeclExports` is called before
   `updateDecl`/`updateFunc` (which is, according to the API, perfectly
   legal for the frontend to do).
 * Fix LLVM backend handling element pointer of pointer-to-array. It
   needed another index in the GEP otherwise LLVM saw the wrong type.
 * Fix LLVM test cases not returning 0 from main, causing test failures.
   Fixes a regression introduced in
   6a5094872f10acc629543cc7f10533b438d0283a.

 * Implement comptime shift-right.
 * Implement `@Type` for integers and `@TypeInfo` for integers.
 * Implement union initialization syntax.
 * Implement `zirFieldType` for unions.
 * Implement `elemPtrArray` for a runtime-known operand.

 * Make `zirLog2IntType` support RHS of shift being `comptime_int`. In
   this case it returns `comptime_int`.

The motivating test case for this commit was originally:

```zig
test "example" {
    var l: List(10) = undefined;
    l.array[1] = 1;
}

fn List(comptime L: usize) type {
    var T = u8;
    return struct {
        array: [L]T,
    };
}
```

However I changed it to:

```zig
test "example" {
    var l: List = undefined;
    l.array[1] = 1;
}

const List = blk: {
    const T = [10]u8;
    break :blk struct {
        array: T,
    };
};
```

Which ended up being a similar, smaller problem. The former test case
will require a similar solution in the implementation of comptime
function calls - checking if the result of the function call is a struct
or union, and using the child `Sema` before it is destroyed to resolve
the fields.
2021-08-20 15:41:57 -07:00
joachimschmidt557
f9e50a5830
stage2 ARM: implement bitshifting for 32-bit integers 2021-08-20 23:17:46 +02:00
Andrew Kelley
6a5094872f
Merge pull request #9587 from g-w1/sh
stage2: implement shr and shl
2021-08-19 23:47:44 -04:00
Jacob G-W
2e6ce11eb2 stage2: implement shr and boilerplate for shl
This implements it in the llvm and c backends.
x86_64 will have to be a little more work.
2021-08-19 16:18:40 -04:00
Jacob G-W
df10e998ee stage2 x86_64: enable bitwise and + or and add tests 2021-08-19 22:21:16 +03:00
Jakub Konka
da57d6df32 macho: simplify symbol management and resolution
instead of globally storing unresolved and tentative defs,
store indices to actual symbols in the functions that are responsible
for symbol resolution.
2021-08-12 10:20:57 +02:00
Andrew Kelley
799fedf612 stage2: pass some error union tests
* Value: rename `error_union` to `eu_payload` and clarify the intended
   usage in the doc comments. The way error unions is represented with
   Value is fixed to not have ambiguous values.
 * Fix codegen for error union constants in all the backends.
 * Implement the AIR instructions having to do with error unions in the
   LLVM backend.
2021-08-07 20:34:28 -07:00
Andrew Kelley
f81b2531cb stage2: pass some pointer tests
* New AIR instructions: ptr_add, ptr_sub, ptr_elem_val, ptr_ptr_elem_val
   - See the doc comments for details.
 * Sema: implement runtime pointer arithmetic.
 * Sema: implement elem_val for many-pointers.
 * Sema: support coercion from `*[N:s]T` to `[*]T`.
 * Type: isIndexable handles many-pointers.
2021-08-07 15:46:53 -07:00
Ryan Liptak
d31352ee85 Update all usages of mem.split/mem.tokenize for generic version 2021-08-06 02:01:47 -07:00
Andrew Kelley
ddf14323ea stage2: implement @truncate 2021-08-01 16:13:58 -07:00
joachimschmidt557
0d09c6aed8 stage2 ARM: fix stack alignment
Acording to the AAPCS32, the stack alignment at public interfaces
should be 8, not 4.
2021-08-01 03:57:08 -04:00
Andrew Kelley
1f95c50d9a codegen: cmp lowering treats bools the same as unsigned int
fixes a crash when lowering `a == b` and they are of type bool.
I'm not worried about floats; I think we will probably add separate AIR
instructions for floats.
2021-07-30 17:48:24 -07:00
joachimschmidt557
84039a57e4 stage2 codegen: Implement genTypedValue for enums 2021-07-30 17:53:33 -04:00
joachimschmidt557
f6b1fa9e29 stage2 codegen: genTypedValue for error unions and error sets 2021-07-30 13:22:33 -04:00
Andrew Kelley
040c6eaaa0 stage2: garbage collect unused anon decls
After this change, the frontend and backend cooperate to keep track of
which Decls are actually emitted into the machine code. When any backend
sees a `decl_ref` Value, it must mark the corresponding Decl `alive`
field to true.

This prevents unused comptime data from spilling into the output object
files. For example, if you do an `inline for` loop, previously, any
intermediate value calculations would have gone into the object file.
Now they are garbage collected immediately after the owner Decl has its
machine code generated.

In the frontend, when it is time to send a Decl to the linker, if it has
not been marked "alive" then it is deleted instead.

Additional improvements:
 * Resolve type ABI layouts after successful semantic analysis of a
   Decl. This is needed so that the backend has access to struct fields.
 * Sema: fix incorrect logic in resolveMaybeUndefVal. It should return
   "not comptime known" instead of a compile error for global variables.
 * `Value.pointerDeref` now returns `null` in the case that the pointer
   deref cannot happen at compile-time. This is true for global
   variables, for example. Another example is if a comptime known
   pointer has a hard coded address value.
 * Binary arithmetic sets the requireRuntimeBlock source location to the
   lhs_src or rhs_src as appropriate instead of on the operator node.
 * Fix LLVM codegen for slice_elem_val which had the wrong logic for
   when the operand was not a pointer.

As noted in the comment in the implementation of deleteUnusedDecl, a
future improvement will be to rework the frontend/linker interface to
remove the frontend's responsibility of calling allocateDeclIndexes.

I discovered some issues with the plan9 linker backend that are related
to this, and worked around them for now.
2021-07-29 19:30:37 -07:00
Andrew Kelley
a5c6e51f03 stage2: more principled approach to comptime references
* AIR no longer has a `variables` array. Instead of the `varptr`
   instruction, Sema emits a constant with a `decl_ref`.
 * AIR no longer has a `ref` instruction. There is no longer any
   instruction that takes a value and returns a pointer to it. If this
   is desired, Sema must either create an anynomous Decl and return a
   constant `decl_ref`, or in the case of a runtime value, emit an
   `alloc` instruction, `store` the value to it, and then return the
   `alloc`.
 * The `ref_val` Value Tag is eliminated. `decl_ref` should be used
   instead. Also added is `eu_payload_ptr` which points to the payload
   of an error union, given an error union pointer.

In general, Sema should avoid calling `analyzeRef` if it can be helped.
For example in the case of field_val and elem_val, there should never be
a reason to create a temporary (alloc or decl). Recent previous commits
made progress along that front.

There is a new abstraction in Sema, which looks like this:

    var anon_decl = try block.startAnonDecl();
    defer anon_decl.deinit();
    // here 'anon_decl.arena()` may be used
    const decl = try anon_decl.finish(ty, val);
    // decl is typically now used with `decl_ref`.

This pattern is used to upgrade `ref_val` usages to `decl_ref` usages.

Additional improvements:

 * Sema: fix source location resolution for calling convention
   expression.
 * Sema: properly report "unable to resolve comptime value" for loads of
   global variables. There is now a set of functions which can be
   called if the callee wants to obtain the Value even if the tag is
   `variable` (indicating comptime-known address but runtime-known value).
 * Sema: `coerce` resolves builtin types before checking equality.
 * Sema: fix `u1_type` missing from `addType`, making this type have a
   slightly more efficient representation in AIR.
 * LLVM backend: fix `genTypedValue` for tags `decl_ref` and `variable`
   to properly do an LLVMConstBitCast.
 * Remove unused parameter from `Value.toEnum`.

After this commit, some test cases are no longer passing. This is due to
the more principled approach to comptime references causing more
anonymous decls to get sent to the linker for codegen. However, in all
these cases the decls are not actually referenced by the runtime machine
code. A future commit in this branch will implement garbage collection
of decls so that unused decls do not get sent to the linker for codegen.
This will make the tests go back to passing.
2021-07-29 15:59:51 -07:00