3694 Commits

Author SHA1 Message Date
Jakub Konka
e80ebc6740
Merge pull request #10625 from ziglang/stage2-x86_64-inline-memset
stage2: add inline memset, partial intcast and more array goodness for x86_64
2022-01-18 22:23:58 +01:00
Jakub Konka
8201939d7f stage2: implement airArrayElemVal 2022-01-18 18:55:02 +01:00
Andrew Kelley
f423b5949b Revert "stage2: implement @prefetch"
This reverts commit d48e4245b68bf25c7f41804a5012ac157a5ee546.

I have no idea why this is failing Drone CI, but in a branch, reverting
this commit solved the problem.
2022-01-18 10:47:02 -07:00
Jakub Konka
8c233687b4 stage2: partially implement intcast on x86_64
* fix violating encoding invariant for memory encoding
* enable some cast tests for x86_64 and arm
2022-01-18 13:18:59 +01:00
Andrew Kelley
4d05f2ae5f remove zig_is_stage2 from @import("builtin")
Instead use the standarized option for communicating the
zig compiler backend at comptime, which is `zig_backend`. This was
introduced in commit 1c24ef0d0b09a12a1fe98056f2fc04de78a82df3.
2022-01-17 21:55:49 -07:00
Andrew Kelley
84c2c47fae Sema: implement else capture value
The ZIR instructions `switch_capture_else` and `switch_capture_ref` are
removed because they are not needed. Instead, the prong index is set to
max int for the special prong.

Else prong with error sets is not handled yet.

Adds a new behavior test because there was not a prior on to cover only
the capture value of else on a switch.
2022-01-17 20:45:55 -07:00
Andrew Kelley
2600978a9d behavior tests: a couple more switch cases are passing 2022-01-17 19:52:24 -07:00
Jakub Konka
e69cb9105a
Merge pull request #10616 from ziglang/stage2-x86_64-array-to-slice
stage2: implement airArrayToSlice for x86_64
2022-01-18 01:25:48 +01:00
Andrew Kelley
f4e051e35d Sema: fix comptime break semantics
Previously, breaking from an outer block at comptime would result in
incorrect control flow. Now there is a mechanism, `error.ComptimeBreak`,
similar to `error.ComptimeReturn`, to send comptime control flow further
up the stack, to its matching block.

This commit also introduces a new log scope. To use it, pass
`--debug-log sema_zir` and you will see 1 line per ZIR instruction
semantically analyzed. This is useful when you want to understand what
comptime control flow is doing while debugging the compiler.

One more `switch` test case is passing.
2022-01-17 15:23:50 -07:00
Jakub Konka
ab204f81b0 stage2: return error.SkipZigTest in unsupported behavior tests 2022-01-17 20:30:44 +01:00
Jakub Konka
9b715cb462 stage2: implement airArrayToSlice for x86_64
* implement `genSetStack` for `ptr_stack_offset`
* handle `ptr_add`
* implement storing from register into pointer in register
* split alignment and array tests into those that pass on x86_64 and
  those that do not
* pass more tests on x86_64
2022-01-17 20:24:14 +01:00
Jakub Konka
79628d48a4 stage2: implement airCondBr for immediate MCValue in x86_64
Pass more behavior tests.
2022-01-17 16:35:41 +01:00
fn ⌃ ⌥
d46973ee4f translate-c: improve error messages when expecting specific tokens
Old:
  unable to translate C expr: expected ')'
New:
  unable to translate C expr: expected ')' instead got '...'
2022-01-17 17:16:48 +02:00
riverbl
c71cf48cb5 stage2: do not interpret identifier containing underscores (eg: u3_2) as int primitive type 2022-01-17 16:54:48 +02:00
riverbl
aa5514fcf2 translate-c: Fix issues translating macro define of hex float constant
* Fix incorrect result when the first digit after the decimal point is not 0-9 - eg 0x0.ap0
* Fix compiler panic when the number starts with `0X` with a capital `X` - eg 0X0p0
* Fix compiler panic when the number has a decimal point immediately after `0x` - eg 0x.0p0
2022-01-17 16:49:46 +02:00
Andrew Kelley
0f3938e498 behavior tests: move tests around 2022-01-16 10:14:57 -07:00
Andrew Kelley
7f41e20802 AstGen: emit as instructions for branching expressions
There is a mechanism to avoid redundant `as` ZIR instructions which is
to pass `ResultLoc.coerced_ty` instead of `ResultLoc.ty` when it is
known by AstGen that Sema will do the coercion.

This commit downgrades `coerced_ty` to `ty` when a result location
passes through an expression that branches, such as `if`, `switch`,
`while`, and `for`, causing the `as` ZIR instruction to be emitted.

This ensures that the type of a result location will be applied to, e.g.
a `comptime_int` on either side of a branch on a runtime condition.
2022-01-15 23:13:44 -07:00
Andrew Kelley
7c6f5d26ea Sema: populate the sentinel for comptime array inits 2022-01-15 22:46:39 -07:00
joachimschmidt557
0d2f4d0654 stage2 ARM: implement load for stack_offset + stack_argument_offset
1 more behavior test passing
2022-01-15 18:29:06 -05:00
Andrew Kelley
d48e4245b6 stage2: implement @prefetch 2022-01-15 15:18:25 -07:00
Jakub Konka
3af4e28dda stage2: implement signed compare 2022-01-15 19:32:16 +01:00
Jakub Konka
4d4bbd7624 stage2: refactor handling of immediates in x86_64 backend
Fixes issues with incorrect operand sizes in a handful of cases
and allows for usage of differently sized integers in Zig sources.
2022-01-15 18:28:39 +01:00
Andrew Kelley
a5c7742ba6 stage2: fix Decl garbage collection not marking enough
It is the job of codegen backends to mark Decls that are referenced as
alive so that the frontend does not sweep them with the garbage. This
commit unifies the code between the backends with an added method on
Decl.

The implementation is more complete than before, switching on the Decl
val tag and recursing into sub-values.

As a result, two more array tests are passing.
2022-01-15 00:17:25 -07:00
Andrew Kelley
41f3799bf0 Sema: fix array_init with runtime element
Previously it emitted an invalid AIR encoding.
2022-01-14 23:08:11 -07:00
xavier
3f52132a8f tests: include global initializers in c++ compiler test 2022-01-14 11:48:38 -07:00
Marc Tiehuis
a64989ee70 stage1: fix bigint_init_bigfloat for single-limb negative floats
Fixes #10592.
2022-01-14 13:29:58 -05:00
Andrew Kelley
336d0c97fe stage2: detection of comptime array literals
Introduce `validate_array_init_comptime`, similar to
`validate_struct_init_comptime` introduced in
713d2a9b3883942491b40738245232680877cc66.

`zirValidateArrayInit` is improved to detect comptime array literals and
emit AIR accordingly. This code is very similar to the changes
introduced in that same commit for `zirValidateStructInit`.

The C backend needed some improvements to continue passing the same set
of tests:
 * `resolveInst` for arrays now will add a local `static const` with the
   array value and so then `elem_val` instructions reference that local.
   It memoizes accesses using `value_map`, which is changed to use
   `Air.Inst.Ref` as the key rather than `Air.Inst.Index`.
 * This required a mechanism for writing to a "header" which is lines
   that appear at the beginning of a function body, before everything
   else.
 * dbg_stmt output comments rather than `#line` directives.
   TODO comment reproduced here:

We need to re-evaluate whether to emit these or not. If we naively emit
these directives, the output file will report bogus line numbers because
every newline after the #line directive adds one to the line.
We also don't print the filename yet, so the output is strictly unhelpful.
If we wanted to go this route, we would need to go all the way and not output
newlines until the next dbg_stmt occurs.
Perhaps an additional compilation option is in order?

`Value.elemValue` is improved to support `elem_ptr` values.
2022-01-13 22:13:44 -07:00
Andrew Kelley
b019a19b55 Sema: comptime loads and stores for elem_ptr
The index is checked against actual array lengths, and now handles
coerced or casted pointers to single items.
2022-01-13 22:13:44 -07:00
Andrew Kelley
93b854eb74 stage2: implement @ctz and @clz including SIMD
AIR:
 * `array_elem_val` is now allowed to be used with a vector as the array
   type.
 * New instructions: splat, vector_init

AstGen:
 * The splat ZIR instruction uses coerced_ty for the ResultLoc, avoiding
   an unnecessary `as` instruction, since the coercion will be performed
   in Sema.
 * Builtins that accept vectors now ignore the type parameter. Comment
   from this commit reproduced here:

   The accepted proposal #6835 tells us to remove the type parameter from
   these builtins. To stay source-compatible with stage1, we still observe
   the parameter here, but we do not encode it into the ZIR. To implement
   this proposal in stage2, only AstGen code will need to be changed.

Sema:
 * `clz` and `ctz` ZIR instructions are now handled by the same function
   which accept AIR tag and comptime eval function pointer to
   differentiate.
 * `@typeInfo` for vectors is implemented.
 * `@splat` is implemented. It takes advantage of `Value.Tag.repeated` 😎
 * `elemValue` is implemented for vectors, when the index is a scalar.
   Handling a vector index is still TODO.
 * Element-wise coercion is implemented for vectors. It could probably
   be optimized a bit, but it is at least complete & correct.
 * `Type.intInfo` supports vectors, returning int info for the element.
 * `Value.ctz` initial implementation. Needs work.
 * `Value.eql` is implemented for arrays and vectors.

LLVM backend:
 * Implement vector support when lowering `array_elem_val`.
 * Implement vector support when lowering `ctz` and `clz`.
 * Implement `splat` and `vector_init`.
2022-01-12 23:53:26 -07:00
riverbl
c4681b4889 translate-c: Fix macro define of float constant using scientific notation
Fixes compiler attempting to use null value when translating macro define of float constant using scientific notation with no decimal point
2022-01-12 13:25:50 -05:00
Evan Haas
f4b3f1d602 translate-c: Handle typedef'ed void return type for functions.
Fixes #10356
2022-01-11 12:42:23 -05:00
Luuk de Gram
bf46aee878
wasm: Basic 128bit integer support
This implements storing, loading and comparing 128bit integers.
TODO: Make all >64 bit integers make a call to compiler-rt for binary operations.
2022-01-10 21:03:37 +01:00
Luuk de Gram
e7b7088056
wasm: Implement float_to_int
- This implements the float_to_int AIR instruction.
- Lowering a decl_ref to a slice was previously assumed to contain a pointer
to a slice, rather than an array. This is now fixed, making `@src()` work as well.
- Some preliminary work on 128bit integers have been done to find out what needs to be done
to implement 128bit arithmetic.
2022-01-10 21:01:00 +01:00
Jakub Konka
a4e6291fbd
stage2: enable zig test on x86_64-macos (#10551)
* stage2: put decls in different MachO sections

Use `getDeclVAddrWithReloc` when targeting MachO backend rather than
`getDeclVAddr` - this fn returns a zero vaddr and instead creates a
relocation on the linker side which will get automatically updated
whenever the target decl is moved in memory. This fn also records
a rebase of the target pointer so that its value is correctly slid
in presence of ASLR.

This commit enables `zig test` on x86_64-macos.

* stage2: fix output section selection for type,val pairs
2022-01-10 16:02:07 +01:00
joachimschmidt557
a1526f069a
stage2 ARM: pass behavior/bool.zig 2022-01-09 19:03:45 +01:00
Luuk de Gram
2a39d8063d wasm: Implement arrays 2022-01-08 19:56:07 -05:00
Andrew Kelley
7651913fd2
Merge pull request #10542 from Hejsil/stage2-bit-offset-of
Stage2 bitOffsetOf and offsetOf builtin functions
2022-01-08 15:48:14 -05:00
Robin Voetter
cc5c25d48b stage2: implement @src 2022-01-08 14:32:40 -05:00
Robin Voetter
4931b8dc93 stage2: @errorName sema+llvm 2022-01-08 14:30:11 -05:00
Jimmi Holst Christensen
5cbb35abd0 Implement bitOffsetOf
This also refactors getting struct field offsets into two
iterators. This will be useful when implementing bitCast at comptime on
structs.
2022-01-08 14:01:28 +01:00
Jimmi Holst Christensen
3871d5e55a bit_shifting.zig now passes stage2 llvm backend 2022-01-07 22:10:36 +01:00
Meghan
c08b190c69
lint: duplicate import (#10519) 2022-01-07 00:06:06 -05:00
Jimmi Holst Christensen
7f4fdcc4fc stage2: Implement validating switch on errors 2022-01-06 22:57:45 -05:00
Andrew Kelley
59315463f2 ci: add test coverage for self-hosted arm and x86_64 backends 2022-01-06 22:57:29 -05:00
Andrew Kelley
77f230ebd8 C backend is passing test/behavior/undefined.zig
closes #10505
2022-01-06 13:07:38 -07:00
Jakub Konka
97e76bf36c stage2: temporarily disable offending stage2 test on macOS
Another caveat, `zig test` doesn't currently work on stage2.
2022-01-06 12:57:34 +01:00
Jakub Konka
a124192fb0 stage2: implement basics of airWrapErrUnionErr
Enable more behavior tests for x86_64.
2022-01-06 10:12:01 +01:00
Jakub Konka
b215241ef2 stage2: fix airSliceElemVal
Refactor codegen and fix a bug in Isel.
2022-01-06 09:54:33 +01:00
Andrew Kelley
8c6175c134 Sema: const inferred alloc infers comptime-ness
const locals now detect if the value ends up being comptime known. In
such case, it replaces the runtime AIR instructions with a decl_ref
const.

In the backends, some more sophisticated logic for marking decls as
alive was needed to prevent Decls incorrectly being garbage collected
that were indirectly referenced in such manner.
2022-01-06 00:52:10 -07:00
Andrew Kelley
713d2a9b38 Sema: better code generated for struct literals
Add a variant of the `validate_struct_init` ZIR instruction:
`validate_struct_init_comptime` which is the same thing except it
indicates a comptime scope.

Sema code for this instruction now handles default struct field
values and detects when the struct initialization resulted in a
comptime value, replacing the already-emitted AIR instructions
to store each individual field with a single `store` instruction
with a comptime struct value as the operand.

In the case of a comptime scope, there is a simpler path that only
evals the implicit store instructions for default field values, avoiding
the mechanism for detecting comptime values.

This regressed one test case for the wasm backend, but it's just hitting
a different prong of `emitConstant` which currently has "TODO" in there,
so I think it's fine.
2022-01-04 23:49:49 -07:00