214 Commits

Author SHA1 Message Date
Veikka Tuominen
cba68090a6 stage2: implement @shuffle at runtime 2022-03-11 13:12:32 +02:00
Andrew Kelley
078037ab9b stage2: passing threadlocal tests for x86_64-linux
* use the real start code for LLVM backend with x86_64-linux
   - there is still a check for zig_backend after initializing the TLS
     area to skip some stuff.
 * introduce new AIR instructions and implement them for the LLVM
   backend. They are the same as `call` except with a modifier.
   - call_always_tail
   - call_never_tail
   - call_never_inline
 * LLVM backend calls hasRuntimeBitsIgnoringComptime in more places to
   avoid unnecessarily depending on comptimeOnly being resolved for some
   types.
 * LLVM backend: remove duplicate code for setting linkage and value
   name. The canonical place for this is in `updateDeclExports`.
 * LLVM backend: do some assembly template massaging to make `%%`
   rendered as `%`. More hacks will be needed to make inline assembly
   catch up with stage1.
2022-03-11 00:04:42 -07:00
Andrew Kelley
71b8760d3b stage2: rework @mulAdd
* mul_add AIR instruction: use `pl_op` instead of `ty_pl`. The type is
   always the same as the operand; no need to waste bytes redundantly
   storing the type.
 * AstGen: use coerced_ty for all the operands except for one which we
   use to communicate the type.
 * Sema: use the correct source location for requireRuntimeBlock in
   handling of `@mulAdd`.
 * native backends: handle liveness even for the functions that are
   TODO.
 * C backend: implement `@mulAdd`. It lowers to libc calls.
 * LLVM backend: make `@mulAdd` handle all float types.
   - improved fptrunc and fpext to handle f80 with compiler-rt calls.
 * Value.mulAdd: handle all float types and use the `@mulAdd` builtin.
 * behavior tests: revert the changes to testing `@mulAdd`. These
   changes broke the test coverage, making it only tested at
   compile-time.

Improved f80 support:
 * std.math.fma handles f80
 * move fma functions from freestanding libc to compiler-rt
   - add __fmax and fmal
   - make __fmax and fmaq only exported when they don't alias fmal.
   - make their linkage weak just like the rest of compiler-rt symbols.
 * removed `longDoubleIsF128` and replaced it with `longDoubleIs` which
   takes a type as a parameter. The implementation is now more accurate
   and handles more targets. Similarly, in stage2 the function
   CTypes.sizeInBits is more accurate for long double for more targets.
2022-03-06 16:11:39 -07:00
John Schmidt
6637335981 stage2: implement @mulAdd for scalar floats 2022-03-06 15:36:56 -07:00
Andrew Kelley
e532b0c0b5 stage2: cleanups to wasm memory intrinsics
* AIR: use pl_op instead of ty_pl for wasm_memory_size. No need to
   store the type because the type is always `u32`.
 * AstGen: use coerced_ty for `@wasmMemorySize` and `@wasmMemoryGrow`
   and do the coercions in Sema.
 * Sema: use more accurate source locations for errors.
 * Provide more information in the compiler error message.
 * Codegen: use liveness data to avoid lowering unused
   `@wasmMemorySize`.
 * LLVM backend: add implementation
   - I wasn't able to test it because we are hitting a linker error for
     `-target wasm32-wasi -fLLVM`.
 * C backend: use `zig_unimplemented()` instead of silently doing wrong
   behavior for these builtins.
 * behavior tests: branch only on stage2_arch for inclusion of the
   wasm.zig file. We would change it to `builtin.cpu.arch` but that is
   causing a compiler crash on some backends.
2022-03-03 18:31:55 -07:00
Luuk de Gram
7fd32de018 cbe: Implement wasm builtins
This implements the wasm builtins by lowering to builtins that are supported by c-compilers.
In this case: Clang.

This also simplifies the `AIR` instruction as it now uses the payload field of `ty_pl` and `pl_op`
directly to store the index argument rather than storing it inside Extra. This saves us 4 bytes
per builtin call.
2022-03-03 16:33:46 -07:00
Luuk de Gram
43cb19ea4d wasm: Implement @wasmMemoryGrow builtin
Similarly to the other wasm builtin, this implements the grow variation where the memory
index is a comptime known value. The operand as well as the result are runtime values.
This also verifies during semantic analysis the target we're building for is wasm, or else
emits a compilation error. This means that other backends do not have to handle this AIR instruction,
other than the wasm and LLVM backends.
2022-03-03 16:33:46 -07:00
Andrew Kelley
d5100dc815 stage2: fix frame_address AIR instruction
Various places were assuming different union tags. Now it is
consistently a no-op instruction, just like the similar
instruction ret_addr.
2022-02-28 13:38:33 -07:00
Veikka Tuominen
90bce11f62 stage2: implement @frameAddress 2022-02-28 13:09:14 -07:00
Andrew Kelley
2687b8f7f4 stage2: implement @unionInit
The ZIR instruction `union_init_ptr` is renamed to `union_init`.
I made it always use by-value semantics for now, not taking the time to
invest in result location semantics, in case we decide to change the
rules for unions. This way is much simpler.

There is a new AIR instruction: union_init. This is for a comptime known
tag, runtime-known field value.
vector_init is renamed to aggregate_init, which solves a TODO comment.
2022-02-26 20:59:36 -07:00
Veikka Tuominen
b034c45b2b stage2: implement fieldParentPtr 2022-02-24 19:48:34 +02:00
Veikka Tuominen
df38c46bee
Merge pull request #10929 from davidmrt98/cbe
stage2: C backend: fix codegen for field_ptr/elem_ptr values
2022-02-22 15:25:50 +02:00
Veikka Tuominen
27c63bf433 stage2: implement errunion_payload_ptr_set 2022-02-19 20:48:00 +02:00
Veikka Tuominen
89f6ff1771 stage2: correct use of .unwrap_err_union_* in LLVM and C backend 2022-02-19 20:21:48 +02:00
David Martschenko
176f7b8600 C backend: adjust order of parameters in renderDeclName 2022-02-19 13:05:09 +01:00
David Martschenko
4a6454fb8d C backend: fix codegen for field_ptr/elem_ptr values 2022-02-19 13:04:59 +01:00
Andrew Kelley
2e1c16d649
Merge pull request #10924 from ziglang/air-independence-day
AIR independence day
2022-02-19 02:57:48 -05:00
Andrew Kelley
4e1e5ab622 stage2: make AIR not reference ZIR for inline assembly
Instead it stores all the information it needs to into AIR.

closes #10784
2022-02-18 19:41:32 -07:00
Cody Tapscott
ef417f19e1 stage2: Implement @bitReverse and @byteSwap
This change implements the above built-ins for Sema and the LLVM
backend. Other backends have had placeholders added for lowering.
2022-02-18 14:28:32 -07:00
Cody Tapscott
1639fd4c45 Fix 2D array support for C backend
This updates the C backend to use proper array types.

In order to do that, this commit also:
 - fixes up elem_ptr and field_ptr handling
 - adds `renderTypecast` (renders in C typecast format, e.g. "int* [10]")
 - adds a bit special handling for undefined pointers, which is necessary
   to support slice/elem_ptr to undefined decls
2022-02-16 12:57:11 -07:00
Cody Tapscott
c4baa6696e cbe: Add writeCValueDeref and small re-factor 2022-02-16 12:19:54 -07:00
John Schmidt
7f0cf395aa stage2: implement all builtin floatops for f{16,32,64}
- Merge `floatop.zig` and `floatop_stage1.zig` since most tests now pass
  on stage2.
- Add more behavior tests for a bunch of functions.
2022-02-09 20:29:41 -05:00
John Schmidt
722d4a11bb stage2: implement @sqrt for f{16,32,64}
Support for f128, comptime_float, and c_longdouble require improvements
to compiler_rt and will implemented in a later PR. Some of the code in
this commit could be made more generic, for instance `llvm.airSqrt`
could probably be `llvm.airUnaryMath`, but let's cross that
bridge when we get to it.
2022-02-07 16:52:19 -07:00
Jakub Konka
556f0ce5bf stage2: add new Decl subtype, ExternFn
`ExternFn` will contain a maybe-lib-name if it was defined with
the `extern` keyword like so

```zig
extern "c" fn write(usize, usize, usize) usize;
```

`lib_name` will live as long as `ExternFn` decl does.
2022-02-06 08:42:14 +01:00
Andrew Kelley
fb7060d3c2 stage2: implement shl_exact and shr_exact
These produce an undefined value when one bits are shifted out.

New AIR instruction: shr_exact.
2022-01-30 16:23:31 -07:00
Andrew Kelley
618055db50 c backend: use an explicit map of reserved idents
rather than unconditionally prepending double underscore to all
identifiers. Also, use the prefix `zig_e_` instead of `__`. Also, avoid
triggering this escaping when rendering an identifier and there has
already been a prefix printed.
2022-01-25 20:49:43 -07:00
Andrew Kelley
a2abbeef90 stage2: rework a lot of stuff
AstGen:
 * rename the known_has_bits flag to known_non_opv to make it better
   reflect what it actually means.
 * add a known_comptime_only flag.
 * make the flags take advantage of identifiers of primitives and the
   fact that zig has no shadowing.
 * correct the known_non_opv flag for function bodies.

Sema:
 * Rename `hasCodeGenBits` to `hasRuntimeBits` to better reflect what it
   does.
   - This function got a bit more complicated in this commit because of
     the duality of function bodies: on one hand they have runtime bits,
     but on the other hand they require being comptime known.
 * WipAnonDecl now takes a LazySrcDecl parameter and performs the type
   resolutions that it needs during finish().
 * Implement comptime `@ptrToInt`.

Codegen:
 * Improved handling of lowering decl_ref; make it work for
   comptime-known ptr-to-int values.
   - This same change had to be made many different times; perhaps we
     should look into merging the implementations of `genTypedValue`
     across x86, arm, aarch64, and riscv.
2022-01-24 21:53:57 -07:00
Cody Tapscott
60e6bf112c Cleanup unnecessary switches in union logic 2022-01-24 12:49:14 -07:00
Cody Tapscott
cb24799368 Run zig fmt 2022-01-24 12:18:16 -07:00
Cody Tapscott
587a4437db Add union support to the C backend.
There are some differences vs. the union encoding in the LLVM backend:
   - Tagged unions with a 0-bit payload do not become their tag type. Instead,
     they are a struct with an empty `union` as their payload field.
   - We do not order the `payload`/`tag` storage based on their alignment
2022-01-24 12:00:04 -07:00
Cody Tapscott
983dfcd3fb Fix rendering of void function args 2022-01-24 12:00:04 -07:00
Cody Tapscott
8c96c64fbb Add support for rendering .enum_numbered 2022-01-24 12:00:04 -07:00
Cody Tapscott
52517e86d6 Avoid identifier conflicts with reserved C keywords 2022-01-24 12:00:01 -07:00
Cody Tapscott
799bd81b08 Add support for rendering .elem_ptr 2022-01-24 11:58:43 -07:00
Jimmi Holst Christensen
f1b91bb41b c backend: Implement aligning fields and local/global variables
There are some restrictions here.

- We either need C11 or a compiler that supports the aligned attribute
- We cannot provide align less than the type's natural C alignment.
2022-01-23 17:23:55 -05:00
Andrew Kelley
30efcf22d7 stage2: implement @prefetch
This reverts commit f423b5949b8722d4b290f57c3d06d015e39217b0,
re-instating commit d48e4245b68bf25c7f41804a5012ac157a5ee546.
2022-01-18 11:59:09 -07:00
Andrew Kelley
f423b5949b Revert "stage2: implement @prefetch"
This reverts commit d48e4245b68bf25c7f41804a5012ac157a5ee546.

I have no idea why this is failing Drone CI, but in a branch, reverting
this commit solved the problem.
2022-01-18 10:47:02 -07:00
Andrew Kelley
d48e4245b6 stage2: implement @prefetch 2022-01-15 15:18:25 -07:00
Andrew Kelley
a5c7742ba6 stage2: fix Decl garbage collection not marking enough
It is the job of codegen backends to mark Decls that are referenced as
alive so that the frontend does not sweep them with the garbage. This
commit unifies the code between the backends with an added method on
Decl.

The implementation is more complete than before, switching on the Decl
val tag and recursing into sub-values.

As a result, two more array tests are passing.
2022-01-15 00:17:25 -07:00
Andrew Kelley
336d0c97fe stage2: detection of comptime array literals
Introduce `validate_array_init_comptime`, similar to
`validate_struct_init_comptime` introduced in
713d2a9b3883942491b40738245232680877cc66.

`zirValidateArrayInit` is improved to detect comptime array literals and
emit AIR accordingly. This code is very similar to the changes
introduced in that same commit for `zirValidateStructInit`.

The C backend needed some improvements to continue passing the same set
of tests:
 * `resolveInst` for arrays now will add a local `static const` with the
   array value and so then `elem_val` instructions reference that local.
   It memoizes accesses using `value_map`, which is changed to use
   `Air.Inst.Ref` as the key rather than `Air.Inst.Index`.
 * This required a mechanism for writing to a "header" which is lines
   that appear at the beginning of a function body, before everything
   else.
 * dbg_stmt output comments rather than `#line` directives.
   TODO comment reproduced here:

We need to re-evaluate whether to emit these or not. If we naively emit
these directives, the output file will report bogus line numbers because
every newline after the #line directive adds one to the line.
We also don't print the filename yet, so the output is strictly unhelpful.
If we wanted to go this route, we would need to go all the way and not output
newlines until the next dbg_stmt occurs.
Perhaps an additional compilation option is in order?

`Value.elemValue` is improved to support `elem_ptr` values.
2022-01-13 22:13:44 -07:00
Andrew Kelley
c5ee73f65b stage2: fix build on 32-bit ISAs
Fixes regression introduced in 93b854eb745ab3294054ae71150fe60f134f4d10.
2022-01-13 10:42:38 -07:00
Andrew Kelley
93b854eb74 stage2: implement @ctz and @clz including SIMD
AIR:
 * `array_elem_val` is now allowed to be used with a vector as the array
   type.
 * New instructions: splat, vector_init

AstGen:
 * The splat ZIR instruction uses coerced_ty for the ResultLoc, avoiding
   an unnecessary `as` instruction, since the coercion will be performed
   in Sema.
 * Builtins that accept vectors now ignore the type parameter. Comment
   from this commit reproduced here:

   The accepted proposal #6835 tells us to remove the type parameter from
   these builtins. To stay source-compatible with stage1, we still observe
   the parameter here, but we do not encode it into the ZIR. To implement
   this proposal in stage2, only AstGen code will need to be changed.

Sema:
 * `clz` and `ctz` ZIR instructions are now handled by the same function
   which accept AIR tag and comptime eval function pointer to
   differentiate.
 * `@typeInfo` for vectors is implemented.
 * `@splat` is implemented. It takes advantage of `Value.Tag.repeated` 😎
 * `elemValue` is implemented for vectors, when the index is a scalar.
   Handling a vector index is still TODO.
 * Element-wise coercion is implemented for vectors. It could probably
   be optimized a bit, but it is at least complete & correct.
 * `Type.intInfo` supports vectors, returning int info for the element.
 * `Value.ctz` initial implementation. Needs work.
 * `Value.eql` is implemented for arrays and vectors.

LLVM backend:
 * Implement vector support when lowering `array_elem_val`.
 * Implement vector support when lowering `ctz` and `clz`.
 * Implement `splat` and `vector_init`.
2022-01-12 23:53:26 -07:00
Robin Voetter
4931b8dc93 stage2: @errorName sema+llvm 2022-01-08 14:30:11 -05:00
Andrew Kelley
8c6175c134 Sema: const inferred alloc infers comptime-ness
const locals now detect if the value ends up being comptime known. In
such case, it replaces the runtime AIR instructions with a decl_ref
const.

In the backends, some more sophisticated logic for marking decls as
alive was needed to prevent Decls incorrectly being garbage collected
that were indirectly referenced in such manner.
2022-01-06 00:52:10 -07:00
drew
2f53406ad8
CBE; implement airLoad and airStore for arrays (#10452)
Effectively a small continuation of #10152

This allows the for.zig behavior tests to pass. Unfortunately to fully test everything I had to move a lot of behavior tests from array.zig; most of them now pass (sorry @rainbowbismuth!)

I'm also conflicted on how I store constants into arrays because it's kind of stupid; array's can't be re-initialized using the same syntax, so instead of initializing each element, a new array is made which is copied into the destination. This also required that renderValue can't emit string literals for byte arrays given that they need to always have an extra byte for the NULL terminator, meaning that strings are no longer grep-able in the output.
2021-12-30 15:19:12 -05:00
Matthew Hall
4266795743 stage2: make tests/behaviour/void.zig work with c backend
* fix initialisation of void* fields of structs (initialises to 0xaa.. rather than {})
* don't generate struct fields when the field type does not have codegen bits
* in airAlloc generate a void* literal if the element type does not have codegen bits
2021-12-27 14:42:25 -08:00
Andrew Kelley
c8fb36b36c stage2: LLVM backend: implement @tagName for enums
Introduced a new AIR instruction: `tag_name`. Reasons to do this
instead of lowering it in Sema to a switch, function call, array
lookup, or if-else tower:
 * Sema is a bottleneck; do less work in Sema whenever possible.
 * If any optimization passes run, and the operand to becomes
   comptime-known, then it could change to have a comptime result
   value instead of lowering to a function or array or something which
   would then have to be garbage-collected.
 * Backends may want to choose to use a function and a switch branch,
   or they may want to use a different strategy.

Codegen for `@tagName` is implemented for the LLVM backend but not any
others yet.

Introduced some new `Type` tags:
 * `const_slice_u8_sentinel_0`
 * `manyptr_const_u8_sentinel_0`

The motivation for this was to make typeof() on the tag_name AIR
instruction non-allocating.

A bunch more enum tests are passing now.
2021-12-27 01:14:50 -07:00
Andrew Kelley
8b6ea9ffe7 C backend: implement ret_addr 2021-12-21 14:32:02 -07:00
Robin Voetter
e106e18d96 stage2: @shlWithOverflow 2021-12-21 01:47:27 +01:00
Robin Voetter
964dbeb826 stage2: @subWithOverflow 2021-12-21 01:41:51 +01:00