126 Commits

Author SHA1 Message Date
Andrew Kelley
cb616cb797 stage2: implement runtime @intToEnum
* Update AIR instruction `intcast` to allow the dest type to be an
   enum.
 * LLVM backend: update `intcast` to support when the bit counts of
   operand and dest type are the same. This was already a requirement of
   the instruction previously.
 * Type: `intInfo` supports the case when the type is an enum, and
   retrieves the info for the integer tag type. This makes it pretty
   easy for backends to implement `intcast` without having to care
   explicitly that the new type is an enum. As a bonus, simple enums
   never have to go through the type system; their signedness and bit
   count are computed directly.

The "int to enum" behavior test case is now passing for stage2 in the
LLVM backend.
2021-10-05 21:38:47 -07:00
Andrew Kelley
941b2f0d5e move tagged union behavior tests to the appropriate place
tagged unions used to be called "enums" but now they are called
"tagged unions".
2021-10-05 21:07:36 -07:00
Andrew Kelley
5518a0aff2 freestanding libc: export fmal
libc requires this to use `long double` which is sometimes the same as
f128, sometimes not.

Also for an unknown reason, aarch64 is getting an invalid result for the
`@mulAdd` behavior test for f128. See #9900.
2021-10-05 16:56:46 -07:00
Andrew Kelley
2fe7b06f3d add support for f128 @mulAdd
std: add f128 implementations of fma, frexp, and ilogb. Expose `fmal` in
zig's freestanding libc. This makes `@mulAdd` work correctly for f128.

Fixes a CI regression from yesterday, where I added a usage of f128
`@mulAdd` into the self-hosted compiler.
2021-10-05 12:32:26 -07:00
Andrew Kelley
6115cf2240 migrate from std.Target.current to @import("builtin").target
closes #9388
closes #9321
2021-10-04 23:48:55 -07:00
Andrew Kelley
78902db68b stage2: fix comptime @bitCast
Before, Sema for comptime `@bitCast` would return the same Value but
change the Type. This gave invalid results because, for example, an
integer Value when the Type is a float would be interpreted numerically,
but `@bitCast` needs it to reinterpret how they would be stored in
memory.

This requires a mechanism to serialize a Value to a byte buffer and
deserialize a Value from a byte buffer.

Not done yet, but needs to happen: comptime dereferencing a pointer
to a Decl needs to perform a comptime bitcast on the loaded value.
Currently the value is silently wrong in the same way that `@bitCast`
was silently wrong before this commit.

The logic in Value for handling readFromMemory for large integers is
only correct for small integers. It needs to be fleshed out for proper
big integers.

As part of this change:
 * std.math.big.Int: initial implementations of readTwosComplement and
   writeTwosComplement. They only support bit_count <= 128 so far and
   panic otherwise.
 * compiler-rt: move the compareXf2 exports over to the stage2 section.
   Even with the improvements in this commit, I'm still seeing test
   failures in the widening behavior tests; more investigation is
   needed.
2021-10-04 23:30:04 -07:00
Andrew Kelley
ac2333ee63 stage2: fix Type max/min int calculation
This was an attempt to move saturating_arithmetic.zig to the "passing
for stage2" section, which did not pan out due to the discovery of 2
prerequisite items that need to be done, but I did make a bug fix along
the way of the calculation of max/min integers.

This commit also simplifies the saturating arithmetic behavior tests to
depend on less of the zig language that is not related to saturating
arithmetic.
2021-10-04 12:23:49 -07:00
Andrew Kelley
c4df9bf56f AstGen: fix while and for with unreachable bodies
Companion commit to 61a53a587558ff1fe1b0ec98bb424022885edccf.

This commit also moves over a bunch of behavior test cases to the
passing-for-stage2 section.
2021-10-02 20:15:03 -07:00
Andrew Kelley
61a53a5875 AstGen: fix if, orelse, catch, with unreachable bodies
Before, the system to replace a result location pointer with a
traditional break instruction did not notice the case when one of the
bodies was unreachable. Now, the emitted ZIR code is improved and
simplified in this case, resulting in a new passing behavior test.
2021-10-02 19:09:54 -07:00
Andrew Kelley
468ed7ada5
Merge pull request #9875 from g-w1/timestimes
stage2: emit Value.repeated for `**` with array len 1
2021-10-02 16:05:12 -04:00
Jacob G-W
83dcd9f038 stage2: emit Value.repeated for ** where the array size is one
This takes advantage of the repeated value.
2021-10-01 16:46:28 -04:00
Andrew Kelley
3eb729b442 Merge remote-tracking branch 'origin/master' into llvm13 2021-09-30 21:38:04 -07:00
g-w1
5e7406bdd9
stage2: implement array_init instruction (#9843)
* stage2: array mul support more types of operands
* stage2: array cat support more types of operands
* print_zir: print array_init
* stage2: implement Sema for array_init
2021-09-30 18:31:27 -04:00
Andrew Kelley
ea6706b6f4 stage2: LLVM backend: implement struct type fwd decls
Makes struct types able to refer to themselves.
2021-09-29 14:04:52 -07:00
Andrew Kelley
33e77f127d stage2: implement @clz and @ctz
Also improve the LLVM backend to support lowering bigints to LLVM
values.

Moves over a bunch of math.zig test cases to the "passing for stage2"
section.
2021-09-28 22:38:51 -07:00
Andrew Kelley
5467582444 saturating arithmetic modifications
* Remove the builtins `@addWithSaturation`, `@subWithSaturation`,
   `@mulWithSaturation`, and `@shlWithSaturation` now that we have
   first-class syntax for saturating arithmetic.
 * langref: Clarify the behavior of `@shlExact`.
 * Ast: rename `bit_shift_left` to `shl` and `bit_shift_right` to `shr`
   for consistency.
 * Air: rename to include underscore separator with consistency with
   the rest of the ops.
 * Air: add shl_exact instruction
 * Use non-extended tags for saturating arithmetic, to keep it
   simple so that all the arithmetic operations can be done the same
   way.
   - Sema: unify analyzeArithmetic with analyzeSatArithmetic
     - implement comptime `+|`, `-|`, and `*|`
     - allow float operands to saturating arithmetic
 * `<<|` allows any integer type for the RHS.
 * C backend: fix rebase conflicts
 * LLVM backend: reduce the amount of branching for arithmetic ops
 * zig.h: fix magic number not matching actual size of C integer types
2021-09-28 19:19:28 -07:00
Travis Staloch
38703dc9c2 sat-arithmetic: don't test builtins in behavior tests
- not necessary as we are testing the operators
2021-09-28 17:04:19 -07:00
Travis Staloch
29f41896ed sat-arithmetic: add operator support
- adds initial support for the operators +|, -|, *|, <<|, +|=, -|=, *|=, <<|=
- uses operators in addition to builtins in behavior test
- adds binOpExt() and assignBinOpExt() to AstGen.zig. these need to be audited
2021-09-28 17:02:43 -07:00
Andrew Kelley
79bc5891c1 stage2: more arithmetic support
* AIR: add `mod` instruction for modulus division
   - Implement for LLVM backend
 * Sema: implement `@mod`, `@rem`, and `%`.
 * Sema: fix comptime switch evaluation
 * Sema: implement comptime shift left
 * Sema: fix the logic inside analyzeArithmetic to handle all the
   nuances between the different mathematical operations.
   - Implement comptime wrapping operations
2021-09-28 16:12:24 -07:00
Martin Wickham
1cc5d4e758
Stage 2: Support inst.func() syntax (#9827)
* Merge call zir instructions to make space for field_call
* Fix bug with comptime known anytype args
* Delete the param_type zir instruction
* Move some passing tests to stage 2
* Implement a.b() function calls
* Add field_call_bind support for call and field builtins
2021-09-28 12:00:35 -05:00
Andrew Kelley
09e1f37cb6 stage2: implement union coercion to its own tag
* AIR: add `get_union_tag` instruction
   - implement in LLVM backend
 * Sema: implement == and != for union and enum literal
   - Also implement coercion from union to its own tag type
 * Value: implement hashing for union values

The motivating example is this snippet:

    comptime assert(@typeInfo(T) == .Float);

This was the next blocker for stage2 building compiler-rt.
Now it is switch at compile-time on an integer.
2021-09-27 23:11:00 -07:00
Andrew Kelley
c0aa4a1a42 stage2: implement basic unions
* AIR instructions struct_field_ptr and related functions now are also
   emitted by the frontend for unions. Backends must inspect the type
   of the pointer operand to lower the instructions correctly.
   - These will be renamed to `agg_field_ptr` (short for "aggregate") in
     the future.
 * Introduce the new `set_union_tag` AIR instruction.
 * Introduce `Module.EnumNumbered` and associated `Type` methods. This
   is for enums which have no decls, but do have the possibility of
   overriding the integer tag type and tag values.
 * Sema: Implement support for union tag types in both the
   auto-generated and explicitly-provided cases, as well as explicitly
   provided enum tag values in union declarations.
 * LLVM backend: implement lowering union types, union field pointer
   instructions, and the new `set_union_tag` instruction.
2021-09-27 19:53:29 -07:00
Andrew Kelley
1f2f9f05c2 stage2: implement zirCoerceResultPtr
and remove Module.simplePtrType and Module.ptrType in favor of `Type.ptr`.
2021-09-25 22:18:43 -07:00
Andrew Kelley
04366576ea stage2: implement @sizeOf for non-packed structs 2021-09-25 17:54:52 -07:00
Andrew Kelley
42aa1ea115 stage2: implement @memset and @memcpy builtins 2021-09-24 17:33:06 -07:00
Josh Soref
664941bf14
Spelling corrections (#9833)
Signed-off-by: Josh Soref <jsoref@users.noreply.github.com>
Co-authored-by: Josh Soref <jsoref@users.noreply.github.com>
2021-09-24 13:39:20 -04:00
Martin Wickham
a0a847f2e4
Stage2: Implement comptime closures and the This builtin (#9823) 2021-09-23 13:17:06 -04:00
Andrew Kelley
736d14fd5f stage2: fix AstGen for some struct syntaxes
* AstGen: fix not emitting `struct_init_empty` when an explicit type is
   present in struct initialization syntax.
 * AstGen: these two syntaxes now lower to identical ZIR:
   - `var a = A{ .b = c };`
   - `var a = @as(A, .{ .b = c });`
 * Zir: clarify `auto_enum_tag` in the doc comments.
 * LLVM Backend: fix lowering of function return types when the type has
   0 bits.
2021-09-22 21:06:00 -07:00
Andrew Kelley
aecebf38ac stage2: progress towards ability to compile compiler-rt
* prepare compiler-rt to support being compiled by stage2
   - put in a few minor workarounds that will be removed later, such as
     using `builtin.stage2_arch` rather than `builtin.cpu.arch`.
   - only try to export a few symbols for now - we'll move more symbols
     over to the "working in stage2" section as they become functional
     and gain test coverage.
   - use `inline fn` at function declarations rather than `@call` with an
     always_inline modifier at the callsites, to avoid depending on the
     anonymous array literal syntax language feature (for now).
 * AIR: replace floatcast instruction with fptrunc and fpext for
   shortening and widening floating point values, respectively.
 * Introduce a new ZIR instruction, `export_value`, which implements
   `@export` for the case when the thing to be exported is a local
   comptime value that points to a function.
   - AstGen: fix `@export` not properly reporting ambiguous decl
     references.
 * Sema: handle ExportOptions linkage. The value is now available to all
   backends.
   - Implement setting global linkage as appropriate in the LLVM
     backend. I did not yet inspect the LLVM IR, so this still needs to
     be audited. There is already a pending task to make sure the alias
     stuff is working as intended, and this is related.
   - Sema almost handles section, just a tiny bit more code is needed in
     `resolveExportOptions`.
 * Sema: implement float widening and shortening for both `@floatCast`
   and float coercion.
   - Implement the LLVM backend code for this as well.
2021-09-21 23:21:07 -07:00
Andrew Kelley
0e2b9ac777 stage2: fix unsigned integer to signed integer coercion 2021-09-21 23:21:07 -07:00
Andrew Kelley
be71195bba stage2: enable f16 math
There was panic that said TODO add __trunctfhf2 to compiler-rt, but I
checked and that function has been in compiler-rt since April.
2021-09-21 23:21:07 -07:00
Veikka Tuominen
55e7c099ca stage2: various fixes to cImport, sizeOf and types to get tests passing 2021-09-20 20:51:31 -07:00
Andrew Kelley
f8b914fcf3 Merge branch 'address-space' of Snektron/zig into Snektron-address-space
There were two things to resolve here:
 * Snektron's branch edited Zir printing, but in master branch
   I moved the printing code from Zir.zig to print_zir.zig. So that
   just had to be moved over.
 * In master branch I fleshed out coerceInMemory a bit more, which
   caused one of Snektron's test cases to fail, so I had to add
   addrspace awareness to that. Once I did that the tests passed again.
2021-09-20 17:32:52 -07:00
Andrew Kelley
abc30f7948 stage2: improve handling of 0 bit types
* Sema: zirAtomicLoad handles 0-bit types correctly
 * LLVM backend: when lowering function types, elide parameters
   with 0-bit types.
 * Type: abiSize handles u0/i0 correctly
2021-09-20 16:48:42 -07:00
Andrew Kelley
4b2d7a9c67 stage2: implement comptime bitwise nand 2021-09-20 15:44:09 -07:00
Andrew Kelley
b9d3527e0e stage2: implement comptime @atomicRmw
* introduce float_to_int and int_to_float AIR instructionts and
   implement for the LLVM backend and C backend.
 * Sema: implement `zirIntToFloat`.
 * Sema: implement `@atomicRmw` comptime evaluation
   - introduce `storePtrVal` for when one needs to store a Value to a
     pointer which is a Value, and assert it happens at comptime.
 * Value: introduce new functionality:
   - intToFloat
   - numberAddWrap
   - numberSubWrap
   - numberMax
   - numberMin
   - bitwiseAnd
   - bitwiseNand (not implemented yet)
   - bitwiseOr
   - bitwiseXor
 * Sema: hook up `zirBitwise` to the new Value bitwise implementations
 * Type: rename `isFloat` to `isRuntimeFloat` because it returns `false`
   for `comptime_float`.
2021-09-20 14:24:43 -07:00
Robin Voetter
c5945467ac Address Spaces: Pointer and function info in @Type 2021-09-20 02:29:04 +02:00
Andrew Kelley
9fa723ee50 stage2: implement @atomicStore 2021-09-19 15:08:38 -07:00
Andrew Kelley
b58d8aa05f stage2: improve LLVM backend for enums
* support lowering enum types and constants to LLVM IR
 * fix cmp instruction to support enum operands
2021-09-16 21:57:46 -07:00
Andrew Kelley
091a98f524 stage2: fix global variables with inferred type
Also, when a global variable does have a type, perform coercion on it.
2021-09-16 21:43:01 -07:00
Andrew Kelley
dbe9a5114e stage2: implement @setAlignStack and 128-bit cmpxchg
* test runner is improved to respect `error.SkipZigTest`
 * start code is improved to `@setAlignStack(16)` before calling main()
 * the newly passing behavior test has a workaround for the fact that
   stage2 cannot yet call `std.Target.x86.featureSetHas()` at comptime.
   This is blocking on comptime closures. The workaround is that there
   is a new decl `@import("builtin").stage2_x86_cx16` which is a `bool`.
 * Implement `@setAlignStack`. This language feature should be re-evaluated
   at some point - I'll file an issue for it.
 * LLVM backend: apply/remove the cold attribute and noinline attribute
   where appropriate.
 * LLVM backend: loads and stores are properly annotated with alignment
   and volatile attributes.
 * LLVM backend: allocas are properly annotated with alignment.
 * Type: fix integers reporting wrong alignment for 256-bit integers and
   beyond. Once you get to 16 byte aligned, there is no further
   alignment for larger integers.
2021-09-16 21:03:55 -07:00
Andrew Kelley
ab84ba39d0 move behavior test to "passing for stage2" section 2021-09-16 11:21:56 -07:00
Andrew Kelley
d5c1d24964 stage2: fix "cmpxchg with ptr" test case
* Sema: fix atomic operand checking to allow pointers.
 * LLVM backend: implement pointer-like optional constants.
 * LLVM backend: fix `is_non_null` and `optional_payload` instructions
   to support pointer-like optionals.
 * Type: introduce `isPtrAtRuntime` method.
 * Type: fix `isPtrLikeOptional` to get the correct answer for allowzero
   pointers and slices.
2021-09-15 19:55:57 -07:00
Andrew Kelley
b67d1810be stage2: implement @atomicRmw and @atomicLoad
* langref: add some more "see also" links for atomics
 * Add the following AIR instructions
   - atomic_load
   - atomic_store_unordered
   - atomic_store_monotonic
   - atomic_store_release
   - atomic_store_seq_cst
   - atomic_rmw
 * Implement those AIR instructions in LLVM and C backends.
 * AstGen: make the `ty` result locations for `@atomicRmw`, `@atomicLoad`,
   and `@atomicStore` be `coerced_ty` to avoid unnecessary ZIR
   instructions when Sema will be doing the coercions redundantly.
 * Sema for `@atomicLoad` and `@atomicRmw` is done, however Sema for
   `@atomicStore` is not yet implemented.
   - comptime eval for `@atomicRmw` is not yet implemented.
 * Sema: flesh out `coerceInMemoryAllowed` a little bit more. It can now
   handle pointers.
2021-09-15 19:00:35 -07:00
Andrew Kelley
f3ebfcae38 Merge remote-tracking branch 'origin/master' into llvm13
Conflicts:

 * cmake/Findclang.cmake
 * cmake/Findlld.cmake
 * cmake/Findllvm.cmake

In master branch, more search paths were added to these files with "12"
in the path. In this commit I updated them to "13".

 * src/stage1/codegen.cpp
 * src/zig_llvm.cpp
 * src/zig_llvm.h

In master branch, ZigLLVMBuildCmpXchg is improved to add
`is_single_threaded`. However, the LLVM 13 C API has this already, and
in the llvm13 branch, ZigLLVMBuildCmpXchg is deleted in favor of the C
API. In this commit I updated stage2 to use the LLVM 13 C API rather
than depending on an improved ZigLLVMBuildCmpXchg.

Additionally, src/target.zig largestAtomicBits needed to be updated to
include the new m68k ISA.
2021-09-15 14:51:08 -07:00
Andrew Kelley
19691c0b17 stage2: implement @fence 2021-09-15 12:37:32 -07:00
Andrew Kelley
0395b35cee stage2: implement cmpxchg and improve comptime eval
* Implement Sema for `@cmpxchgWeak` and `@cmpxchgStrong`. Both runtime
   and comptime codepaths are implement.
 * Implement Codegen for LLVM backend and C backend.
 * Add LazySrcLoc.node_offset_builtin_call_argX 3...5
 * Sema: rework comptime control flow.
   - `error.ComptimeReturn` is used to signal that a comptime function
     call has returned a result (stored in the Inlining struct).
     `analyzeCall` notices this and handles the result.
   - The ZIR instructions `break_inline`, `block_inline`,
     `condbr_inline` are now redundant and can be deleted. `break`,
     `block`, and `condbr` function equivalently inside a comptime scope.
   - The ZIR instructions `loop` and `repeat` also are modified to
     directly perform comptime control flow inside a comptime scope,
     skipping an unnecessary mechanism for analysis of runtime code.
     This makes Zig perform closer to an interpreter when evaluating
     comptime code.
 * Sema: zirRetErrValue looks at Sema.ret_fn_ty rather than sema.func
   for adding to the inferred error set. This fixes a bug for
    inlined/comptime function calls.
 * Implement ZIR printing for cmpxchg.
 * stage1: make cmpxchg respect --single-threaded
   - Our LLVM C++ API wrapper failed to expose this boolean flag before.
 * Fix AIR printing for struct fields showing incorrect liveness data.
2021-09-14 21:58:22 -07:00
Andrew Kelley
264acfdf3c stage2: fix incorrect spelling of AtomicOrder 2021-09-13 22:01:40 -07:00
Andrew Kelley
97d69e3352 stage2: add array_to_slice AIR instruction 2021-09-13 21:37:11 -07:00
Andrew Kelley
cca57042df std: fix regressions from this branch
Also move some usingnamespace test cases from compare_output to
behavior.
2021-09-01 17:54:07 -07:00