10 Commits

Author SHA1 Message Date
Alex Rønne Petersen
5458c9c71b
std.Target: Regenerate CPU models/features based on LLVM 19.1.0.
* DefaultExts parsing for aarch64.
* cortex-m85 trustzone correction for arm.
2024-09-24 11:45:01 +02:00
Alex Rønne Petersen
da8b7fb0c0 std.Target: Update CPU models/features for LLVM 19. 2024-09-19 18:20:21 -07:00
mlugg
0fe3fd01dd
std: update std.builtin.Type fields to follow naming conventions
The compiler actually doesn't need any functional changes for this: Sema
does reification based on the tag indices of `std.builtin.Type` already!
So, no zig1.wasm update is necessary.

This change is necessary to disallow name clashes between fields and
decls on a type, which is a prerequisite of #9938.
2024-08-28 08:39:59 +01:00
Linus Groh
fd434fcd38 std.Target: Rename feature_set_fns to FeatureSetFns
From https://ziglang.org/documentation/master/#Names:

> If `x` is callable, and `x`'s return type is `type`, then `x` should
> be `TitleCase`.
2024-08-12 00:34:59 +01:00
Ryan Liptak
e912411fbe Run update_cpu_features against LLVM 18.1.8
- RISCV unaligned-scalar-mem was added in LLVM 18.1.6
- Fixes arm v9_5a confusion
2024-08-07 09:03:05 -07:00
Jora Troosh
13070448f5
std: fix typos (#20560) 2024-07-09 14:25:42 -07:00
Andrew Kelley
d34fae26d5 LLVM 18 std lib updates and fixes
* some manual fixes to generated CPU features code. In the future it
  would be nice to make the script do those automatically.

* add to various target OS switches. Some of the values I was unsure of
  and added TODO panics, for example in the case of spirv CPU arch.
2024-05-08 19:37:28 -07:00
Andrew Kelley
109ec72924 update CPU features to LLVM 18
release/18.x branch, commit 78b99c73ee4b96fe9ce0e294d4632326afb2db42
2024-05-08 19:37:28 -07:00
Carl Åstholm
0cd508b09f Re-run update_cpu_features (LLVM 17)
release/17.x branch, commit 8f4dd44097c9ae25dd203d5ac87f3b48f854bba8
(same as the previous run)
2024-01-09 17:53:43 +01:00
Andrew Kelley
67d48b94d6 std.Target: flatten 2024-01-01 17:51:18 -07:00