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Author SHA1 Message Date
joachimschmidt557
a153732d5a
stage2 RISCV64: implement add, sub for registers 2022-03-19 20:44:57 +01:00
joachimschmidt557
7cdc47a4e0
stage2 RISCV64: implement move register to register 2022-03-19 19:48:27 +01:00
Andrew Kelley
69e6d455ce
Merge pull request #11228 from Vexu/panic 
enable default panic handler for stage2 LLVM
 2022-03-19 14:32:09 -04:00
zseri
c6cf40a0c0 fix sigaction double panic 
Fixes #8357
 2022-03-19 19:13:31 +02:00
fn ⌃ ⌥
d62b1c932e
translate-c: add missing builtins used by CRuby 2022-03-19 19:08:17 +02:00
Veikka Tuominen
12f3c461a4 Sema: implement zirSwitchCaptureElse for error sets 2022-03-19 15:49:27 +02:00
Veikka Tuominen
c9b6f1bf90 std: enable default panic handler for stage2 LLVM on Linux 2022-03-19 14:05:57 +02:00
Veikka Tuominen
2757237332 Sema: add error for runtime block peer type being comptime only 2022-03-19 13:36:16 +02:00
joachimschmidt557
956d9f4ce0
stage2 RISCV64: remove MCValue.embedded_in_code 2022-03-19 10:52:59 +01:00
Veikka Tuominen
d56e3c988f stage2: fix inline fn parameter debug info being added to wrong block 2022-03-19 11:40:45 +02:00
Veikka Tuominen
1e1f740347 AstGen: always add dbg_block_end before last instruction 2022-03-19 11:20:38 +02:00
Veikka Tuominen
30e17cd5d0 Sema: add debug info for inline function parameters 2022-03-19 11:20:38 +02:00
Veikka Tuominen
f19731948e Sema: balance dbg_block_begins in case of early return 2022-03-19 11:20:38 +02:00
Veikka Tuominen
739734170e stage2: add debug info for payload captures 2022-03-19 11:20:38 +02:00
Veikka Tuominen
a8520fbd0f stage2: add dbg_block_{begin,end} instruction 2022-03-19 11:20:38 +02:00
Koakuma
731dda18dd stage2 sparcv9: zig fmt 2022-03-19 09:06:58 +07:00
Koakuma
59680b40a1 stage2 sparcv9: Fix unused parameter errors in Codegen 2022-03-19 06:58:50 +07:00
Koakuma
93b16de4b4 stage2 sparcv9: Add placeholder files and generate() function 
Add placeholder files for Codegen, Emit, and Mir stages, complete with
a placeholder implementation of generate() to make it able to be plugged in
to the frontend. At the moment the implementation just panics, it'll be
worked on incrementally later.

Also, this registers the sparcv9 backend files into CMakeLists.txt.
 2022-03-19 06:09:46 +07:00
Andrew Kelley
ad5770eba4 organize behavior tests 
* Identify the ones that are passing and stop skipping them.
 * Flatten out the main behavior.zig file and have each individual test
   disable itself if it is not passing.
 2022-03-18 15:02:52 -07:00
Andrew Kelley
d5803441cd
Merge pull request #11220 from schmee/vector-bitreverse 
stage2: implement `@bitReverse` for vectors
 2022-03-18 15:27:08 -04:00
Andrew Kelley
e60c0468aa
Merge pull request #11217 from jmc-88/cbe-tuples 
CBE: add support for tuples
 2022-03-18 15:23:40 -04:00
Jakub Konka
338bf55e84
Merge pull request #11216 from joachimschmidt557/stage2-arm 
stage2 ARM: remove MCValue.embedded_in_code
 2022-03-18 20:02:33 +01:00
Mitchell Hashimoto
3865a61a99 stage2: formatting an error_set value should print members, not decl 2022-03-18 14:53:54 -04:00
Andrew Kelley
5765755fcd
Merge pull request #11218 from mitchellh/labeled-break 
AstGen: labeled blocks should always complete with a normal break
 2022-03-18 14:50:40 -04:00
Andrew Kelley
de8f3bc885 AstGen: remove unused parameter 
This function took a parameter that was only ever used with one value,
obscuring the fact that it was a regular `block` which should be used with
`.break` and not `.break_inline`.
 2022-03-18 11:49:18 -07:00
Mitchell Hashimoto
3e74acb139 AstGen: labeled blocks should always complete with a normal break 
They aren't inline blocks by nature of being labeled.

Fixes #11213
 2022-03-18 11:40:39 -07:00
joachimschmidt557
13321c8070 stage2 regalloc: fix tryAllocRegs for specific situations 
Previously, tryAllocRegs did not take frozen registers into account
when checking if enough registers are available.
 2022-03-18 19:37:01 +01:00
Daniele Cocca
6fdca525de CBE: add support for tuples 
Also promote tests that are now passing.
 2022-03-18 16:50:34 +00:00
John Schmidt
e99b1b398a Refactor to sema.typeHasOnePossibleValue 2022-03-18 16:28:38 +01:00
John Schmidt
870341e32e stage2: implement @bitReverse for vectors 2022-03-18 16:28:38 +01:00
Daniele Cocca
085e122e29 bugs/3779: replace expectEqual*() with expect() 2022-03-18 11:20:28 +00:00
joachimschmidt557
c32e2c4d3c
stage2 ARM: remove MCValue.embedded_in_code 2022-03-18 12:19:22 +01:00
Daniele Cocca
af8586da3a tuple: replace expectEqual() with expect() 2022-03-18 11:18:12 +00:00
joachimschmidt557
3ecba7d7a2
stage2 ARM: implement slice_elem_ptr, ptr_elem_ptr 2022-03-18 12:12:14 +01:00
Andrew Kelley
f3f5a5d05b stage2: improve @typeName 
* make it always return a fully qualified name. stage1 is inconsistent
   about this.
 * AstGen: fix anon_name_strategy to correctly be `func` when anon type
   creation happens in the operand of the return expression.
 * Sema: implement type names for the "function" naming strategy.
 * Put "enum", "union", "opaque", or "struct" in place of "anon" when
   creating respective anonymous Decl names.
 * std.testing: add `expectStringStartsWith`. Didn't end up using it
   after all.

Also this enables the real test runner for stage2 LLVM backend (sans
wasm32) since it works now.
 2022-03-18 00:12:22 -07:00
Andrew Kelley
69d78bdae4 stage2 test harness: ask for the backend explicitly 
Follow-up to 35d6ee08c468642969b594b711dd6448bbaefa89
 2022-03-17 20:10:00 -07:00
Andrew Kelley
1d1364c3cd Sema: change how undefined is handled in coerce 
Instead of doing it before the switch tower, do it afterwards, so that
special handling may be done before undefined gets casted to the
destination type.

In this case the special handling we want to do is *[N]T to []T setting
the slice length based on the array length, even when the array value is
undefined.
 2022-03-17 19:59:20 -07:00
Andrew Kelley
46ba24010a CI: explicitly pass -fno-LLVM 
Needed because of previous commit.
 2022-03-17 19:12:27 -07:00
Andrew Kelley
35d6ee08c4 stage2: default to LLVM backend 
on targets for which self-hosted backends are not up to par.

See #89
 2022-03-17 19:03:37 -07:00
Andrew Kelley
76b382072a
Merge pull request #11200 from Luukdegram/wasm-memcpy 
stage2: wasm - Implement memcpy instruction
 2022-03-17 18:25:15 -07:00
Luuk de Gram
79679be50d sema: Fix memory leak 
When a generic call evaluates to a generic type, the call will be re-generated.
However, the old function was not freed before being re-generated, causing a memory leak.
So rather than only returning an error, we first free the old value.
 2022-03-17 18:20:03 -07:00
Steven Fackler
9dc9219b2f Don't strip by default in cc or c++ 2022-03-17 18:16:24 -07:00
Andrew Kelley
ff21cb42a0
Merge pull request #11206 from schmee/vector-byteswap 
Implement `@byteSwap` for vectors
 2022-03-17 18:04:46 -07:00
Andrew Kelley
4fa5060633 Sema: take advantage of checkIntOrVectorAllowComptime 2022-03-17 18:04:06 -07:00
John Schmidt
d7d2ccb7af Avoid index out of bounds for one-valued types in zirValidateArrayInit 
Previously, the code assumed that `ptr_elem_ptr` was always followed by
a `store`, but this is not true for types with one value (such as `u0`).
 2022-03-17 18:00:48 -07:00
John Schmidt
adfcc8851b Implement @byteSwap for vectors 
Make the behavior tests for this a little more primitive to exercise as
little extra functionality as possible.
 2022-03-17 18:00:48 -07:00
Andrew Kelley
7233a3324a stage2: implement @reduce 
Notably, Value.eql and Value.hash are improved to treat NaN as equal to
itself, so that Type/Value can be hash map keys. Likewise float hashing
normalizes the float value before computing the hash.
 2022-03-17 17:24:35 -07:00
Andrew Kelley
76e103057e zig_llvm.h: fix some declarations not being C compatible 2022-03-17 17:24:11 -07:00
Andrew Kelley
9ed3eb9cde std.testing: fix incorrect docs that mentioned aborting 
At some point we changed these functions to return errors instead of
aborting.
 2022-03-17 17:23:22 -07:00
Andrew Kelley
73e51133c3 langref: small clarification of @reduce 2022-03-17 17:22:57 -07:00