68 Commits

Author SHA1 Message Date
Andrew Kelley
3d351c91d8 Type: fix abiAlignment calculation for unions 2021-05-08 10:54:40 -07:00
Andrew Kelley
47531b7d93 Sema: support enough to check main calling convention via @typeInfo
After this commit, `pub export fn main() c_int { ... }` will be
correctly detected as the intended entry point, and therefore start code
will not try to export its own conflicting `main` function.

 * Implement basic union support
   - lots of stuff is still TODO, including runtime field access
   - also TODO: resolving the union tag type
   - comptime field access is implemented
 * DRY up some code by using the `Zir.DeclIterator` for skipping over
   decls in structs and unions.
 * Start to clean up Sema with regards to calling `.value()` to find out
   a const value. Instead, Sema code should call one of these two:
   - `resolvePossiblyUndefinedValue` (followed by logic dealing with
     undefined values)
   - `resolveDefinedValue` (a compile error will be emitted if the value
     is undefined)
 * An exported function with an unspecified calling convention gets the
   C calling convention.
 * Implement comptime field access for structs.
 * Add another implementation of "type has one possible value" in Sema.
   This is a bit unfortunate since the logic is duplicated, but the one
   in Type asserts that the types are resolved already, and is
   appropriate to call from codegen, while the one in Sema performs
   type resolution if necessary, reporting any compile errors that occur
   in the process.
2021-05-07 14:18:14 -07:00
Andrew Kelley
a7221ef4e9 Sema: implement @typeInfo for functions
The goal is to get start code to be able to inspect the calling
convention of `main` in order to determine whether to export a main for
libc to call, or to allow the root source file to do it.
2021-05-06 22:30:44 -07:00
Andrew Kelley
cdea22f5d7 stage2: wire up outdated/deleted decl detection
we're back to incremental compilation working smoothly
2021-05-06 17:20:45 -07:00
Andrew Kelley
ff2ec0dc5a AstGen: implement @Vector 2021-04-24 17:44:07 -07:00
Andrew Kelley
b40a8efb9a stage2: implement anyframe, anyframe->T and fix assembly
* AstGen: implement `anyframe_literal` and `anyframe_type`.
 * Introduce `makeSubBlock` to avoid redundant AstGen code for GenZir
   scopes. Allows adding/removing a field without possibility of
   accidentally introducing a bug of forgetting to set the new field.
 * Add to GenZir `nosuspend_node` and `suspend_node` in preparation for
   implementing `suspend` blocks and `nosuspend` blocks.
 * AstGen: fix assembly to support clobbers, multiple outputs, and
   outputs without `->` syntax.
   - `asm` and `asm_volatile` move to `Extended` enum with `small` being
     repurposed for a few things. This frees up 2 ZIR tags, 1 of which
     is used in this commit and 1 is leftover.
 * AstGen: fix `simple_types` incorrectly having multiple conflicting
   values for "undefined" and "null".
   - Also add "anyframe" to `simple_types`.
 * Add `anyframe_type` to type.zig, value.zig and `Zir.Inst.Ref`.
   - Also add i128 and u128 types to `Zir.Inst.Ref` and `simple_types`.
 * Sema/Zir: Fix incorrect math causing the function body to be messed
   up for Extended-encoded functions.
 * Zir: support `i32` fields for "extra" payloads.
2021-04-23 18:35:21 -07:00
Andrew Kelley
7c453b91b8 AstGen: implement @extern builtin 2021-04-22 16:31:51 -07:00
Andrew Kelley
3d637e6dd2 AstGen: fix @export
Make it properly use `std.builtin.ExportOptions`.
2021-04-22 16:07:58 -07:00
Andrew Kelley
ae495de54d AstGen: implement all the builtin functions 2021-04-18 22:38:41 -07:00
Andrew Kelley
6dba9bc6fc stage2: implement @bitSizeOf 2021-04-15 19:06:39 -07:00
Andrew Kelley
f458192e56 stage2: entry point via std lib and proper updated file detection
Instead of Module setting up the root_scope with the root source file,
instead, Module relies on the package table graph being set up properly,
and inside `update()`, it does the equivalent of `_ = @import("std");`.
This, in term, imports start.zig, which has the logic to call main (or
not). `Module` no longer has `root_scope` - the root source file is no
longer special, it's just in the package table mapped to "root".

I also went ahead and implemented proper detection of updated files.
mtime, inode, size, and source hash are kept in `Scope.File`.
During an update, iterate over `import_table` and stat each file to find
out which ones are updated.

The source hash is redundant with the source hash used by the struct
decl that corresponds to the file, so it should be removed in a future
commit before merging the branch.

 * AstGen: add "previously declared here" notes for variables shadowing
   decls.
 * Parse imports as structs. Module now calls `AstGen.structDeclInner`,
   which is called by `AstGen.containerDecl`.
   - `importFile` is a bit kludgy with how it handles the top level Decl
     that kinda gets merged into the struct decl at the end of the
     function. Be on the look out for bugs related to that as well as
     possibly cleaner ways to implement this.
 * Module: factor out lookupDeclName into lookupIdentifier and lookupNa
 * Rename `Scope.Container` to `Scope.Namespace`.
 * Delete some dead code.

This branch won't work until `usingnamespace` is implemented because it
relies on `@import("builtin").OutputMode` and `OutputMode` comes from a
`usingnamespace`.
2021-04-15 19:06:39 -07:00
Michael Dusan
93cf9560b1
Merge remote-tracking branch 'origin/master' into llvm12 2021-04-11 17:40:19 -04:00
Andrew Kelley
57aa289fde Sema: fix switch validation '_' prong on wrong type 2021-04-07 22:19:17 -07:00
Andrew Kelley
8f28e26e7a Sema: implement switch validation for enums 2021-04-07 16:39:10 -07:00
Andrew Kelley
090834380c Type: use isPtrLikeOptional instead of isAbiPtr
Thanks @Vexu
2021-04-07 13:06:21 -07:00
Andrew Kelley
18119aae30 Sema: implement comparison analysis for non-numeric types 2021-04-07 12:15:05 -07:00
Andrew Kelley
4e8fb9e6a5 Sema: DRY up enum field analysis and add "declared here" notes 2021-04-07 11:26:07 -07:00
Andrew Kelley
19cf987198 C backend: implement Enum types and values
They are lowered directly as the integer tag type, with no typedef.
2021-04-06 23:19:46 -07:00
Andrew Kelley
acf9151008 stage2: implement field access for Enum.tag syntax 2021-04-06 22:36:28 -07:00
Andrew Kelley
b40d36c90b stage2: implement simple enums
A simple enum is an enum which has an automatic integer tag type,
all tag values automatically assigned, and no top level declarations.
Such enums are created directly in AstGen and shared by all the
generic/comptime instantiations of the surrounding ZIR code. This
commit implements, but does not yet add any test cases for, simple enums.

A full enum is an enum for which any of the above conditions are not
true. Full enums are created in Sema, and therefore will create a unique
type per generic/comptime instantiation. This commit does not implement
full enums. However the `enum_decl_nonexhaustive` ZIR instruction is
added and the respective Type functions are filled out.

This commit makes an improvement to ZIR code, removing the decls array
and removing the decl_map from AstGen. Instead, decl_ref and
decl_val ZIR instructions index into the `owner_decl.dependencies`
ArrayHashMap. We already need this dependencies array for incremental
compilation purposes, and so repurposing it to also use it for ZIR decl
indexes makes for efficient memory usage.

Similarly, this commit fixes up incorrect memory management by removing
the `const` ZIR instruction. The two places it was used stored memory in
the AstGen arena, which may get freed after Sema. Now it properly sets
up a new anonymous Decl for error sets and uses a normal decl_val
instruction.

The other usage of `const` ZIR instruction was float literals. These are
now changed to use `float` ZIR instruction when the value fits inside
`zir.Inst.Data` and `float128` otherwise.

AstGen + Sema: implement int_to_enum and enum_to_int. No tests yet; I expect to
have to make some fixes before they will pass tests. Will do that in the
branch before merging.

AstGen: fix struct astgen incorrectly counting decls as fields.

Type/Value: give up on trying to exhaustively list every tag all the
time. This makes the file more manageable. Also found a bug with
i128/u128 this way, since the name of the function was more obvious when
looking at the tag values.

Type: implement abiAlignment and abiSize for structs. This will need to
get more sophisticated at some point, but for now it is progress.

Value: add new `enum_field_index` tag.
Value: add hash_u32, needed when using ArrayHashMap.
2021-04-06 18:17:37 -07:00
Andrew Kelley
2f07d76eee stage2: implement Type.onePossibleValue for structs 2021-04-02 21:17:23 -07:00
Andrew Kelley
a0e89c9b46 Merge remote-tracking branch 'origin/master' into llvm12 2021-04-02 12:09:38 -07:00
Andrew Kelley
8ebfdc14f6 stage2: implement structs in the frontend
New ZIR instructions:
 * struct_decl_packed
 * struct_decl_extern

New TZIR instruction: struct_field_ptr

Introduce `Module.Struct`. It uses `Value` to store default values and
abi alignments.

Implemented Sema.analyzeStructFieldPtr and zirStructDecl.

Some stuff I changed from `@panic("TODO")` to `log.warn("TODO")`.
It's becoming more clear that we need the lazy value mechanism soon;
Type is becoming unruly, and some of these functions have too much logic
given that they don't have any context for memory management or error
reporting.
2021-04-01 22:39:09 -07:00
Andrew Kelley
c66b48194f stage2: AstGen and ZIR printing for struct decls 2021-04-01 19:27:17 -07:00
Andrew Kelley
195ddab2be Sema: implement switch expressions
The logic for putting ranges into the else prong is moved from AstGen to
Sema. However, logic to emit multi-items the same as single-items cannot
be done until TZIR supports mapping multiple items to the same block of
code. This will be simple to represent when we do the upcoming TZIR memory
layout changes.

Not yet implemented in this commit is the validation of duplicate
values. The trick is going to be emitting error messages with accurate
source locations, without adding extra source nodes to the ZIR
switch instruction.

This will be done by computing the respective AST node based on the
switch node (which we do have available), only when a compile error
occurs and we need to know the source location to attach the message to.
2021-03-29 21:59:08 -07:00
Andrew Kelley
8f469c1127 stage2: fix error sets 2021-03-28 19:40:21 -07:00
Andrew Kelley
68f4eb0f67 stage2: fully implement Type.eql for pointers
Also fixed abiAlignment - for pointers it was returning the abi
alignment inside the type, rather than of the pointer itself. There is
now `ptrAlignment` for getting the alignment inside the type of
pointers.
2021-03-27 23:55:19 -07:00
Isaac Freund
9f0b9b8da1
stage2: remove all async related code
The current plan is to avoid using async and related features in the
stage2 compiler so that we can bootstrap before implementing them.

Having this untested and incomplete code in the codebase increases
friction while working on stage2, in particular when preforming
larger refactors such as the current zir memory layout rework.

Therefore remove all async related code, leaving only error messages
in astgen.
2021-03-23 00:23:41 +01:00
Andrew Kelley
b2682237db stage2: get Module and Sema compiling again
There are some `@panic("TODO")` in there but I'm trying to get the
branch to the point where collaborators can jump in.

Next is to repair the seam between LazySrcLoc and codegen's expected
absolute file offsets.
2021-03-18 22:19:28 -07:00
Andrew Kelley
66245ac834 stage2: Module and Sema are compiling again
Next up is reworking the seam between the LazySrcLoc emitted by Sema
and the byte offsets currently expected by codegen.

And then the big one: updating astgen.zig to use the new memory layout.
2021-03-17 22:54:56 -07:00
Andrew Kelley
aef3e534f5 stage2: *WIP*: rework ZIR memory layout; overhaul source locations
The memory layout for ZIR instructions is completely reworked. See
zir.zig for those changes. Some new types:

 * `zir.Code`: a "finished" set of ZIR instructions. Instead of allocating
   each instruction independently, there is now a Tag and 8 bytes of
   data available for all ZIR instructions. Small instructions fit
   within these 8 bytes; larger ones use 4 bytes for an index into
   `extra`. There is also `string_bytes` so that we can have 4 byte
   references to strings. `zir.Inst.Tag` describes how to interpret
   those 8 bytes of data.
   - This is shared by all `Block` scopes.

 * `Module.WipZirCode`: represents an in-progress `zir.Code`. In this
   structure, the arrays are mutable, and get resized as we add/delete
   things. There is extra state to keep track of things. This struct is
   stored on the stack. Once it is finished, it produces an immutable
   `zir.Code`, which will remain on the heap for the duration of a
   function's existence.
   - This is shared by all `GenZir` scopes.

 * `Sema`: represents in-progress semantic analysis of a `zir.Code`.
   This data is stored on the stack and is shared among all `Block`
   scopes. It is now the main "self" argument to everything in the file
   that was previously named `zir_sema.zig`.
   Additionally, I moved some logic that was in `Module` into here.

`Module.Fn` now stores its parameter names inside the `zir.Code`,
instead of inside ZIR instructions. When the TZIR memory layout
reworking time comes, codegen will be able to reference this data
directly instead of duplicating it.

astgen.zig is (so far) almost entirely untouched, but nearly all of it
will need to be reworked to adhere to this new memory layout structure.

I have no benchmarks to report yet, as I am still working through
compile errors and fixing various things that I broke in this branch.

Overhaul of Source Locations:

Previously we used `usize` everywhere to mean byte offset, but sometimes
also mean other stuff. This was error prone and also made us do
unnecessary work, and store unnecessary bytes in memory.

Now there are more types involved into source locations, and more ways
to describe a source location.

 * AllErrors.Message: embrace the assumption that files always have less
   than 2 << 32 bytes.
 * SrcLoc gets more complicated, to model more complicated source
   locations.
 * Introduce LazySrcLoc, which can model interesting source locations
   with very little stored state. Useful for avoiding doing unnecessary
   work when no compile errors occur.

Also, previously, we had `src: usize` on every ZIR instruction. This is
no longer the case. Each instruction now determines whether it even cares
about source location, and if so, how that source location is stored.
This requires more careful work inside `Sema`, but it results in fewer
bytes stored on the heap, without compromising accuracy and power of
compile error messages.

Miscellaneous:

 * std.zig: string literals have more helpful result values for
   reporting errors. There is now a lower level API and a higher level
   API.
   - side note: I noticed that the string literal logic needs some love.
     There is some unnecessarily hacky code there.
 * cut & pasted some TZIR logic that was in zir.zig to ir.zig. This
   probably broke stuff and needs to get fixed.
 * Removed type/Enum.zig, type/Union.zig, and type/Struct.zig. I don't
   think this quite how this code will be organized. Need some more
   careful planning about how to implement structs, unions, enums. They
   need to be independent Decls, just like a top level function.
2021-03-16 00:03:22 -07:00
Andrew Kelley
1f34c03ac1 Merge remote-tracking branch 'origin/master' into llvm12 2021-03-12 18:05:27 -07:00
Veikka Tuominen
fc62ff77c3
stage2: error union payload must also be a valid variable type 2021-03-08 00:33:59 +02:00
jacob gw
30ffa052f2
stage2 cbe: add error union and error union operations 2021-03-08 00:33:59 +02:00
jacob gw
6467ef6d3b
cbe: add error comparison support 2021-03-08 00:33:59 +02:00
Veikka Tuominen
cfc19eace7
stage2 cbe: errors 2021-03-08 00:33:07 +02:00
Veikka Tuominen
8c6e7fb2c7
stage2: implement var args 2021-03-06 15:55:29 +02:00
Andrew Kelley
0b58b61799 Merge remote-tracking branch 'origin/master' into llvm12
Conflicts:
 * src/clang.zig
 * src/llvm.zig
   - this file got moved to src/llvm/bindings.zig in master branch so I
     had to put the new LLVM arch/os enum tags into it.
 * lib/std/target.zig, src/stage1/target.cpp
   - haiku had an inconsistency with its default target ABI, gnu vs
     eabi. In this commit we make it gnu in both places to match the
     latest changes by @hoanga.
 * src/translate_c.zig
2021-02-25 21:04:23 -07:00
Veikka Tuominen
2a74a1ebaa
translate-c: bunch of small fixes to get it compiling 2021-02-16 16:40:06 +02:00
Veikka Tuominen
d835f5cce5
translate-c: make Node more like Type 2021-02-16 16:37:07 +02:00
Veikka Tuominen
6ecec4c8b7
translate-c: translate C types to stage2 types 2021-02-16 16:37:07 +02:00
Tadeo Kondrak
7644e9a752
stage2: switch from inline fn to callconv(.Inline) 2021-02-10 20:22:18 -07:00
Andrew Kelley
102d954220
Merge pull request #7827 from Snektron/spirv-setup
Stage 2: SPIR-V setup
2021-02-01 12:49:51 -08:00
Tadeo Kondrak
0b5f3c2ef9
Replace @TagType uses, mostly with std.meta.Tag 2021-01-30 22:26:44 +02:00
Robin Voetter
02c138fe70 SPIR-V: Add glsl450 and vulkan spir-v operating system definitions 2021-01-19 15:28:17 +01:00
Robin Voetter
ab607d455e SPIR-V: Initial architecture definitions and setup 2021-01-19 15:28:17 +01:00
Andrew Kelley
29c9d5896c Merge branch 'Stage2 begin implementing container types' 2021-01-11 16:25:21 -07:00
Andrew Kelley
974c008a0e convert more {} to {d} and {s} 2021-01-02 19:03:14 -07:00
daurnimator
9c97a07f18 std: have std.meta.fieldInfo take an enum rather than a string 2021-01-01 15:48:46 -07:00
Andrew Kelley
982acc22fd stage2: compile error for invalid var type 2020-12-31 17:25:42 -07:00